From patchwork Tue Jul 7 23:47:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Guedes X-Patchwork-Id: 1324803 X-Patchwork-Delegate: mkubecek@suse.cz Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4B1fJb2g0mz9sSn for ; Wed, 8 Jul 2020 09:48:15 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729325AbgGGXsO (ORCPT ); Tue, 7 Jul 2020 19:48:14 -0400 Received: from mga02.intel.com ([134.134.136.20]:15272 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728688AbgGGXsL (ORCPT ); Tue, 7 Jul 2020 19:48:11 -0400 IronPort-SDR: UgAg7mpOk8Apx2cOvlcjI2/x4pjKsOZdt3bpQ1VYxjAILcFd6uEmjVf1XlmbweNe/SMa8ohe3+ fNYoydWPUdnA== X-IronPort-AV: E=McAfee;i="6000,8403,9675"; a="135949650" X-IronPort-AV: E=Sophos;i="5.75,325,1589266800"; d="scan'208";a="135949650" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jul 2020 16:48:10 -0700 IronPort-SDR: pDs+cfnFDRI5S5B3cUZqr/gcmQXxp+tS8YaBCAplLRAKJgO2IvtgdUDQEmAju3uKsEr013v4zb 1D9+IEjZo09A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,325,1589266800"; d="scan'208";a="483684031" Received: from vapadgao-mobl.amr.corp.intel.com ([10.251.143.88]) by fmsmga005.fm.intel.com with ESMTP; 07 Jul 2020 16:48:10 -0700 From: Andre Guedes To: netdev@vger.kernel.org Cc: intel-wired-lan@lists.osuosl.org Subject: [PATCH ethtool 1/4] Add IGC driver support Date: Tue, 7 Jul 2020 16:47:57 -0700 Message-Id: <20200707234800.39119-2-andre.guedes@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200707234800.39119-1-andre.guedes@intel.com> References: <20200707234800.39119-1-andre.guedes@intel.com> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This patch adds the initial support for parsing registers dumped by the IGC driver. At this moment, only the Receive Address Low (RAL) and the Receive Address High (RAH) registers are parsed. More registers will be added on demand. Signed-off-by: Andre Guedes --- Makefile.am | 3 ++- ethtool.c | 1 + igc.c | 62 +++++++++++++++++++++++++++++++++++++++++++++++++++++ internal.h | 3 +++ 4 files changed, 68 insertions(+), 1 deletion(-) create mode 100644 igc.c diff --git a/Makefile.am b/Makefile.am index a736237..2abb274 100644 --- a/Makefile.am +++ b/Makefile.am @@ -16,7 +16,8 @@ ethtool_SOURCES += \ pcnet32.c realtek.c tg3.c marvell.c vioc.c \ smsc911x.c at76c50x-usb.c sfc.c stmmac.c \ sff-common.c sff-common.h sfpid.c sfpdiag.c \ - ixgbevf.c tse.c vmxnet3.c qsfp.c qsfp.h fjes.c lan78xx.c + ixgbevf.c tse.c vmxnet3.c qsfp.c qsfp.h fjes.c lan78xx.c \ + igc.c endif if ENABLE_BASH_COMPLETION diff --git a/ethtool.c b/ethtool.c index 021f528..07006b0 100644 --- a/ethtool.c +++ b/ethtool.c @@ -1049,6 +1049,7 @@ static const struct { { "lan78xx", lan78xx_dump_regs }, { "dsa", dsa_dump_regs }, { "fec", fec_dump_regs }, + { "igc", igc_dump_regs }, #endif }; diff --git a/igc.c b/igc.c new file mode 100644 index 0000000..91ab64d --- /dev/null +++ b/igc.c @@ -0,0 +1,62 @@ +/* Copyright (c) 2020 Intel Corporation */ +#include +#include "internal.h" + +#define RAH_RAH 0x0000FFFF +#define RAH_ASEL 0x00010000 +#define RAH_QSEL 0x000C0000 +#define RAH_QSEL_EN 0x10000000 +#define RAH_AV 0x80000000 + +#define RAH_QSEL_SHIFT 18 + +static const char *bit_to_boolean(u32 val) +{ + return val ? "True" : "False"; +} + +int igc_dump_regs(struct ethtool_drvinfo *info, struct ethtool_regs *regs) +{ + u32 reg; + int offset, i; + u32 *regs_buff = (u32 *)regs->data; + u8 version = (u8)(regs->version >> 24); + + if (version != 2) + return -1; + + for (offset = 0; offset < 172; offset++) { + reg = regs_buff[offset]; + printf("%04d: 0x%08X\n", offset, reg); + } + + offset = 172; + + for (i = 0; i < 16; i++) { + reg = regs_buff[offset + i]; + printf("%04d: RAL (Receive Address Low %02d) \n" + " Receive Address Low: %08X\n", + offset + i, i, + reg); + } + + offset = 188; + + for (i = 0; i < 16; i++) { + reg = regs_buff[offset + i]; + printf("%04d: RAH (Receive Address High %02d) \n" + " Receive Address High: %04X\n" + " Address Select: %s\n" + " Queue Select: %d\n" + " Queue Select Enable: %s\n" + " Address Valid: %s\n", + offset + i, i, + reg & RAH_RAH, + reg & RAH_ASEL ? "Source" : "Destination", + (reg & RAH_QSEL) >> RAH_QSEL_SHIFT, + bit_to_boolean(reg & RAH_QSEL_EN), + bit_to_boolean(reg & RAH_AV)); + } + + return 0; +} diff --git a/internal.h b/internal.h index 45b63b7..1c6689a 100644 --- a/internal.h +++ b/internal.h @@ -393,4 +393,7 @@ int dsa_dump_regs(struct ethtool_drvinfo *info, struct ethtool_regs *regs); /* i.MX Fast Ethernet Controller */ int fec_dump_regs(struct ethtool_drvinfo *info, struct ethtool_regs *regs); +/* Intel(R) Ethernet Controller I225-LM/I225-V adapter family */ +int igc_dump_regs(struct ethtool_drvinfo *info, struct ethtool_regs *regs); + #endif /* ETHTOOL_INTERNAL_H__ */ From patchwork Tue Jul 7 23:47:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Guedes X-Patchwork-Id: 1324802 X-Patchwork-Delegate: mkubecek@suse.cz Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4B1fJZ1jTnz9sSt for ; Wed, 8 Jul 2020 09:48:14 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729316AbgGGXsN (ORCPT ); Tue, 7 Jul 2020 19:48:13 -0400 Received: from mga02.intel.com ([134.134.136.20]:15272 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729303AbgGGXsM (ORCPT ); Tue, 7 Jul 2020 19:48:12 -0400 IronPort-SDR: hvfsTiBhFgjl/581wKztW7SBn+/l70CszM5N1FyUs1mX+kvnjaxwOm2s9BtvtOnhqy2KgB3jNv 9r3IBQED9OPA== X-IronPort-AV: E=McAfee;i="6000,8403,9675"; a="135949652" X-IronPort-AV: E=Sophos;i="5.75,325,1589266800"; d="scan'208";a="135949652" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jul 2020 16:48:11 -0700 IronPort-SDR: sgmLYaIfCFC6WOAdNfddBZ2rKjX80v2Qw6vDxNohgW9TdcFbM0DaMsA/uv3a+4a+MxLlphRRVt p8BZ9krIL7Ng== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,325,1589266800"; d="scan'208";a="483684032" Received: from vapadgao-mobl.amr.corp.intel.com ([10.251.143.88]) by fmsmga005.fm.intel.com with ESMTP; 07 Jul 2020 16:48:10 -0700 From: Andre Guedes To: netdev@vger.kernel.org Cc: intel-wired-lan@lists.osuosl.org Subject: [PATCH ethtool 2/4] igc: Parse RCTL register fields Date: Tue, 7 Jul 2020 16:47:58 -0700 Message-Id: <20200707234800.39119-3-andre.guedes@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200707234800.39119-1-andre.guedes@intel.com> References: <20200707234800.39119-1-andre.guedes@intel.com> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This patch adds support for parsing the Receive Control (RCTL) register fields. Signed-off-by: Andre Guedes --- igc.c | 91 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 90 insertions(+), 1 deletion(-) diff --git a/igc.c b/igc.c index 91ab64d..df3916c 100644 --- a/igc.c +++ b/igc.c @@ -7,6 +7,34 @@ #define RAH_QSEL 0x000C0000 #define RAH_QSEL_EN 0x10000000 #define RAH_AV 0x80000000 +#define RCTL_RXEN 0x00000002 +#define RCTL_SBP 0x00000004 +#define RCTL_UPE 0x00000008 +#define RCTL_MPE 0x00000010 +#define RCTL_LPE 0x00000020 +#define RCTL_LBM 0x000000C0 +#define RCTL_LBM_PHY 0x00000000 +#define RCTL_LBM_MAC 0x00000040 +#define RCTL_HSEL 0x00000300 +#define RCTL_HSEL_MULTICAST 0x00000000 +#define RCTL_HSEL_UNICAST 0x00000100 +#define RCTL_HSEL_BOTH 0x00000200 +#define RCTL_MO 0x00003000 +#define RCTL_MO_47_36 0x00000000 +#define RCTL_MO_43_32 0x00001000 +#define RCTL_MO_39_28 0x00002000 +#define RCTL_BAM 0x00008000 +#define RCTL_BSIZE 0x00030000 +#define RCTL_BSIZE_2048 0x00000000 +#define RCTL_BSIZE_1024 0x00010000 +#define RCTL_BSIZE_512 0x00020000 +#define RCTL_VFE 0x00040000 +#define RCTL_CFIEN 0x00080000 +#define RCTL_CFI 0x00100000 +#define RCTL_PSP 0x00200000 +#define RCTL_DPF 0x00400000 +#define RCTL_PMCF 0x00800000 +#define RCTL_SECRC 0x04000000 #define RAH_QSEL_SHIFT 18 @@ -15,6 +43,11 @@ static const char *bit_to_boolean(u32 val) return val ? "True" : "False"; } +static const char *bit_to_enable(u32 val) +{ + return val ? "Enabled" : "Disabled"; +} + int igc_dump_regs(struct ethtool_drvinfo *info, struct ethtool_regs *regs) { u32 reg; @@ -25,7 +58,63 @@ int igc_dump_regs(struct ethtool_drvinfo *info, struct ethtool_regs *regs) if (version != 2) return -1; - for (offset = 0; offset < 172; offset++) { + for (offset = 0; offset < 24; offset++) { + reg = regs_buff[offset]; + printf("%04d: 0x%08X\n", offset, reg); + } + + offset = 24; + + reg = regs_buff[offset]; + printf("%04d: RCTL (Receive Control Register) \n" + " Receiver: %s\n" + " Stop Bad Packets: %s\n" + " Unicast Promiscuous: %s\n" + " Multicast Promiscuous: %s\n" + " Long Packet Reception: %s\n" + " Loopback Model: %s\n" + " Hash Select for MTA: %s\n" + " Multicast/Unicast Table Offset: %s\n" + " Broadcast Accept Mode: %s\n" + " Receive Buffer Size: %s\n" + " VLAN Filter: %s\n" + " Canonical Form Indicator: %s\n" + " Canonical Form Indicator Bit: %s\n" + " Pad Small Receive Packets: %s\n" + " Discard Pause Frames: %s\n" + " Pass MAC Control Frames: %s\n" + " Strip Ethernet CRC: %s\n", + offset, + bit_to_enable(reg & RCTL_RXEN), + bit_to_enable(reg & RCTL_SBP), + bit_to_enable(reg & RCTL_UPE), + bit_to_enable(reg & RCTL_MPE), + bit_to_enable(reg & RCTL_LPE), + (reg & RCTL_LBM) == RCTL_LBM_PHY ? "PHY" : + (reg & RCTL_LBM) == RCTL_LBM_MAC ? "MAC" : + "Undefined", + (reg & RCTL_HSEL) == RCTL_HSEL_MULTICAST ? "Multicast Only" : + (reg & RCTL_HSEL) == RCTL_HSEL_UNICAST ? "Unicast Only" : + (reg & RCTL_HSEL) == RCTL_HSEL_BOTH ? "Multicast and Unicast" : + "Reserved", + (reg & RCTL_MO) == RCTL_MO_47_36 ? "Bits [47:36]" : + (reg & RCTL_MO) == RCTL_MO_43_32 ? "Bits [43:32]" : + (reg & RCTL_MO) == RCTL_MO_39_28 ? "Bits [39:28]" : + "Bits [35:24]", + bit_to_enable(reg & RCTL_BAM), + (reg & RCTL_BSIZE) == RCTL_BSIZE_2048 ? "2048 Bytes" : + (reg & RCTL_BSIZE) == RCTL_BSIZE_1024 ? "1024 Bytes" : + (reg & RCTL_BSIZE) == RCTL_BSIZE_512 ? "512 Bytes" : + "256 Bytes", + bit_to_enable(reg & RCTL_VFE), + bit_to_enable(reg & RCTL_CFIEN), + reg & RCTL_CFI ? "Discarded" : "Accepted", + bit_to_enable(reg & RCTL_PSP), + bit_to_enable(reg & RCTL_DPF), + bit_to_enable(reg & RCTL_PMCF), + bit_to_enable(reg & RCTL_SECRC)); + + for (offset = 25; offset < 172; offset++) { reg = regs_buff[offset]; printf("%04d: 0x%08X\n", offset, reg); } From patchwork Tue Jul 7 23:47:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Guedes X-Patchwork-Id: 1324806 X-Patchwork-Delegate: mkubecek@suse.cz Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4B1fJd5R8Yz9sTF for ; Wed, 8 Jul 2020 09:48:17 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729340AbgGGXsP (ORCPT ); Tue, 7 Jul 2020 19:48:15 -0400 Received: from mga02.intel.com ([134.134.136.20]:15272 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728530AbgGGXsM (ORCPT ); Tue, 7 Jul 2020 19:48:12 -0400 IronPort-SDR: r4M+4Ws3aWWywPzlbdtYMEBoZ7t6IM4eLEyZB3KxNxHkpCYSFvK5JBstUroIXy+/iR4GhYi1k+ 8B7UOwyiniCw== X-IronPort-AV: E=McAfee;i="6000,8403,9675"; a="135949653" X-IronPort-AV: E=Sophos;i="5.75,325,1589266800"; d="scan'208";a="135949653" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jul 2020 16:48:11 -0700 IronPort-SDR: uVZjgI3z7DtQELu9pzkNJbsuInctAZ0JcMRe4CHocnmVHhBmK16CGlLxEIhAsowlLlcdZLoDVb nrmCNCSIr88g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,325,1589266800"; d="scan'208";a="483684034" Received: from vapadgao-mobl.amr.corp.intel.com ([10.251.143.88]) by fmsmga005.fm.intel.com with ESMTP; 07 Jul 2020 16:48:11 -0700 From: Andre Guedes To: netdev@vger.kernel.org Cc: intel-wired-lan@lists.osuosl.org Subject: [PATCH ethtool 3/4] igc: Parse VLANPQF register fields Date: Tue, 7 Jul 2020 16:47:59 -0700 Message-Id: <20200707234800.39119-4-andre.guedes@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200707234800.39119-1-andre.guedes@intel.com> References: <20200707234800.39119-1-andre.guedes@intel.com> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This patch adds support for parsing the VLAN Priority Queue Filter (VLANPQF) register fields. Signed-off-by: Andre Guedes --- igc.c | 98 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 98 insertions(+) diff --git a/igc.c b/igc.c index df3916c..6a2e06d 100644 --- a/igc.c +++ b/igc.c @@ -35,8 +35,39 @@ #define RCTL_DPF 0x00400000 #define RCTL_PMCF 0x00800000 #define RCTL_SECRC 0x04000000 +#define VLANPQF_VP0QSEL 0x00000003 +#define VLANPQF_VP0PBSEL 0x00000004 +#define VLANPQF_VLANP0V 0x00000008 +#define VLANPQF_VP1QSEL 0x00000030 +#define VLANPQF_VP1PBSEL 0x00000040 +#define VLANPQF_VLANP1V 0x00000080 +#define VLANPQF_VP2QSEL 0x00000300 +#define VLANPQF_VP2PBSEL 0x00000400 +#define VLANPQF_VLANP2V 0x00000800 +#define VLANPQF_VP3QSEL 0x00003000 +#define VLANPQF_VP3PBSEL 0x00004000 +#define VLANPQF_VLANP3V 0x00008000 +#define VLANPQF_VP4QSEL 0x00030000 +#define VLANPQF_VP4PBSEL 0x00040000 +#define VLANPQF_VLANP4V 0x00080000 +#define VLANPQF_VP5QSEL 0x00300000 +#define VLANPQF_VP5PBSEL 0x00400000 +#define VLANPQF_VLANP5V 0x00800000 +#define VLANPQF_VP6QSEL 0x03000000 +#define VLANPQF_VP6PBSEL 0x04000000 +#define VLANPQF_VLANP6V 0x08000000 +#define VLANPQF_VP7QSEL 0x30000000 +#define VLANPQF_VP7PBSEL 0x40000000 +#define VLANPQF_VLANP7V 0x80000000 #define RAH_QSEL_SHIFT 18 +#define VLANPQF_VP1QSEL_SHIFT 4 +#define VLANPQF_VP2QSEL_SHIFT 8 +#define VLANPQF_VP3QSEL_SHIFT 12 +#define VLANPQF_VP4QSEL_SHIFT 16 +#define VLANPQF_VP5QSEL_SHIFT 20 +#define VLANPQF_VP6QSEL_SHIFT 24 +#define VLANPQF_VP7QSEL_SHIFT 28 static const char *bit_to_boolean(u32 val) { @@ -48,6 +79,11 @@ static const char *bit_to_enable(u32 val) return val ? "Enabled" : "Disabled"; } +static const char *bit_to_prio(u32 val) +{ + return val ? "Low" : "High"; +} + int igc_dump_regs(struct ethtool_drvinfo *info, struct ethtool_regs *regs) { u32 reg; @@ -147,5 +183,67 @@ int igc_dump_regs(struct ethtool_drvinfo *info, struct ethtool_regs *regs) bit_to_boolean(reg & RAH_AV)); } + offset = 204; + + reg = regs_buff[offset]; + printf("%04d: VLANPQF (VLAN Priority Queue Filter) \n" + " Priority 0 \n" + " Queue: %d\n" + " Packet Buffer: %s\n" + " Valid: %s\n" + " Priority 1 \n" + " Queue: %d\n" + " Packet Buffer: %s\n" + " Valid: %s\n" + " Priority 2 \n" + " Queue: %d\n" + " Packet Buffer: %s\n" + " Valid: %s\n" + " Priority 3 \n" + " Queue: %d\n" + " Packet Buffer: %s\n" + " Valid: %s\n" + " Priority 4 \n" + " Queue: %d\n" + " Packet Buffer: %s\n" + " Valid: %s\n" + " Priority 5 \n" + " Queue: %d\n" + " Packet Buffer: %s\n" + " Valid: %s\n" + " Priority 6 \n" + " Queue: %d\n" + " Packet Buffer: %s\n" + " Valid: %s\n" + " Priority 7 \n" + " Queue: %d\n" + " Packet Buffer: %s\n" + " Valid: %s\n", + offset, + reg & VLANPQF_VP0QSEL, + bit_to_prio(reg & VLANPQF_VP0PBSEL), + bit_to_boolean(reg & VLANPQF_VLANP0V), + (reg & VLANPQF_VP1QSEL) >> VLANPQF_VP1QSEL_SHIFT, + bit_to_prio(reg & VLANPQF_VP1PBSEL), + bit_to_boolean(reg & VLANPQF_VLANP1V), + (reg & VLANPQF_VP2QSEL) >> VLANPQF_VP2QSEL_SHIFT, + bit_to_prio(reg & VLANPQF_VP2PBSEL), + bit_to_boolean(reg & VLANPQF_VLANP2V), + (reg & VLANPQF_VP3QSEL) >> VLANPQF_VP3QSEL_SHIFT, + bit_to_prio(reg & VLANPQF_VP3PBSEL), + bit_to_boolean(reg & VLANPQF_VLANP3V), + (reg & VLANPQF_VP4QSEL) >> VLANPQF_VP4QSEL_SHIFT, + bit_to_prio(reg & VLANPQF_VP4PBSEL), + bit_to_boolean(reg & VLANPQF_VLANP4V), + (reg & VLANPQF_VP5QSEL) >> VLANPQF_VP5QSEL_SHIFT, + bit_to_prio(reg & VLANPQF_VP5PBSEL), + bit_to_boolean(reg & VLANPQF_VLANP5V), + (reg & VLANPQF_VP6QSEL) >> VLANPQF_VP6QSEL_SHIFT, + bit_to_prio(reg & VLANPQF_VP6PBSEL), + bit_to_boolean(reg & VLANPQF_VLANP6V), + (reg & VLANPQF_VP7QSEL) >> VLANPQF_VP7QSEL_SHIFT, + bit_to_prio(reg & VLANPQF_VP7PBSEL), + bit_to_boolean(reg & VLANPQF_VLANP7V)); + return 0; } From patchwork Tue Jul 7 23:48:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Guedes X-Patchwork-Id: 1324804 X-Patchwork-Delegate: mkubecek@suse.cz Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4B1fJc4kglz9sT6 for ; Wed, 8 Jul 2020 09:48:16 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729346AbgGGXsP (ORCPT ); Tue, 7 Jul 2020 19:48:15 -0400 Received: from mga02.intel.com ([134.134.136.20]:15281 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729309AbgGGXsM (ORCPT ); Tue, 7 Jul 2020 19:48:12 -0400 IronPort-SDR: cIeNudbkiVx8SzrA49i/mUkAruk0jl2fNwpsXf0VMgokT7UVplVLpxd6ie7IMk9tfKvbzpk4qw LjOOuSFBcPLg== X-IronPort-AV: E=McAfee;i="6000,8403,9675"; a="135949654" X-IronPort-AV: E=Sophos;i="5.75,325,1589266800"; d="scan'208";a="135949654" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jul 2020 16:48:11 -0700 IronPort-SDR: 2BLrbMYMrN2XU1vBf/zl78CliZqYmYrShYOlrBfH/0HX4H//uRPDSqSCZUxN89yQnnCkqf4PDl sfAxLJI6NuAg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,325,1589266800"; d="scan'208";a="483684036" Received: from vapadgao-mobl.amr.corp.intel.com ([10.251.143.88]) by fmsmga005.fm.intel.com with ESMTP; 07 Jul 2020 16:48:11 -0700 From: Andre Guedes To: netdev@vger.kernel.org Cc: intel-wired-lan@lists.osuosl.org Subject: [PATCH ethtool 4/4] igc: Parse ETQF registers Date: Tue, 7 Jul 2020 16:48:00 -0700 Message-Id: <20200707234800.39119-5-andre.guedes@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200707234800.39119-1-andre.guedes@intel.com> References: <20200707234800.39119-1-andre.guedes@intel.com> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This patch adds support for parsing the EType Queue Filter (ETQF) registers fields. Signed-off-by: Andre Guedes --- igc.c | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/igc.c b/igc.c index 6a2e06d..9c0a750 100644 --- a/igc.c +++ b/igc.c @@ -59,6 +59,14 @@ #define VLANPQF_VP7QSEL 0x30000000 #define VLANPQF_VP7PBSEL 0x40000000 #define VLANPQF_VLANP7V 0x80000000 +#define ETQF_ETYPE 0x0000FFFF +#define ETQF_QUEUE 0x00070000 +#define ETQF_ETYPE_LEN 0x01F00000 +#define ETQF_ETYPE_LEN_EN 0x02000000 +#define ETQF_FILTER_EN 0x04000000 +#define ETQF_IMMEDIATE_INTR 0x20000000 +#define ETQF_1588_TIMESTAMP 0x40000000 +#define ETQF_QUEUE_EN 0x80000000 #define RAH_QSEL_SHIFT 18 #define VLANPQF_VP1QSEL_SHIFT 4 @@ -68,6 +76,8 @@ #define VLANPQF_VP5QSEL_SHIFT 20 #define VLANPQF_VP6QSEL_SHIFT 24 #define VLANPQF_VP7QSEL_SHIFT 28 +#define ETQF_QUEUE_SHIFT 16 +#define ETQF_ETYPE_LEN_SHIFT 20 static const char *bit_to_boolean(u32 val) { @@ -245,5 +255,29 @@ int igc_dump_regs(struct ethtool_drvinfo *info, struct ethtool_regs *regs) bit_to_prio(reg & VLANPQF_VP7PBSEL), bit_to_boolean(reg & VLANPQF_VLANP7V)); + offset = 205; + + for (i = 0; i < 8; i++) { + reg = regs_buff[offset + i]; + printf("%04d: ETQF (EType Queue Filter %d) \n" + " EType: %04X\n" + " EType Length: %d\n" + " EType Length Enable: %s\n" + " Queue: %d\n" + " Queue Enable: %s\n" + " Immediate Interrupt: %s\n" + " 1588 Time Stamp: %s\n" + " Filter Enable: %s\n", + offset + i, i, + reg & ETQF_ETYPE, + (reg & ETQF_ETYPE_LEN) >> ETQF_ETYPE_LEN_SHIFT, + bit_to_boolean(reg & ETQF_ETYPE_LEN_EN), + (reg & ETQF_QUEUE) >> ETQF_QUEUE_SHIFT, + bit_to_boolean(reg & ETQF_QUEUE_EN), + bit_to_enable(reg & ETQF_IMMEDIATE_INTR), + bit_to_enable(reg & ETQF_1588_TIMESTAMP), + bit_to_boolean(reg & ETQF_FILTER_EN)); + } + return 0; }