From patchwork Sun Jul 5 23:20:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hans-Peter Nilsson X-Patchwork-Id: 1323178 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=gcc.gnu.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=hIeo1d4e; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4B0PnM1Xszz9sQt for ; Mon, 6 Jul 2020 09:20:21 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 52C673857009; Sun, 5 Jul 2020 23:20:18 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 52C673857009 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1593991218; bh=Z0EL/xiMCABTgXvtF4rGY5DnKUitehNMxcShbPwD0oM=; h=Date:To:Subject:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=hIeo1d4emgJE28zvSCYAbcdOPMLBDir40Zsifx9eBeNhePBn+bbqRetbdNKH9g3fB T71d5ZDU8kyhTgiApTEcuKjP4e2FfkIlw2UZ5A5lguZJ4ie0DF4niEIMei574Yhy4B k7UdhE7AHZ+ZLD0BB7JaBylfU8O6fOzhp6ZeH2+U= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from smtp1.axis.com (smtp1.axis.com [195.60.68.17]) by sourceware.org (Postfix) with ESMTPS id 897173858D35 for ; Sun, 5 Jul 2020 23:20:14 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 897173858D35 IronPort-SDR: EThHPFU+VYlhtG93qU6RPkBQZEGkYJgprk0sgKWt+e+zdQ6GVrN5vSoLbJdtZ7DBOlWSO5a0ld Mb4qNZVcCPtUoSRZyVoI5lctviD0jzrmV2Mzu0/tHqdEkEON3B+bHFO3k8mKZU14hqlNiwsCmT S0EX95p+br6krb+nR3JiGCQDiRQqdGXNF9OyPKOz8ncMchx506PmTCi5MmbPdhBgHgfL1XMDlb 1Zhn8EnepZu750C0sIktuNcqsvjcdgVcvwHyHmZ9CjpMAHC2/AW26+WAs8z5taIRrGWHejqSuN 1gc= X-IronPort-AV: E=Sophos;i="5.75,317,1589234400"; d="scan'208";a="10501907" Date: Mon, 6 Jul 2020 01:20:12 +0200 Message-ID: <202007052320.065NKCii029766@ignucius.se.axis.com> To: Subject: committed: cris.md: Reinstate add/sub with extend MIME-Version: 1.0 X-Spam-Status: No, score=-5.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, MEDICAL_SUBJECT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Hans-Peter Nilsson via Gcc-patches From: Hans-Peter Nilsson Reply-To: Hans-Peter Nilsson Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" When cleaning out the multitude of patterns with unknown coverage, this one went the way of the bathwater. It's use is barely common enough to mark when diffing libgcc, and has a minimal impact on performance-testsuites. Anyway, reinstated with a couple of test-cases. It's suboptimal of gcc-core not to make use of the SImode pattern when performing HImode; see the FIXME (which is actually also reinstated). This version uses match_operator, for continuity but will be replaced with a version making use of iterators (like it does for the mode). gcc: * config/cris/cris.md ("*extopqihi", "*extopsi_swap") ("*extopsi", "*addxqihi_swap"): Reinstate. gcc/testsuite: * gcc.target/cris/pr93372-36.c, gcc.target/cris/pr93372-37.c, gcc.target/cris/pr93372-38.c: New tests. --- gcc/config/cris/cris.md | 83 ++++++++++++++++++++++++++++++ gcc/testsuite/gcc.target/cris/pr93372-36.c | 37 +++++++++++++ gcc/testsuite/gcc.target/cris/pr93372-37.c | 26 ++++++++++ gcc/testsuite/gcc.target/cris/pr93372-38.c | 30 +++++++++++ 4 files changed, 176 insertions(+) create mode 100644 gcc/testsuite/gcc.target/cris/pr93372-36.c create mode 100644 gcc/testsuite/gcc.target/cris/pr93372-37.c create mode 100644 gcc/testsuite/gcc.target/cris/pr93372-38.c diff --git a/gcc/config/cris/cris.md b/gcc/config/cris/cris.md index 081041fa245..e700819d510 100644 --- a/gcc/config/cris/cris.md +++ b/gcc/config/cris/cris.md @@ -1108,6 +1108,89 @@ (define_insn "*sub3" [(set_attr "slottable" "yes,yes,yes,yes,no,no") (set_attr "cc" "normal,normal,clobber,clobber,normal,normal")]) +;; Extend versions (zero/sign) of normal add/sub (no side-effects). + +;; QImode to HImode +;; FIXME: GCC should widen. + +(define_insn "*extopqihi" + [(set (match_operand:HI 0 "register_operand" "=r,r,r,r") + (match_operator:HI + 3 "cris_additive_operand_extend_operator" + [(match_operand:HI 1 "register_operand" "0,0,0,r") + (match_operator:HI + 4 "cris_extend_operator" + [(match_operand:QI 2 "nonimmediate_operand" "r,Q>,m,!To")])])) + (clobber (reg:CC CRIS_CC0_REGNUM))] + "GET_MODE_SIZE (GET_MODE (operands[0])) <= UNITS_PER_WORD + && (operands[1] != frame_pointer_rtx || GET_CODE (operands[3]) != PLUS)" + "@ + %x3%E4.%m4 %2,%0 + %x3%E4.%m4 %2,%0 + %x3%E4.%m4 %2,%0 + %x3%E4.%m4 %2,%1,%0" + [(set_attr "slottable" "yes,yes,no,no") + (set_attr "cc" "clobber")]) + +(define_insn "*extopsi" + [(set (match_operand:SI 0 "register_operand" "=r,r,r,r") + (match_operator:SI + 3 "cris_operand_extend_operator" + [(match_operand:SI 1 "register_operand" "0,0,0,r") + (match_operator:SI + 4 "cris_extend_operator" + [(match_operand:BW 2 "nonimmediate_operand" "r,Q>,m,!To")])])) + (clobber (reg:CC CRIS_CC0_REGNUM))] + "(GET_CODE (operands[3]) != UMIN || GET_CODE (operands[4]) == ZERO_EXTEND) + && GET_MODE_SIZE (GET_MODE (operands[0])) <= UNITS_PER_WORD + && (operands[1] != frame_pointer_rtx || GET_CODE (operands[3]) != PLUS)" + "@ + %x3%E4 %2,%0 + %x3%E4 %2,%0 + %x3%E4 %2,%0 + %x3%E4 %2,%1,%0" + [(set_attr "slottable" "yes,yes,no,no")]) + +;; We may have swapped operands for add or bound. +;; For commutative operands, these are the canonical forms. + +;; QImode to HImode + +(define_insn "*addxqihi_swap" + [(set (match_operand:HI 0 "register_operand" "=r,r,r,r") + (plus:HI + (match_operator:HI + 3 "cris_extend_operator" + [(match_operand:QI 2 "nonimmediate_operand" "r,Q>,m,!To")]) + (match_operand:HI 1 "register_operand" "0,0,0,r"))) + (clobber (reg:CC CRIS_CC0_REGNUM))] + "operands[1] != frame_pointer_rtx" + "@ + add%e3.b %2,%0 + add%e3.b %2,%0 + add%e3.b %2,%0 + add%e3.b %2,%1,%0" + [(set_attr "slottable" "yes,yes,no,no") + (set_attr "cc" "clobber")]) + +(define_insn "*extopsi_swap" + [(set (match_operand:SI 0 "register_operand" "=r,r,r,r") + (match_operator:SI + 4 "cris_plus_or_bound_operator" + [(match_operator:SI + 3 "cris_extend_operator" + [(match_operand:BW 2 "nonimmediate_operand" "r,Q>,m,!To")]) + (match_operand:SI 1 "register_operand" "0,0,0,r")])) + (clobber (reg:CC CRIS_CC0_REGNUM))] + "(GET_CODE (operands[4]) != UMIN || GET_CODE (operands[3]) == ZERO_EXTEND) + && operands[1] != frame_pointer_rtx" + "@ + %x4%E3 %2,%0 + %x4%E3 %2,%0 + %x4%E3 %2,%0 + %x4%E3 %2,%1,%0" + [(set_attr "slottable" "yes,yes,no,no")]) + ;; This is the special case when we use what corresponds to the ;; instruction above in "casesi". Do *not* change it to use the generic ;; pattern and "REG 15" as pc; I did that and it led to madness and diff --git a/gcc/testsuite/gcc.target/cris/pr93372-36.c b/gcc/testsuite/gcc.target/cris/pr93372-36.c new file mode 100644 index 00000000000..84fbdb7091d --- /dev/null +++ b/gcc/testsuite/gcc.target/cris/pr93372-36.c @@ -0,0 +1,37 @@ +/* Check that we produce sign- and zero-extended additions and + subtractions, and that no (eliminable) test- or compare-instructions + are used. */ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ +/* { dg-final { scan-assembler-not {\tcmp|\ttest|\tsub\.|\tadd\.|\tmovs} } } */ +/* { dg-final { scan-assembler "\tadds" } } */ +/* { dg-final { scan-assembler "\tsubs" } } */ + +#ifndef t +#define t signed char +#define s _sc +#endif + +#ifndef t2 +#define t2 int +#endif + +#ifndef f +#define f0(a, s) a ## s +#define f(a, s) f0(a, s) +#endif + +extern void g(int); + +t2 f(a, s) (t2 a, t *b, int *c) +{ + t2 d = a + *b; + *c = d == 0; + return d; +} +t2 f(b, s) (t2 a, t *b, int *c) +{ + t2 d = a - *b; + *c = d == 0; + return d; +} diff --git a/gcc/testsuite/gcc.target/cris/pr93372-37.c b/gcc/testsuite/gcc.target/cris/pr93372-37.c new file mode 100644 index 00000000000..0c43d77fc72 --- /dev/null +++ b/gcc/testsuite/gcc.target/cris/pr93372-37.c @@ -0,0 +1,26 @@ +/* Check that we produce sign- and zero-extended additions and + subtractions, and that no (eliminable) test- or compare-instructions + are used. */ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ +/* { dg-final { scan-assembler-not {\tcmp|\ttest|\tsub\.|\tadd\.|\tmovu|\tmovs} } } */ +/* { dg-final { scan-assembler-times "\tadds" 1 } } */ +/* { dg-final { scan-assembler-times "\tsubs" 1 } } */ +/* { dg-final { scan-assembler-times "\taddu" 2 } } */ +/* { dg-final { scan-assembler-times "\tsubu" 2 } } */ + +#define t unsigned char +#define s _uc +#include "pr93372-36.c" + +#undef t +#undef s +#define t signed short int +#define s _ss +#include "pr93372-36.c" + +#undef t +#undef s +#define t unsigned short int +#define s _us +#include "pr93372-36.c" diff --git a/gcc/testsuite/gcc.target/cris/pr93372-38.c b/gcc/testsuite/gcc.target/cris/pr93372-38.c new file mode 100644 index 00000000000..c7cba3b4f15 --- /dev/null +++ b/gcc/testsuite/gcc.target/cris/pr93372-38.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ +/* { dg-final { scan-assembler-not {\tcmp|\tsub\.|\tadd\.|\tmovu|\tmovs} } } */ +/* { dg-final { scan-assembler-times "\ttest\.w" 4 } } */ +/* { dg-final { scan-assembler-times "\tadds" 1 } } */ +/* { dg-final { scan-assembler-times "\tsubs" 1 } } */ +/* { dg-final { scan-assembler-times "\taddu" 1 } } */ +/* { dg-final { scan-assembler-times "\tsubu" 1 } } */ + +/* Check that we produce sign- and zero-extended additions and + subtractions, also for 8-bit to 16-bit results. Note that we can't + eliminate compare insns, as the condition codes reflect the 32-bit + result. + This test-case is brittle, as with the presence of compare + instructions, there are several optimal instruction sequence, some of + which match the non-matcher patterns and do not contain the matching + patterns. */ + +#define t unsigned char +#define t2 unsigned short +#define s _us +#include "pr93372-36.c" + +#undef t +#undef s +#undef t2 +#define t signed char +#define t2 signed short +#define s _ss +#include "pr93372-36.c"