From patchwork Tue Jun 23 02:50:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 1314854 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=suse.de Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 49rW7b5wdwz9sSF for ; Tue, 23 Jun 2020 12:53:47 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731848AbgFWCvc (ORCPT ); Mon, 22 Jun 2020 22:51:32 -0400 Received: from mx2.suse.de ([195.135.220.15]:32924 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731842AbgFWCvc (ORCPT ); Mon, 22 Jun 2020 22:51:32 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 6AA9FAE35; Tue, 23 Jun 2020 02:51:29 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?b?SmFtZXMgVGFpIFvmiLTlv5fls7Bd?= , =?utf-8?b?U3RhbmxleSBDaGFuZyBb5piM6IKy5b63XQ==?= , Edgar Lee , =?utf-8?q?An?= =?utf-8?q?dreas_F=C3=A4rber?= , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v2 01/29] dt-bindings: soc: Add Realtek RTD1195 chip info binding Date: Tue, 23 Jun 2020 04:50:38 +0200 Message-Id: <20200623025106.31273-2-afaerber@suse.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200623025106.31273-1-afaerber@suse.de> References: <20200623025106.31273-1-afaerber@suse.de> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Define a binding for RTD1195 and later DHC SoCs' chip info registers. Add the new directory to MAINTAINERS. Signed-off-by: Andreas Färber Reviewed-by: Rob Herring --- Note: The binding gets extended compatibly twice with additional properties. Could be squashed later if approved. v1 -> v2: * Dropped quotes for compatible (Rob) * Added additionalProperties: false (Rob) .../soc/realtek/realtek,rtd1195-chip.yaml | 34 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 35 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/realtek/realtek,rtd1195-chip.yaml diff --git a/Documentation/devicetree/bindings/soc/realtek/realtek,rtd1195-chip.yaml b/Documentation/devicetree/bindings/soc/realtek/realtek,rtd1195-chip.yaml new file mode 100644 index 000000000000..86a1de214782 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/realtek/realtek,rtd1195-chip.yaml @@ -0,0 +1,34 @@ +# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/soc/realtek/realtek,rtd1195-chip.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Realtek Digital Home Center chip identification + +maintainers: + - Andreas Färber + +description: | + The Realtek DHC SoCs have some registers to identify the chip and revision. + +properties: + compatible: + const: realtek,rtd1195-chip + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + chip-info@1801a200 { + compatible = "realtek,rtd1195-chip"; + reg = <0x1801a200 0x8>; + }; +... diff --git a/MAINTAINERS b/MAINTAINERS index d282ee3492e0..78adbc3cc101 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2307,6 +2307,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) L: linux-realtek-soc@lists.infradead.org (moderated for non-subscribers) S: Maintained F: Documentation/devicetree/bindings/arm/realtek.yaml +F: Documentation/devicetree/bindings/soc/realtek/ F: arch/arm/boot/dts/rtd* F: arch/arm/mach-realtek/ F: arch/arm64/boot/dts/realtek/ From patchwork Tue Jun 23 02:50:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 1314848 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=suse.de Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 49rW551QVTz9sPF for ; Tue, 23 Jun 2020 12:51:37 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731892AbgFWCvf (ORCPT ); Mon, 22 Jun 2020 22:51:35 -0400 Received: from mx2.suse.de ([195.135.220.15]:33024 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731858AbgFWCve (ORCPT ); Mon, 22 Jun 2020 22:51:34 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id C6987AE70; Tue, 23 Jun 2020 02:51:31 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?b?SmFtZXMgVGFpIFvmiLTlv5fls7Bd?= , =?utf-8?b?U3RhbmxleSBDaGFuZyBb5piM6IKy5b63XQ==?= , Edgar Lee , =?utf-8?q?An?= =?utf-8?q?dreas_F=C3=A4rber?= , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v2 05/29] dt-bindings: soc: realtek: rtd1195-chip: Add iso-syscon property Date: Tue, 23 Jun 2020 04:50:42 +0200 Message-Id: <20200623025106.31273-6-afaerber@suse.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200623025106.31273-1-afaerber@suse.de> References: <20200623025106.31273-1-afaerber@suse.de> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Allow to optionally specify a phandle to iso syscon to identify the chip. RTD1295 family will want to check the ISO_CHIP_INFO1 register. Signed-off-by: Andreas Färber --- A SoC specific binding would defeat the purpose of the generic Linux driver detecting the SoC based on registers. Simply allowing it all for SoC families seems the most flexible. v1 -> v2: * Instead of extending reg, allow optional iso-syscon property for RTD129x. Iso syscon currently does not have a compatible, and it may need to differ across SoC families. .../bindings/soc/realtek/realtek,rtd1195-chip.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/soc/realtek/realtek,rtd1195-chip.yaml b/Documentation/devicetree/bindings/soc/realtek/realtek,rtd1195-chip.yaml index 86a1de214782..dfe33c95f68d 100644 --- a/Documentation/devicetree/bindings/soc/realtek/realtek,rtd1195-chip.yaml +++ b/Documentation/devicetree/bindings/soc/realtek/realtek,rtd1195-chip.yaml @@ -11,6 +11,7 @@ maintainers: description: | The Realtek DHC SoCs have some registers to identify the chip and revision. + To identify the exact model within a family, further registers are needed. properties: compatible: @@ -19,6 +20,8 @@ properties: reg: maxItems: 1 + iso-syscon: true + required: - compatible - reg @@ -31,4 +34,10 @@ examples: compatible = "realtek,rtd1195-chip"; reg = <0x1801a200 0x8>; }; + - | + chip-info@9801a200 { + compatible = "realtek,rtd1195-chip"; + reg = <0x9801a200 0x8>; + iso-syscon = <&iso>; + }; ... From patchwork Tue Jun 23 02:50:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 1314849 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=suse.de Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 49rW5B6QbFz9sRf for ; Tue, 23 Jun 2020 12:51:42 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731956AbgFWCvl (ORCPT ); Mon, 22 Jun 2020 22:51:41 -0400 Received: from mx2.suse.de ([195.135.220.15]:33040 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731917AbgFWCvj (ORCPT ); Mon, 22 Jun 2020 22:51:39 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 4D6B6B199; Tue, 23 Jun 2020 02:51:37 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?b?SmFtZXMgVGFpIFvmiLTlv5fls7Bd?= , =?utf-8?b?U3RhbmxleSBDaGFuZyBb5piM6IKy5b63XQ==?= , Edgar Lee , =?utf-8?q?An?= =?utf-8?q?dreas_F=C3=A4rber?= , Srinivas Kandagatla , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v2 17/29] dt-bindings: nvmem: Add Realtek RTD1195 eFuse Date: Tue, 23 Jun 2020 04:50:54 +0200 Message-Id: <20200623025106.31273-18-afaerber@suse.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200623025106.31273-1-afaerber@suse.de> References: <20200623025106.31273-1-afaerber@suse.de> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a DT binding for eFuse on Realtek Digital Home Center SoCs. Signed-off-by: Andreas Färber Reviewed-by: Rob Herring --- v2: New .../bindings/nvmem/realtek,rtd1195-efuse.yaml | 53 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 54 insertions(+) create mode 100644 Documentation/devicetree/bindings/nvmem/realtek,rtd1195-efuse.yaml diff --git a/Documentation/devicetree/bindings/nvmem/realtek,rtd1195-efuse.yaml b/Documentation/devicetree/bindings/nvmem/realtek,rtd1195-efuse.yaml new file mode 100644 index 000000000000..a616cb22673e --- /dev/null +++ b/Documentation/devicetree/bindings/nvmem/realtek,rtd1195-efuse.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/nvmem/realtek,rtd1195-efuse.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Realtek Digital Home Center eFuse + +maintainers: + - Andreas Färber + +description: | + The Realtek DHC SoCs have an eFuse block with non-volatile OTP memory. + +allOf: + - $ref: "nvmem.yaml#" + +properties: + compatible: + const: realtek,rtd1195-efuse + + reg: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + +required: + - compatible + - reg + +examples: + - | + efuse@18017000 { + compatible = "realtek,rtd1195-efuse"; + reg = <0x18017000 0x400>; + }; + - | + efuse@98017000 { + compatible = "realtek,rtd1195-efuse"; + reg = <0x98017000 0x400>; + #address-cells = <1>; + #size-cells = <1>; + + efuse_package_id: package-id@1d8 { + reg = <0x1d8 0x1>; + bits = <0 2>; + }; + }; +... diff --git a/MAINTAINERS b/MAINTAINERS index ff0ee48fee6f..1d0d6ab20451 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2307,6 +2307,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) L: linux-realtek-soc@lists.infradead.org (moderated for non-subscribers) S: Maintained F: Documentation/devicetree/bindings/arm/realtek.yaml +F: Documentation/devicetree/bindings/nvmem/realtek,rtd1195-efuse.yaml F: Documentation/devicetree/bindings/soc/realtek/ F: arch/arm/boot/dts/rtd* F: arch/arm/mach-realtek/ From patchwork Tue Jun 23 02:51:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 1314850 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=suse.de Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 49rW5F1MJfz9sTT for ; Tue, 23 Jun 2020 12:51:45 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731982AbgFWCvn (ORCPT ); Mon, 22 Jun 2020 22:51:43 -0400 Received: from mx2.suse.de ([195.135.220.15]:33260 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731964AbgFWCvn (ORCPT ); Mon, 22 Jun 2020 22:51:43 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id DC84FAE89; Tue, 23 Jun 2020 02:51:40 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?b?SmFtZXMgVGFpIFvmiLTlv5fls7Bd?= , =?utf-8?b?U3RhbmxleSBDaGFuZyBb5piM6IKy5b63XQ==?= , Edgar Lee , =?utf-8?q?An?= =?utf-8?q?dreas_F=C3=A4rber?= , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v2 24/29] dt-bindings: soc: realtek: rtd1195-chip: Allow nvmem-cells property Date: Tue, 23 Jun 2020 04:51:01 +0200 Message-Id: <20200623025106.31273-25-afaerber@suse.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200623025106.31273-1-afaerber@suse.de> References: <20200623025106.31273-1-afaerber@suse.de> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Allow to optionally specify nvmem cells to identify the chip. RTD1295 family will want the eFuse package_id cell. Signed-off-by: Andreas Färber Reviewed-by: Rob Herring --- v1 -> v2: * Instead of extending reg, allow nvmem-cells reference for eFuse .../bindings/soc/realtek/realtek,rtd1195-chip.yaml | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/soc/realtek/realtek,rtd1195-chip.yaml b/Documentation/devicetree/bindings/soc/realtek/realtek,rtd1195-chip.yaml index dfe33c95f68d..57a6e0df4494 100644 --- a/Documentation/devicetree/bindings/soc/realtek/realtek,rtd1195-chip.yaml +++ b/Documentation/devicetree/bindings/soc/realtek/realtek,rtd1195-chip.yaml @@ -22,6 +22,10 @@ properties: iso-syscon: true + nvmem-cells: true + + nvmem-cell-names: true + required: - compatible - reg @@ -40,4 +44,12 @@ examples: reg = <0x9801a200 0x8>; iso-syscon = <&iso>; }; + - | + chip-info@9801a200 { + compatible = "realtek,rtd1195-chip"; + reg = <0x9801a200 0x8>; + iso-syscon = <&iso>; + nvmem-cells = <&efuse_package_id>; + nvmem-cell-names = "efuse_package_id"; + }; ...