From patchwork Wed Jun 17 08:31:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 1311042 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=wW9w/T0W; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 49mywN3Ppgz9sSS for ; Wed, 17 Jun 2020 18:31:48 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726591AbgFQIbp (ORCPT ); Wed, 17 Jun 2020 04:31:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60082 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726491AbgFQIbo (ORCPT ); Wed, 17 Jun 2020 04:31:44 -0400 Received: from mail-lf1-x141.google.com (mail-lf1-x141.google.com [IPv6:2a00:1450:4864:20::141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 42FB6C061573 for ; Wed, 17 Jun 2020 01:31:43 -0700 (PDT) Received: by mail-lf1-x141.google.com with SMTP id o4so769912lfi.7 for ; Wed, 17 Jun 2020 01:31:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=JaIc0xaCP+crf1WwQO7OQZ4sv8Vr3gRHYvGkuUIAEIQ=; b=wW9w/T0WpWjgouLO3wMI2JG6BAkSKIjmn/cKDecy4HOMNwqn7tRoPQSB1D0qyJ+yw/ SxCBaGTWQ/f1oMRkXq3fj/Jic3XfMcSxFwgA+AcqyViEwQw8bGcP+K9AI4bnIkNogYhb D9J1LFVxTBbES/gW26UJJaOnIZiaR5hOKxtPVLvcMokNlufpjt7edXbKgtfRbb+hxWyn MLXepWjHpD+DJtpmcDmqOSr9Fd3+juo6brHqzP0EItvrNi5i3veD7Me5WVeH8yEz9wE7 YX6TVv7gwCF7LG4C95qBNxtVKV3bvCV3LjXUzlmIR2GjOR2DimiwLF8JaPUczrMZpsaS P73g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=JaIc0xaCP+crf1WwQO7OQZ4sv8Vr3gRHYvGkuUIAEIQ=; b=RRHoACUt8fhoAIaj8zNqn2uXJAzxUcZxa/U+GDfxciT0N23WwKUPibJjq07is76Qb9 Ffui5+AEdMLhte1JYAD7U8reiL8fFBms9LQzLDs2uZsB1j+4AbMwnRvhD/vPompRXrXV ea5BH1KtMAsMdL9juB6Sq+Dgy4ZSJn0Uu1K5ujBOD7Mq/uvygnXmnmcHRtATI19EsBRF nDVy+HlUpa6fAchxc+fBJ2whP9rjOSNL7HKgGW4I4zkk1ebUuH/41QvK1oEIQ8PPzjiQ ZW99kgRe9fvTMLHS3yTFQAJ379wovU7vhjaFm5O4IjRxO17ro4LZgC6uYWV/CMKtSYWJ N5bw== X-Gm-Message-State: AOAM532XRRA8suOVoN27S9rvJY4/9i/8Aq0J19PraM2zJ/mEPBpVkskm yM8XDaOt5CobZhT2d60+oXZacw== X-Google-Smtp-Source: ABdhPJzvoXP8/QFjpsxd3LtFblPIeCvLFuh1FSXbjCSOoAlAJ4X9dXPREt7pmPemnBMALS2zdhvhxQ== X-Received: by 2002:a19:14e:: with SMTP id 75mr3872468lfb.7.1592382701665; Wed, 17 Jun 2020 01:31:41 -0700 (PDT) Received: from localhost.bredbandsbolaget (c-92d7225c.014-348-6c756e10.bbcust.telenor.se. [92.34.215.146]) by smtp.gmail.com with ESMTPSA id c3sm89554lfi.91.2020.06.17.01.31.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Jun 2020 01:31:41 -0700 (PDT) From: Linus Walleij To: Andrew Lunn , Vivien Didelot , Florian Fainelli Cc: netdev@vger.kernel.org, Linus Walleij , DENG Qingfang , Mauri Sandberg Subject: [net-next PATCH 1/5 v2] net: dsa: tag_rtl4_a: Implement Realtek 4 byte A tag Date: Wed, 17 Jun 2020 10:31:28 +0200 Message-Id: <20200617083132.1847234-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This implements the known parts of the Realtek 4 byte tag protocol version 0xA, as found in the RTL8366RB DSA switch. It is designated as protocol version 0xA as a different Realtek 4 byte tag format with protocol version 0x9 is known to exist in the Realtek RTL8306 chips. The tag and switch chip lacks public documentation, so the tag format has been reverse-engineered from packet dumps. As only ingress traffic has been available for analysis an egress tag has not been possible to develop (even using educated guesses about bit fields) so this is as far as it gets. It is not known if the switch even supports egress tagging. Excessive attempts to figure out the egress tag format was made. When nothing else worked, I just tried all bit combinations with 0xannp where a is protocol and p is port. I looped through all values several times trying to get a response from ping, without any positive result. Using just these ingress tags however, the switch functionality is vastly improved and the packets find their way into the destination port without any tricky VLAN configuration. On the D-Link DIR-685 the LAN ports now come up and respond to ping without any command line configuration so this is a real improvement for users. Egress packets need to be restricted to the proper target ports using VLAN, which the RTL8366RB DSA switch driver already sets up. Cc: DENG Qingfang Cc: Mauri Sandberg Signed-off-by: Linus Walleij Reviewed-by: Andrew Lunn --- ChangeLog v1->v2: - Drop some netdev_dbg() calls that was just littering. - Rebase on v5.8-rc1 --- include/net/dsa.h | 2 + net/dsa/Kconfig | 7 +++ net/dsa/Makefile | 1 + net/dsa/tag_rtl4_a.c | 131 +++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 141 insertions(+) create mode 100644 net/dsa/tag_rtl4_a.c diff --git a/include/net/dsa.h b/include/net/dsa.h index 50389772c597..2b37943f09a4 100644 --- a/include/net/dsa.h +++ b/include/net/dsa.h @@ -44,6 +44,7 @@ struct phylink_link_state; #define DSA_TAG_PROTO_KSZ8795_VALUE 14 #define DSA_TAG_PROTO_OCELOT_VALUE 15 #define DSA_TAG_PROTO_AR9331_VALUE 16 +#define DSA_TAG_PROTO_RTL4_A_VALUE 17 enum dsa_tag_protocol { DSA_TAG_PROTO_NONE = DSA_TAG_PROTO_NONE_VALUE, @@ -63,6 +64,7 @@ enum dsa_tag_protocol { DSA_TAG_PROTO_KSZ8795 = DSA_TAG_PROTO_KSZ8795_VALUE, DSA_TAG_PROTO_OCELOT = DSA_TAG_PROTO_OCELOT_VALUE, DSA_TAG_PROTO_AR9331 = DSA_TAG_PROTO_AR9331_VALUE, + DSA_TAG_PROTO_RTL4_A = DSA_TAG_PROTO_RTL4_A_VALUE, }; struct packet_type; diff --git a/net/dsa/Kconfig b/net/dsa/Kconfig index d5bc6ac599ef..1f9b9b11008c 100644 --- a/net/dsa/Kconfig +++ b/net/dsa/Kconfig @@ -86,6 +86,13 @@ config NET_DSA_TAG_KSZ Say Y if you want to enable support for tagging frames for the Microchip 8795/9477/9893 families of switches. +config NET_DSA_TAG_RTL4_A + tristate "Tag driver for Realtek 4 byte protocol A tags" + help + Say Y or M if you want to enable support for tagging frames for the + Realtek switches with 4 byte protocol A tags, sich as found in + the Realtek RTL8366RB. + config NET_DSA_TAG_OCELOT tristate "Tag driver for Ocelot family of switches" select PACKING diff --git a/net/dsa/Makefile b/net/dsa/Makefile index 108486cfdeef..4f47b2025ff5 100644 --- a/net/dsa/Makefile +++ b/net/dsa/Makefile @@ -11,6 +11,7 @@ obj-$(CONFIG_NET_DSA_TAG_DSA) += tag_dsa.o obj-$(CONFIG_NET_DSA_TAG_EDSA) += tag_edsa.o obj-$(CONFIG_NET_DSA_TAG_GSWIP) += tag_gswip.o obj-$(CONFIG_NET_DSA_TAG_KSZ) += tag_ksz.o +obj-$(CONFIG_NET_DSA_TAG_RTL4_A) += tag_rtl4_a.o obj-$(CONFIG_NET_DSA_TAG_LAN9303) += tag_lan9303.o obj-$(CONFIG_NET_DSA_TAG_MTK) += tag_mtk.o obj-$(CONFIG_NET_DSA_TAG_OCELOT) += tag_ocelot.o diff --git a/net/dsa/tag_rtl4_a.c b/net/dsa/tag_rtl4_a.c new file mode 100644 index 000000000000..df82249aa1a7 --- /dev/null +++ b/net/dsa/tag_rtl4_a.c @@ -0,0 +1,131 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Handler for Realtek 4 byte DSA switch tags + * Currently only supports protocol "A" found in RTL8366RB + * Copyright (c) 2020 Linus Walleij + * + * This "proprietary tag" header looks like so: + * + * ------------------------------------------------- + * | MAC DA | MAC SA | 0x8899 | 2 bytes tag | Type | + * ------------------------------------------------- + * + * The 2 bytes tag form a 16 bit big endian word. The exact + * meaning has been guess from packet dumps from ingress + * frames, as no working egress traffic has been available + * we do not know the format of the egress tags or if they + * are even supported. + */ + +#include +#include + +#include "dsa_priv.h" + +#define RTL4_A_HDR_LEN 4 +#define RTL4_A_ETHERTYPE 0x8899 +#define RTL4_A_PROTOCOL_SHIFT 12 +/* + * 0x1 = Realtek Remote Control protocol (RRCP) + * 0x2/0x3 seems to be used for loopback testing + * 0x9 = RTL8306 DSA protocol + * 0xa = RTL8366RB DSA protocol + */ +#define RTL4_A_PROTOCOL_RTL8366RB 0xa + +static struct sk_buff *rtl4a_tag_xmit(struct sk_buff *skb, + struct net_device *dev) +{ + /* + * Just let it pass thru, we don't know if it is possible + * to tag a frame with the 0x8899 ethertype and direct it + * to a specific port, all attempts at reverse-engineering have + * ended up with the frames getting dropped. + * + * The VLAN set-up needs to restrict the frames to the right port. + * + * If you have documentation on the tagging format for RTL8366RB + * (tag type A) then please contribute. + */ + return skb; +} + +static struct sk_buff *rtl4a_tag_rcv(struct sk_buff *skb, + struct net_device *dev, + struct packet_type *pt) +{ + u16 protport; + __be16 *p; + u16 etype; + u8 flags; + u8 *tag; + u8 prot; + u8 port; + + if (unlikely(!pskb_may_pull(skb, RTL4_A_HDR_LEN))) + return NULL; + + /* The RTL4 header has its own custom Ethertype 0x8899 and that + * starts right at the beginning of the packet, after the src + * ethernet addr. Apparantly skb->data always points 2 bytes in, + * behind the Ethertype. + */ + tag = skb->data - 2; + p = (__be16 *)tag; + etype = ntohs(*p); + if (etype != RTL4_A_ETHERTYPE) { + /* Not custom, just pass through */ + netdev_dbg(dev, "non-realtek ethertype 0x%04x\n", etype); + return skb; + } + p = (__be16 *)(tag + 2); + protport = ntohs(*p); + /* The 4 upper bits are the protocol */ + prot = (protport >> RTL4_A_PROTOCOL_SHIFT) & 0x0f; + if (prot != RTL4_A_PROTOCOL_RTL8366RB) { + netdev_err(dev, "unknown realtek protocol 0x%01x\n", prot); + return NULL; + } + port = protport & 0xff; + + /* Remove RTL4 tag and recalculate checksum */ + skb_pull_rcsum(skb, RTL4_A_HDR_LEN); + + /* Move ethernet DA and SA in front of the data */ + memmove(skb->data - ETH_HLEN, + skb->data - ETH_HLEN - RTL4_A_HDR_LEN, + 2 * ETH_ALEN); + + skb->dev = dsa_master_find_slave(dev, 0, port); + if (!skb->dev) { + netdev_dbg(dev, "could not find slave for port %d\n", port); + return NULL; + } + + skb->offload_fwd_mark = 1; + + return skb; +} + +static int rtl4a_tag_flow_dissect(const struct sk_buff *skb, __be16 *proto, + int *offset) +{ + *offset = RTL4_A_HDR_LEN; + /* Skip past the tag and fetch the encapsulated Ethertype */ + *proto = ((__be16 *)skb->data)[1]; + + return 0; +} + +static const struct dsa_device_ops rtl4a_netdev_ops = { + .name = "rtl4a", + .proto = DSA_TAG_PROTO_RTL4_A, + .xmit = rtl4a_tag_xmit, + .rcv = rtl4a_tag_rcv, + .flow_dissect = rtl4a_tag_flow_dissect, + .overhead = RTL4_A_HDR_LEN, +}; +module_dsa_tag_driver(rtl4a_netdev_ops); + +MODULE_LICENSE("GPL"); +MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_RTL4_A); From patchwork Wed Jun 17 08:31:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 1311043 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=y+eyg6eg; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 49mywP6flbz9sRh for ; Wed, 17 Jun 2020 18:31:49 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726625AbgFQIbs (ORCPT ); Wed, 17 Jun 2020 04:31:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60088 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726491AbgFQIbq (ORCPT ); Wed, 17 Jun 2020 04:31:46 -0400 Received: from mail-lj1-x241.google.com (mail-lj1-x241.google.com [IPv6:2a00:1450:4864:20::241]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CCC15C061573 for ; Wed, 17 Jun 2020 01:31:45 -0700 (PDT) Received: by mail-lj1-x241.google.com with SMTP id n23so1809584ljh.7 for ; Wed, 17 Jun 2020 01:31:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yh8FedNx453DUiN6JA86KmO4MlylnoiGt30DoOLVbXc=; b=y+eyg6egWdRLekIRTu0Se49LCn++cTDLtdO+ZkLw7soOGrXSFi9TGgPX5c4uCclSpx xLg91iEBrS4R7fPqjK7vLX+YW/gAglkiqCFQccOaV66G5X8XmqBtoESrqapV2cn/PS/l UOLknkLzN1n47Gs7AYu345He1MA5moigB/rVEYNBw0iQ8iHA4gp96vVHoG8cOBcd+sI6 sKclLAkm2U88O3K7FcAs7gOa2vByKR/7R6sQBd/0U7xY1ov+hbzYmUiU+CzJ2evTIX2D ++vv5gAIzUGtQONzrjrJcGZ/wUSVVDq/1AiX1X4Wh7SXFvj6bLORGfiP6ZLfqTbP9T08 N8Ag== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yh8FedNx453DUiN6JA86KmO4MlylnoiGt30DoOLVbXc=; b=ge3Z/TSEr2l+aw9aGlKPt1Lpqm+dzYOW03THhIuVKdZJPJxPwVSJOIPtRQbX6PVCFO 46mA7Jy2Okz3ax7MOCscJqzJp7sPstp3Q2bJ0tmyLCpRw+54I8+EP62kehFWfrI4k75s GostdJrPccbJ1KhwBaSJVO9j/nIXaZAeu2ZqmvS6qOo+F78fP6/qqHRtBm/QfJ7mdGCy gV1sA6NF679EXu3Xn+Exdx6nWnQKTRA+O9GpEt7lQlw8YkZgpa08yIHVYy4Uf3Q6PA16 Ai4EHbMGWLD06XmfDtdUC6SOiMDNgm6c8kyA6lx4rM2FiGGlttQyProherv2Tl7Hbony f+ZQ== X-Gm-Message-State: AOAM533AYoeewGTZ5qXCU5uGbtVDBySEVe6EnmskcxiCAScS7T8XZxCw JMvG0bcfG6Vbo/v3PYmtAIRlnA== X-Google-Smtp-Source: ABdhPJxoyaZjEFaPVQG0LREYP6RQt5qKhAptAbAgigGed9Zj3mHpJOMfBgeul3X9+/cb3IDdKl/ewA== X-Received: by 2002:a2e:3c0f:: with SMTP id j15mr3697674lja.443.1592382704252; Wed, 17 Jun 2020 01:31:44 -0700 (PDT) Received: from localhost.bredbandsbolaget (c-92d7225c.014-348-6c756e10.bbcust.telenor.se. [92.34.215.146]) by smtp.gmail.com with ESMTPSA id c3sm89554lfi.91.2020.06.17.01.31.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Jun 2020 01:31:43 -0700 (PDT) From: Linus Walleij To: Andrew Lunn , Vivien Didelot , Florian Fainelli Cc: netdev@vger.kernel.org, Linus Walleij , DENG Qingfang , Mauri Sandberg Subject: [net-next PATCH 2/5 v2] net: dsa: rtl8366rb: Support the CPU DSA tag Date: Wed, 17 Jun 2020 10:31:29 +0200 Message-Id: <20200617083132.1847234-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200617083132.1847234-1-linus.walleij@linaro.org> References: <20200617083132.1847234-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This activates the support to use the CPU tag to properly direct ingress traffic to the right port. Bit 15 in register RTL8368RB_CPU_CTRL_REG can be set to 1 to disable the insertion of the CPU tag which is what the code currently does. The bit 15 define calls this setting RTL8368RB_CPU_INSTAG which is confusing since the iverse meaning is implied: programmers may think that setting this bit to 1 will *enable* inserting the tag rather than disablinbg it, so rename this setting in bit 15 to RTL8368RB_CPU_NO_TAG which is more to the point. After this e.g. ping works out-of-the-box with the RTL8366RB. Cc: DENG Qingfang Cc: Mauri Sandberg Signed-off-by: Linus Walleij Reviewed-by: Andrew Lunn --- ChangeLog v1->v2: - Update the commit message to explain why we are renaming bit 15 in RTL8368RB_CPU_CTRL_REG. --- drivers/net/dsa/Kconfig | 1 + drivers/net/dsa/rtl8366rb.c | 31 ++++++++----------------------- 2 files changed, 9 insertions(+), 23 deletions(-) diff --git a/drivers/net/dsa/Kconfig b/drivers/net/dsa/Kconfig index d0024cb30a7b..468b3c4273c5 100644 --- a/drivers/net/dsa/Kconfig +++ b/drivers/net/dsa/Kconfig @@ -70,6 +70,7 @@ config NET_DSA_QCA8K config NET_DSA_REALTEK_SMI tristate "Realtek SMI Ethernet switch family support" depends on NET_DSA + select NET_DSA_TAG_RTL4_A select FIXED_PHY select IRQ_DOMAIN select REALTEK_PHY diff --git a/drivers/net/dsa/rtl8366rb.c b/drivers/net/dsa/rtl8366rb.c index fd1977590cb4..48f1ff746799 100644 --- a/drivers/net/dsa/rtl8366rb.c +++ b/drivers/net/dsa/rtl8366rb.c @@ -109,8 +109,8 @@ /* CPU port control reg */ #define RTL8368RB_CPU_CTRL_REG 0x0061 #define RTL8368RB_CPU_PORTS_MSK 0x00FF -/* Enables inserting custom tag length/type 0x8899 */ -#define RTL8368RB_CPU_INSTAG BIT(15) +/* Disables inserting custom tag length/type 0x8899 */ +#define RTL8368RB_CPU_NO_TAG BIT(15) #define RTL8366RB_SMAR0 0x0070 /* bits 0..15 */ #define RTL8366RB_SMAR1 0x0071 /* bits 16..31 */ @@ -844,16 +844,14 @@ static int rtl8366rb_setup(struct dsa_switch *ds) if (ret) return ret; - /* Enable CPU port and enable inserting CPU tag + /* Enable CPU port with custom DSA tag 8899. * - * Disabling RTL8368RB_CPU_INSTAG here will change the behaviour - * of the switch totally and it will start talking Realtek RRCP - * internally. It is probably possible to experiment with this, - * but then the kernel needs to understand and handle RRCP first. + * If you set RTL8368RB_CPU_NO_TAG (bit 15) in this registers + * the custom tag is turned off. */ ret = regmap_update_bits(smi->map, RTL8368RB_CPU_CTRL_REG, 0xFFFF, - RTL8368RB_CPU_INSTAG | BIT(smi->cpu_port)); + BIT(smi->cpu_port)); if (ret) return ret; @@ -967,21 +965,8 @@ static enum dsa_tag_protocol rtl8366_get_tag_protocol(struct dsa_switch *ds, int port, enum dsa_tag_protocol mp) { - /* For now, the RTL switches are handled without any custom tags. - * - * It is possible to turn on "custom tags" by removing the - * RTL8368RB_CPU_INSTAG flag when enabling the port but what it - * does is unfamiliar to DSA: ethernet frames of type 8899, the Realtek - * Remote Control Protocol (RRCP) start to appear on the CPU port of - * the device. So this is not the ordinary few extra bytes in the - * frame. Instead it appears that the switch starts to talk Realtek - * RRCP internally which means a pretty complex RRCP implementation - * decoding and responding the RRCP protocol is needed to exploit this. - * - * The OpenRRCP project (dormant since 2009) have reverse-egineered - * parts of the protocol. - */ - return DSA_TAG_PROTO_NONE; + /* This switch uses the 4 byte protocol A Realtek DSA tag */ + return DSA_TAG_PROTO_RTL4_A; } static void rtl8366rb_adjust_link(struct dsa_switch *ds, int port, From patchwork Wed Jun 17 08:31:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 1311044 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=CRzdwEPv; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 49mywS3Z0Kz9sRh for ; Wed, 17 Jun 2020 18:31:52 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726698AbgFQIbu (ORCPT ); Wed, 17 Jun 2020 04:31:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60100 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726491AbgFQIbt (ORCPT ); Wed, 17 Jun 2020 04:31:49 -0400 Received: from mail-lj1-x241.google.com (mail-lj1-x241.google.com [IPv6:2a00:1450:4864:20::241]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 80FEDC061573 for ; Wed, 17 Jun 2020 01:31:48 -0700 (PDT) Received: by mail-lj1-x241.google.com with SMTP id 9so1803250ljc.8 for ; Wed, 17 Jun 2020 01:31:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=c84FGVGvT0JUW6tVjnpdu63A5uo5FuKqONIDulr/ne0=; b=CRzdwEPvBkMKw0lHArpMOP7GwPMbN+yup9QItXTfJ6o/nCzcSUJqvzNyi1id76eqPJ 4DUV5gOvVyU0jKJFrklOcPq0ZJd1+4ZaR7eKwOeG3urgzKcdUH3hkaijHxitEAOWrLp4 wzcVNUiwME90+s21PG4Fn6ss8ow0Pj8LBZ8nU4ZpVDDsKvZ+EtJ46ELig5YTXAOEhFi4 YaqQRPAi+2uDd54ulE/pFiNcBCnmYRMR7slWbJCAa6FKC171s3pzF5JW/PFcF1hcuDsX ptMXjrh+3K3yl9BHW7BJ7Qd0khbxyS8u3Mlx4CmEPe5LQZBiqVLsHHeuV00qy4MSFU1q mYpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=c84FGVGvT0JUW6tVjnpdu63A5uo5FuKqONIDulr/ne0=; b=VrYoGDXn8+/2OaOjHtFCmXLzac9bNIjRGIFTv6SS8s70fC4j//jG0rNc5Pap7JYJI6 zwMd//WfHiY+YpdBBzEDq+NflhQLVApcWfLZiYENfZDtnen/bTekFwWWv3Ds8auWBK9O 7nrC+sGEgLLjFXzYVLslciIX4hjDDV06H6TgnUDGPJmyOaEL0xH6FayFTUwb3xvAebb1 c4uVlu1TZZcm05yo86CPvmzlgXkw36NC0y5pRcVCcCOZq43l0E/vzk6EZvZ6WCEw9zkl zhrJhZrltpISmouZ7NrvDOFHiuwq8TuORXOPqwKoPivTJjTWeMzb248cKuJZo/vedZlr 838Q== X-Gm-Message-State: AOAM530a71kJMBQ/jk6kaafsMP/K7uzWgzy7PuFHd7j5soVNIzrdFySC Upx9KDNr3xFsX+d40t6tB+udpw== X-Google-Smtp-Source: ABdhPJxzSF+SJ2Hb+rc9c0BIlxse9N0afnWrTZtUQn9yfYdDvFhCApCE4hT4FurYC6mYqpdUYlrUGw== X-Received: by 2002:a2e:8896:: with SMTP id k22mr3254049lji.331.1592382706774; Wed, 17 Jun 2020 01:31:46 -0700 (PDT) Received: from localhost.bredbandsbolaget (c-92d7225c.014-348-6c756e10.bbcust.telenor.se. [92.34.215.146]) by smtp.gmail.com with ESMTPSA id c3sm89554lfi.91.2020.06.17.01.31.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Jun 2020 01:31:46 -0700 (PDT) From: Linus Walleij To: Andrew Lunn , Vivien Didelot , Florian Fainelli Cc: netdev@vger.kernel.org, Linus Walleij , DENG Qingfang , Mauri Sandberg Subject: [net-next PATCH 3/5 v2] net: dsa: rtl8366: Split out default VLAN config Date: Wed, 17 Jun 2020 10:31:30 +0200 Message-Id: <20200617083132.1847234-3-linus.walleij@linaro.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200617083132.1847234-1-linus.walleij@linaro.org> References: <20200617083132.1847234-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org We loop over the ports to initialize the default VLAN and PVID for each port. As we need to reuse the code to reinitialize a single port, break out the function rtl8366_set_default_vlan_and_pvid(). Cc: DENG Qingfang Cc: Mauri Sandberg Signed-off-by: Linus Walleij Reviewed-by: Andrew Lunn --- ChangeLog v1->v2: - Rebased on v5.8-rc1 and other changes. --- drivers/net/dsa/rtl8366.c | 70 ++++++++++++++++++++++++--------------- 1 file changed, 43 insertions(+), 27 deletions(-) diff --git a/drivers/net/dsa/rtl8366.c b/drivers/net/dsa/rtl8366.c index ac88caca5ad4..66bd1241204c 100644 --- a/drivers/net/dsa/rtl8366.c +++ b/drivers/net/dsa/rtl8366.c @@ -253,6 +253,48 @@ int rtl8366_reset_vlan(struct realtek_smi *smi) } EXPORT_SYMBOL_GPL(rtl8366_reset_vlan); +static int rtl8366_set_default_vlan_and_pvid(struct realtek_smi *smi, + int port) +{ + u32 mask; + u16 vid; + int ret; + + /* This is the reserved default VLAN for this port */ + vid = port + 1; + + if (port == smi->cpu_port) + /* For the CPU port, make all ports members of this + * VLAN. + */ + mask = GENMASK(smi->num_ports - 1, 0); + else + /* For all other ports, enable itself plus the + * CPU port. + */ + mask = BIT(port) | BIT(smi->cpu_port); + + /* For each port, set the port as member of VLAN (port+1) + * and untagged, except for the CPU port: the CPU port (5) is + * member of VLAN 6 and so are ALL the other ports as well. + * Use filter 0 (no filter). + */ + dev_info(smi->dev, "Set VLAN %04x portmask to %08x (port %d %s)\n", + vid, mask, port, (port == smi->cpu_port) ? + "CPU PORT and all other ports" : "and CPU port"); + ret = rtl8366_set_vlan(smi, vid, mask, mask, 0); + if (ret) + return ret; + + dev_info(smi->dev, "Set PVID %04x on port %d\n", + vid, port); + ret = rtl8366_set_pvid(smi, port, vid); + if (ret) + return ret; + + return 0; +} + int rtl8366_init_vlan(struct realtek_smi *smi) { int port; @@ -266,33 +308,7 @@ int rtl8366_init_vlan(struct realtek_smi *smi) * it with the VLAN (port+1) */ for (port = 0; port < smi->num_ports; port++) { - u32 mask; - - if (port == smi->cpu_port) - /* For the CPU port, make all ports members of this - * VLAN. - */ - mask = GENMASK(smi->num_ports - 1, 0); - else - /* For all other ports, enable itself plus the - * CPU port. - */ - mask = BIT(port) | BIT(smi->cpu_port); - - /* For each port, set the port as member of VLAN (port+1) - * and untagged, except for the CPU port: the CPU port (5) is - * member of VLAN 6 and so are ALL the other ports as well. - * Use filter 0 (no filter). - */ - dev_info(smi->dev, "VLAN%d port mask for port %d, %08x\n", - (port + 1), port, mask); - ret = rtl8366_set_vlan(smi, (port + 1), mask, mask, 0); - if (ret) - return ret; - - dev_info(smi->dev, "VLAN%d port %d, PVID set to %d\n", - (port + 1), port, (port + 1)); - ret = rtl8366_set_pvid(smi, port, (port + 1)); + ret = rtl8366_set_default_vlan_and_pvid(smi, port); if (ret) return ret; } From patchwork Wed Jun 17 08:31:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 1311046 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=aU1m5bSI; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 49mywW4kkNz9sSS for ; Wed, 17 Jun 2020 18:31:55 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726763AbgFQIby (ORCPT ); Wed, 17 Jun 2020 04:31:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60108 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726708AbgFQIbu (ORCPT ); Wed, 17 Jun 2020 04:31:50 -0400 Received: from mail-lf1-x144.google.com (mail-lf1-x144.google.com [IPv6:2a00:1450:4864:20::144]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 433DCC061573 for ; Wed, 17 Jun 2020 01:31:50 -0700 (PDT) Received: by mail-lf1-x144.google.com with SMTP id c21so776449lfb.3 for ; Wed, 17 Jun 2020 01:31:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=R+fhW7L/u1g2GZLNXnrZ/DQIstEkMgoZ0j/B9QHwiHM=; b=aU1m5bSI59zbxyVgpp7MctbufSwfhKqhEkvfyDnkXFKW9zfziKvXsBb3svZs83R2t2 iEqi5j3X3EVwamRvT5nKh+y28NBFO3xf7O3mAdw4e3H/2YPTUxtXYxr4yZMcLLiTPh/G xMR/erdDBdDR0+UwXIdH9Lg71kT9Ja77HBkFiS2hj40XaeujgzKsBWxL23ghO52/HQ3G eBvwxjbO+HnSYIUMOWyimE02fG43G36j5+CU1QFgTGFrHIGwSGHsjYNlwvgE4dmyh7ub 9ezG57FDp0LL3CJ3+oknAkxNZdiWf3kU7fjniqszZA4cBYxKif9rkFto2cyfAG2Sa41T 97TQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=R+fhW7L/u1g2GZLNXnrZ/DQIstEkMgoZ0j/B9QHwiHM=; b=F61ciAHVGO7TMSOZIO+ilUGWuafIOdhVLU0zhx+MC2gHZQ8dZplKfNQrWWnyb49EsA AqO7HCEToycvWz6YABBnnvZIbWRQbf5F3YbPIDKOKWhJ//p+YO0aVG5fDXKjcqqXJOFj 50CEvctV1PwOoZ6LGiRBvZutSP6BpY7Iddt3qtT1cRef9KBebvVK2rZc0ZX0f8a+IBF2 YcKXWNz6Gk8uDaNa7/phzD7r5PjqMfoMtwJm3V5NEeXpM2NsQDRh9LgEltM2t8cgSG4r u8Yvk9eFB2HkYI7E1pY1eaiEvJPP/sEBPxt39+QnKLW95CbrxLphQwBm03femQqmTYvQ xHlA== X-Gm-Message-State: AOAM5329Fxyj/aNz+YrlsFrq6cDQTN1OwSmvuODm5xYoaMxdJBpgjpe0 GuNeB/n+2+oMMDa6ERr0aindPw== X-Google-Smtp-Source: ABdhPJyBN94pBKXm66Qz7pzHZr59a17h1BwbPsOcCHZHYFSGdqzcGmHEVi7RvFMLgEFAgRfdts63fQ== X-Received: by 2002:a05:6512:104c:: with SMTP id c12mr3963492lfb.200.1592382708648; Wed, 17 Jun 2020 01:31:48 -0700 (PDT) Received: from localhost.bredbandsbolaget (c-92d7225c.014-348-6c756e10.bbcust.telenor.se. [92.34.215.146]) by smtp.gmail.com with ESMTPSA id c3sm89554lfi.91.2020.06.17.01.31.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Jun 2020 01:31:48 -0700 (PDT) From: Linus Walleij To: Andrew Lunn , Vivien Didelot , Florian Fainelli Cc: netdev@vger.kernel.org, Linus Walleij , DENG Qingfang , Mauri Sandberg Subject: [net-next PATCH 4/5 v2] net: dsa: rtl8366: VLAN 0 as disable tagging Date: Wed, 17 Jun 2020 10:31:31 +0200 Message-Id: <20200617083132.1847234-4-linus.walleij@linaro.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200617083132.1847234-1-linus.walleij@linaro.org> References: <20200617083132.1847234-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The code in net/8021q/vlan.c, vlan_device_event() sets VLAN 0 for a VLAN-capable ethernet device when it comes up. Since the RTL8366 DSA switches must have a VLAN and PVID set up for any packets to come through we have already set up default VLAN for each port as part of bringing the switch online. Make sure that setting VLAN 0 has the same effect and does not try to actually tell the hardware to use VLAN 0 on the port because that will not work. Cc: DENG Qingfang Cc: Mauri Sandberg Signed-off-by: Linus Walleij Reviewed-by: Andrew Lunn --- ChangeLog v1->v2: - Rebased on v5.8-rc1 and other changes. --- drivers/net/dsa/rtl8366.c | 65 +++++++++++++++++++++++++++++++-------- 1 file changed, 52 insertions(+), 13 deletions(-) diff --git a/drivers/net/dsa/rtl8366.c b/drivers/net/dsa/rtl8366.c index 66bd1241204c..7f0691a6da13 100644 --- a/drivers/net/dsa/rtl8366.c +++ b/drivers/net/dsa/rtl8366.c @@ -355,15 +355,25 @@ int rtl8366_vlan_prepare(struct dsa_switch *ds, int port, const struct switchdev_obj_port_vlan *vlan) { struct realtek_smi *smi = ds->priv; + u16 vid_begin = vlan->vid_begin; + u16 vid_end = vlan->vid_end; u16 vid; int ret; - for (vid = vlan->vid_begin; vid < vlan->vid_end; vid++) + if (vid_begin == 0) { + dev_info(smi->dev, "prepare VLAN 0 - ignored\n"); + if (vid_end == 0) + return 0; + /* Skip VLAN 0 and start with VLAN 1 */ + vid_begin = 1; + } + + for (vid = vid_begin; vid < vid_end; vid++) if (!smi->ops->is_vlan_valid(smi, vid)) return -EINVAL; dev_info(smi->dev, "prepare VLANs %04x..%04x\n", - vlan->vid_begin, vlan->vid_end); + vid_begin, vid_end); /* Enable VLAN in the hardware * FIXME: what's with this 4k business? @@ -383,27 +393,46 @@ void rtl8366_vlan_add(struct dsa_switch *ds, int port, bool untagged = !!(vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED); bool pvid = !!(vlan->flags & BRIDGE_VLAN_INFO_PVID); struct realtek_smi *smi = ds->priv; + u16 vid_begin = vlan->vid_begin; + u16 vid_end = vlan->vid_end; u32 member = 0; u32 untag = 0; u16 vid; int ret; - for (vid = vlan->vid_begin; vid < vlan->vid_end; vid++) - if (!smi->ops->is_vlan_valid(smi, vid)) + if (vid_begin == 0) { + dev_info(smi->dev, "set VLAN 0 on port %d = default VLAN\n", + port); + /* Set up default tagging */ + ret = rtl8366_set_default_vlan_and_pvid(smi, port); + if (ret) { + dev_err(smi->dev, + "error setting default VLAN on port %d\n", + port); return; + } + if (vid_end == 0) + return; + /* Skip VLAN 0 and start with VLAN 1 */ + vid_begin = 1; + } - dev_info(smi->dev, "add VLAN on port %d, %s, %s\n", - port, - untagged ? "untagged" : "tagged", - pvid ? " PVID" : "no PVID"); + for (vid = vid_begin; vid < vid_end; vid++) + if (!smi->ops->is_vlan_valid(smi, vid)) + return; if (dsa_is_dsa_port(ds, port) || dsa_is_cpu_port(ds, port)) dev_err(smi->dev, "port is DSA or CPU port\n"); - for (vid = vlan->vid_begin; vid <= vlan->vid_end; ++vid) { + for (vid = vid_begin; vid <= vid_end; ++vid) { int pvid_val = 0; - dev_info(smi->dev, "add VLAN %04x\n", vid); + dev_info(smi->dev, "add VLAN %04x to port %d, %s, %s\n", + vid, + port, + untagged ? "untagged" : "tagged", + pvid ? " PVID" : "no PVID"); + member |= BIT(port); if (untagged) @@ -437,15 +466,25 @@ int rtl8366_vlan_del(struct dsa_switch *ds, int port, const struct switchdev_obj_port_vlan *vlan) { struct realtek_smi *smi = ds->priv; + u16 vid_begin = vlan->vid_begin; + u16 vid_end = vlan->vid_end; u16 vid; int ret; - dev_info(smi->dev, "del VLAN on port %d\n", port); + if (vid_begin == 0) { + dev_info(smi->dev, "remove port %d from VLAN 0 (no-op)\n", + port); + if (vid_end == 0) + return 0; + /* Skip VLAN 0 and start with VLAN 1 */ + vid_begin = 1; + } - for (vid = vlan->vid_begin; vid <= vlan->vid_end; ++vid) { + for (vid = vid_begin; vid <= vid_end; ++vid) { int i; - dev_info(smi->dev, "del VLAN %04x\n", vid); + dev_info(smi->dev, "remove VLAN %04x from port %d\n", + vid, port); for (i = 0; i < smi->num_vlan_mc; i++) { struct rtl8366_vlan_mc vlanmc; From patchwork Wed Jun 17 08:31:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 1311045 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=n8WepE2L; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 49mywV3wBnz9sRh for ; Wed, 17 Jun 2020 18:31:54 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726729AbgFQIby (ORCPT ); Wed, 17 Jun 2020 04:31:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60110 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726491AbgFQIbw (ORCPT ); Wed, 17 Jun 2020 04:31:52 -0400 Received: from mail-lj1-x242.google.com (mail-lj1-x242.google.com [IPv6:2a00:1450:4864:20::242]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D972BC06174E for ; Wed, 17 Jun 2020 01:31:51 -0700 (PDT) Received: by mail-lj1-x242.google.com with SMTP id n24so1779393lji.10 for ; Wed, 17 Jun 2020 01:31:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=SUl9pfAsz4Si0tDa+sd5wm5SlXtGYBUK2ZIBc7MpVLM=; b=n8WepE2L4ZYHeJ3Oly0QADCCSjNV4KFQT8lLQt9YfomGx5PPbudefe/qiY0ZFC9LTg ViJB2HhPuGPnDnMO8ApltxYtM3ES9pnH7R99SQFyFD7XSs0XoYrFt6SPULvKwoFB7PEz Vv5QWjzC8Y+XcBGHS5HtWEtYAxtyeTIg/bwTBFEwbYvIcSOe1Qj8gbWSPetTx7956r7n fx3fGJJXNuwzC0DePWI+EicfW49reDZd6eus6/GAuZ9MShP1cPb6DS2mhK2pRxp9a11p 3aWq7yn2TK080NkuhCR8CZ89nZYRpFydWV4OrdpQ5KKf8a+pwdWsRI26ZXmMv5FKAN1O C1Ig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=SUl9pfAsz4Si0tDa+sd5wm5SlXtGYBUK2ZIBc7MpVLM=; b=niSwXEAwio6/DtOxnoUGkguyWBYaoem0wZ/lJ/hpZrrgJXhreVdBWc0HP1inera651 D/cQanR6i6O/q1KjLvFtp8sR1E5vxxji/bK03NDn/TkXXiJcJmNzH4mILWZ8YM2Ky+QX ji+fk6TimTOABoFhzM8vePHdB2VYh6KQOxmaAwiP/99GLFFpo9/J8VuvZ8S56VATOVjI djdsdDNmFLDRseAThoTtvrcCNfALMFeR+GTJlj1/6k+A2YJhIMMxqPr7nGpwedFNSZRm bQypBzMOOkU9TAMvLEVXU6KvStcmtUO0x6Vioe5uiKgUczCn+9AtIuV2P4XG1zAvVF58 kLhA== X-Gm-Message-State: AOAM532I2loObhFZNXnYtAgPhw+eZfw945tLC0SZmVIQ6vuKcAVtBdBu 7O3gXIBgHdCb2nwDddb8ug9gNA== X-Google-Smtp-Source: ABdhPJwrrHzQMYHkP3uVyA+oZqep0Fw9qywn4alMakDlUtOzRLyik9ItjvOtfwTO66N5bMDZ9fX1Kw== X-Received: by 2002:a2e:b5d0:: with SMTP id g16mr3315702ljn.246.1592382710371; Wed, 17 Jun 2020 01:31:50 -0700 (PDT) Received: from localhost.bredbandsbolaget (c-92d7225c.014-348-6c756e10.bbcust.telenor.se. [92.34.215.146]) by smtp.gmail.com with ESMTPSA id c3sm89554lfi.91.2020.06.17.01.31.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Jun 2020 01:31:49 -0700 (PDT) From: Linus Walleij To: Andrew Lunn , Vivien Didelot , Florian Fainelli Cc: netdev@vger.kernel.org, Linus Walleij , DENG Qingfang , Mauri Sandberg Subject: [net-next PATCH 5/5 v2] net: dsa: rtl8366: Use top VLANs for default Date: Wed, 17 Jun 2020 10:31:32 +0200 Message-Id: <20200617083132.1847234-5-linus.walleij@linaro.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200617083132.1847234-1-linus.walleij@linaro.org> References: <20200617083132.1847234-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The RTL8366 DSA switches will not work unless we set up a default VLAN for each port. We are currently using e.g. VLAN 1..6 for a 5-port switch as default VLANs. This is not very helpful for users, move it to allocate the top VLANs for default instead, for example on RTL8366RB there are 16 VLANs so instead of using VLAN 1..6 as default use VLAN 10..15 so VLAN 1 thru VLAN 9 is available for users. Cc: DENG Qingfang Cc: Mauri Sandberg Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Rebase on v5.8-rc1. --- drivers/net/dsa/rtl8366.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/dsa/rtl8366.c b/drivers/net/dsa/rtl8366.c index 7f0691a6da13..4e7562b41598 100644 --- a/drivers/net/dsa/rtl8366.c +++ b/drivers/net/dsa/rtl8366.c @@ -260,8 +260,8 @@ static int rtl8366_set_default_vlan_and_pvid(struct realtek_smi *smi, u16 vid; int ret; - /* This is the reserved default VLAN for this port */ - vid = port + 1; + /* Use the top VLANs for per-port default VLAN */ + vid = smi->num_vlan_mc - smi->num_ports + port; if (port == smi->cpu_port) /* For the CPU port, make all ports members of this