From patchwork Thu May 14 11:51:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 1290193 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=gcc.gnu.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=EH1mWeL4; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49N8zC24MZz9sTN for ; Thu, 14 May 2020 21:52:05 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id C44B6395CC19; Thu, 14 May 2020 11:52:01 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C44B6395CC19 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1589457121; bh=Jj+jJyC1WJpbCfUqRVIrKV8CWf+U9cQkhgkAnUlCXf4=; h=Date:Subject:To:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=EH1mWeL4pe7RQX4kle49LLpeSUiUl4jhw6wQsbDTNN+su1SGhZwxyGRfw/01jhBbN a/WmIUOpRB6KovimHuVHjqGeO8tWHN389olrLRXDobsKdJ7cZsYT2+vHTMDSGxCp7d dZ5cYOgKwrAtdkbA4TsKfaNUvqhltNOneYLQGT3U= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-io1-xd2d.google.com (mail-io1-xd2d.google.com [IPv6:2607:f8b0:4864:20::d2d]) by sourceware.org (Postfix) with ESMTPS id DE5A8395C87F for ; Thu, 14 May 2020 11:51:58 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org DE5A8395C87F Received: by mail-io1-xd2d.google.com with SMTP id w25so166932iol.12 for ; Thu, 14 May 2020 04:51:58 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:from:date:message-id:subject:to; bh=Jj+jJyC1WJpbCfUqRVIrKV8CWf+U9cQkhgkAnUlCXf4=; b=Wtlf7hbcX2QYjY2axwCW5jHbY7KGhDMaDNcisByKOJfqKJLGNbu4NK+NrXEZX9bsA0 A4BQuvB63QGjkytwwrNW6Gh9XnB/24DezbYPX82Wm2z9R+YUO7++lJto12IK3D+7tqpo /sJS6/NUorjbXddBIVARVl11InCE+MbGFd6VjZ9a1NS93tWZm1TBbk7B8HmqKIgyxLm+ Q482Whmq4G4Q1+0rDqeXVtWncA0kosFNOy03eAWX9fDPLnmuTnYE9SWu4xbIkWB4vYb3 k8ITND0HbPcKRM32B2U4g3ZIawZTHsvqX9YSHbvebDSiGkBwEDfClEVc4ySVy+x4Cj4b PlTw== X-Gm-Message-State: AOAM533BgCRqoLI9MmHfo7MpR4IuDjDxevUtCKFCDoWTOuje+mug6toY H4tOEzvhgCfWKf8y2XP9Nf18UWIwMu64RQJQDsclo3DfRzo= X-Google-Smtp-Source: ABdhPJxylvlG/hR76SVnnvGiH0rVAtCiJAc1t2l7pB5iOLrWxjH7kz4v/o2hNSDWe7UCo5ntRi8+8yxE7d0RxRKj5c8= X-Received: by 2002:a5e:d702:: with SMTP id v2mr3742787iom.48.1589457118081; Thu, 14 May 2020 04:51:58 -0700 (PDT) MIME-Version: 1.0 Date: Thu, 14 May 2020 13:51:46 +0200 Message-ID: Subject: [committed] i386: Add V2DFmode conversion functions [PR95046] To: "gcc-patches@gcc.gnu.org" X-Spam-Status: No, score=-0.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, UNWANTED_LANGUAGE_BODY autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Uros Bizjak via Gcc-patches From: Uros Bizjak Reply-To: Uros Bizjak Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" gcc/ChangeLog: 2020-05-14 Uroš Bizjak PR target/95046 * config/i386/sse.md (sse2_cvtpi2pd): Add memory to alternative 1. (floatv2siv2df2): New expander. (floatunsv2siv2df2): New insn pattern. (fix_truncv2dfv2si2): New expander. (fixuns_truncv2dfv2si2): New insn pattern. testsuite/ChangeLog: 2020-05-14 Uroš Bizjak PR target/95046 * gcc.target/i386/pr95046-6.c: New test. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Uros. diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 7a7ecd4be87..dc0ecbc182e 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -5532,8 +5532,8 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; (define_insn "sse2_cvtpi2pd" - [(set (match_operand:V2DF 0 "register_operand" "=v,x") - (float:V2DF (match_operand:V2SI 1 "nonimmediate_operand" "vBm,?!y")))] + [(set (match_operand:V2DF 0 "register_operand" "=v,?!x") + (float:V2DF (match_operand:V2SI 1 "nonimmediate_operand" "vBm,yBm")))] "TARGET_SSE2" "@ %vcvtdq2pd\t{%1, %0|%0, %1} @@ -5545,6 +5545,21 @@ (set_attr "prefix" "maybe_vex,*") (set_attr "mode" "V2DF")]) +(define_expand "floatv2siv2df2" + [(set (match_operand:V2DF 0 "register_operand") + (float:V2DF (match_operand:V2SI 1 "nonimmediate_operand")))] + "TARGET_MMX_WITH_SSE") + +(define_insn "floatunsv2siv2df2" + [(set (match_operand:V2DF 0 "register_operand" "=v") + (unsigned_float:V2DF + (match_operand:V2SI 1 "nonimmediate_operand" "vm")))] + "TARGET_MMX_WITH_SSE && TARGET_AVX512VL" + "vcvtudq2pd\t{%1, %0|%0, %1}" + [(set_attr "type" "ssecvt") + (set_attr "prefix" "evex") + (set_attr "mode" "V2DF")]) + (define_insn "sse2_cvtpd2pi" [(set (match_operand:V2SI 0 "register_operand" "=v,?!y") (unspec:V2SI [(match_operand:V2DF 1 "vector_operand" "vBm,xBm")] @@ -5580,6 +5595,21 @@ (set_attr "prefix" "maybe_vex,*") (set_attr "mode" "TI")]) +(define_expand "fix_truncv2dfv2si2" + [(set (match_operand:V2SI 0 "register_operand") + (fix:V2SI (match_operand:V2DF 1 "vector_operand")))] + "TARGET_MMX_WITH_SSE") + +(define_insn "fixuns_truncv2dfv2si2" + [(set (match_operand:V2SI 0 "register_operand" "=v") + (unsigned_fix:V2SI + (match_operand:V2DF 1 "nonimmediate_operand" "vm")))] + "TARGET_MMX_WITH_SSE && TARGET_AVX512VL" + "vcvttpd2udq{x}\t{%1, %0|%0, %1}" + [(set_attr "type" "ssecvt") + (set_attr "prefix" "evex") + (set_attr "mode" "TI")]) + (define_insn "sse2_cvtsi2sd" [(set (match_operand:V2DF 0 "register_operand" "=x,x,v") (vec_merge:V2DF diff --git a/gcc/testsuite/gcc.target/i386/pr95046-6.c b/gcc/testsuite/gcc.target/i386/pr95046-6.c new file mode 100644 index 00000000000..dcc8999c446 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr95046-6.c @@ -0,0 +1,44 @@ +/* PR target/95046 */ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O3 -mavx512vl" } */ + + +double r[2]; +int s[2]; +unsigned int u[2]; + +void +test_float (void) +{ + for (int i = 0; i < 2; i++) + r[i] = s[i]; +} + +/* { dg-final { scan-assembler "\tvcvtdq2pd" } } */ + +void +test_ufloat (void) +{ + for (int i = 0; i < 2; i++) + r[i] = u[i]; +} + +/* { dg-final { scan-assembler "\tvcvtudq2pd" } } */ + +void +test_fix (void) +{ + for (int i = 0; i < 2; i++) + s[i] = r[i]; +} + +/* { dg-final { scan-assembler "\tvcvttpd2dqx" } } */ + +void +test_ufix (void) +{ + for (int i = 0; i < 2; i++) + u[i] = r[i]; +} + +/* { dg-final { scan-assembler "\tvcvttpd2udqx" } } */