From patchwork Thu Apr 30 03:05:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1279886 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49CKyk5b6cz9sSg for ; Thu, 30 Apr 2020 13:06:06 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=N6+4+EY8; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 49CKyk3jVDzDrBZ for ; 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Thu, 30 Apr 2020 13:05:53 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1588215953; bh=I9J7T5v1jZpHChIRr5cWhIQiOo6WCiz3Qcud5yBElYA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=N6+4+EY8XbR0qPz+J1ZKpfGtb3e8ZzjRB3asBwD8SjP6C6AnQr2JYIYyAAwyLVOc0 +lwArCZXo9aJ0EsseGMFh8X0Ic2pnPMtAJ9lhZJYAinzCF4Pc34yBTl8TyJnQy/BYC PoqWMApHjksz3B6ESMezz7DDqzxi0ZzL53gTkFq5fBoirrFi9auXTmMkyIohyCVaqS TpB+64joHTgS7sht4eY/83v3PUCFN89+ehwcei0qRaio41WSDEwhRYuQ9V0wsboBWA O+kBiXMcQqasGaqvHt+zcMWdH03w32mpkDEabj28XzwGtJKrqephUCLEWEG3dYplB5 FLvJAdNNaFWjg== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Thu, 30 Apr 2020 13:05:34 +1000 Message-Id: <20200430030544.234289-2-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.4 In-Reply-To: <20200430030544.234289-1-amitay@ozlabs.org> References: <20200430030544.234289-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH 01/11] dts: Rename p9-kernel to bmc-kernel X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs Reviewed-by: Alistair Popple --- Makefile.am | 6 +++--- p9-kernel.dts.m4 => bmc-kernel.dts.m4 | 0 libpdbg/dtb.c | 6 +++--- tests/test_p9_fapi_translation.sh | 2 +- 4 files changed, 7 insertions(+), 7 deletions(-) rename p9-kernel.dts.m4 => bmc-kernel.dts.m4 (100%) diff --git a/Makefile.am b/Makefile.am index 74ad99f..041ec01 100644 --- a/Makefile.am +++ b/Makefile.am @@ -36,7 +36,7 @@ TESTS = $(libpdbg_tests) optcmd_test $(PDBG_TESTS) tests/test_tree2.sh: fake2.dtb tests/test_prop.sh: fake.dtb -tests/test_p9_fapi_translation.sh: p9.dtb p9-kernel.dtb +tests/test_p9_fapi_translation.sh: p9.dtb bmc-kernel.dtb test: $(libpdbg_tests) @@ -56,7 +56,7 @@ EXTRA_DIST = \ p8-pib.dts.m4 \ p9-fsi.dtsi.m4 \ p9-host.dts.m4 \ - p9-kernel.dts.m4 \ + bmc-kernel.dts.m4 \ p9-pib.dts.m4 \ p9r-fsi.dts.m4 \ p9w-fsi.dts.m4 \ @@ -79,7 +79,7 @@ endif DT = fake.dts fake2.dts p8-cronus.dts p9-cronus.dts \ p8-fsi.dts p8-i2c.dts p8-kernel.dts \ - p9w-fsi.dts p9r-fsi.dts p9z-fsi.dts p9-kernel.dts \ + p9w-fsi.dts p9r-fsi.dts p9z-fsi.dts bmc-kernel.dts \ p9-sbefifo.dts \ p8-host.dts p9-host.dts p8.dts diff --git a/p9-kernel.dts.m4 b/bmc-kernel.dts.m4 similarity index 100% rename from p9-kernel.dts.m4 rename to bmc-kernel.dts.m4 diff --git a/libpdbg/dtb.c b/libpdbg/dtb.c index a549c2f..f9573a6 100644 --- a/libpdbg/dtb.c +++ b/libpdbg/dtb.c @@ -38,7 +38,7 @@ #include "p9w-fsi.dt.h" #include "p9r-fsi.dt.h" #include "p9z-fsi.dt.h" -#include "p9-kernel.dt.h" +#include "bmc-kernel.dt.h" #include "p8-host.dt.h" #include "p9-host.dt.h" #include "p8-cronus.dt.h" @@ -195,7 +195,7 @@ static void bmc_target(struct pdbg_dtb *dtb) dtb->system.fdt = &_binary_p8_dtb_o_start; } else if (!strcmp(pdbg_backend_option, "p9")) { if (!dtb->backend.fdt) - dtb->backend.fdt = &_binary_p9_kernel_dtb_o_start; + dtb->backend.fdt = &_binary_bmc_kernel_dtb_o_start; if (!dtb->system.fdt) dtb->system.fdt = &_binary_p9_dtb_o_start; } else { @@ -234,7 +234,7 @@ static void bmc_target(struct pdbg_dtb *dtb) case CHIP_ID_P9P: pdbg_log(PDBG_INFO, "Found a POWER9 OpenBMC based system\n"); if (!dtb->backend.fdt) - dtb->backend.fdt = &_binary_p9_kernel_dtb_o_start; + dtb->backend.fdt = &_binary_bmc_kernel_dtb_o_start; if (!dtb->system.fdt) dtb->system.fdt = &_binary_p9_dtb_o_start; break; diff --git a/tests/test_p9_fapi_translation.sh b/tests/test_p9_fapi_translation.sh index a5a09b1..fbb194d 100755 --- a/tests/test_p9_fapi_translation.sh +++ b/tests/test_p9_fapi_translation.sh @@ -4,7 +4,7 @@ test_group "p9 fapi translation tests" -export PDBG_BACKEND_DTB=p9-kernel.dtb +export PDBG_BACKEND_DTB=bmc-kernel.dtb export PDBG_DTB=p9.dtb test_result 0 < X-Patchwork-Id: 1279887 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49CKyp3pLpz9sSg for ; Thu, 30 Apr 2020 13:06:10 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=kURsWNCW; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 49CKyp1xjXzDrBZ for ; Thu, 30 Apr 2020 13:06:10 +1000 (AEST) X-Original-To: pdbg@lists.ozlabs.org Delivered-To: pdbg@lists.ozlabs.org Received: from ozlabs.org (bilbo.ozlabs.org [203.11.71.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 49CKyV1V8BzDr8t for ; Thu, 30 Apr 2020 13:05:54 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=ozlabs.org Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=kURsWNCW; dkim-atps=neutral Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 49CKyT5pM5z9sSd; Thu, 30 Apr 2020 13:05:53 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1588215953; bh=tEf3cdcR9IhK9XF9a+xZwO6M/x+udkKM4TpL+To4gbM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kURsWNCWtkN+QiUlZsm0uJQVabgFEOviyKd0fpk4bbh8l6jQsqjhLyTNexTyoEar7 SzE1SdEiTR30GsoqXHBJngsmBejDC+ou25DqXoKZaWb80xSMEF1Pbj/1CuZnDt2oA3 rWG7xbC2QgTOsWzt/NmV5CYeaPgKJ/ibiMDvYG9l/x7nlF2kI94kYHMcw6YY0RqEN7 +hgSWRirIK2rggNcYEdDqboPx/kLfCMlN5sCBBU7JMlV3cFB94RrWMq05pT47nuZRT wi0Lcio+AtuhIwNUgCbo7uQeWZ40y3tqM1lQISGab8Q/l4f0+dXSFPGySLv2ttS7JG YXA1OJ+3COyhw== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Thu, 30 Apr 2020 13:05:35 +1000 Message-Id: <20200430030544.234289-3-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.4 In-Reply-To: <20200430030544.234289-1-amitay@ozlabs.org> References: <20200430030544.234289-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH 02/11] dts: Populate all possible chips in bmc-kernel device tree X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs Reviewed-by: Alistair Popple --- bmc-kernel.dts.m4 | 166 ++++++++++++++++++++++++++-------------------- 1 file changed, 93 insertions(+), 73 deletions(-) diff --git a/bmc-kernel.dts.m4 b/bmc-kernel.dts.m4 index 5c8010f..7cf43cf 100644 --- a/bmc-kernel.dts.m4 +++ b/bmc-kernel.dts.m4 @@ -1,90 +1,110 @@ -/dts-v1/; +dnl +dnl PIB([addr], [index], [path-index]) +dnl +define(`PIB', +` + pib@$1 { + #address-cells = <0x2>; + #size-cells = <0x1>; + reg = <0x0 0x$1 0x7>; + compatible = "ibm,kernel-pib"; + index = <0x$2>; + device-path = "/dev/scom$3"; + system-path = "/proc$2/pib"; + }; +')dnl -/ { - #address-cells = <0x1>; - #size-cells = <0x0>; +dnl +dnl SBEFIFO([index], [path-index]) +dnl +define(`SBEFIFO', +` + sbefifo@2400 { /* Bogus address */ + reg = <0x0 0x2400 0x7>; + compatible = "ibm,kernel-sbefifo"; + index = <0x$1>; + device-path = "/dev/sbefifo$2"; + + sbefifo-mem { + compatible = "ibm,sbefifo-mem"; + index = <0x$1>; + system-path = "/mem$1"; + }; + + sbefifo-pba { + compatible = "ibm,sbefifo-mem-pba"; + index = <0x$1>; + system-path = "/mempba$1"; + }; + + sbefifo-chipop { + compatible = "ibm,sbefifo-chipop"; + index = <0x$1>; + }; + }; +')dnl - fsi0: kernelfsi@0 { +dnl +dnl FSI_PRE([addr], [index], [path-index]) +dnl +define(`FSI_PRE', +` + fsi@$1 { #address-cells = <0x2>; #size-cells = <0x1>; + reg = <0x0 0x$1 0x8000>; compatible = "ibm,kernel-fsi"; - reg = <0x0 0x0 0x0>; - index = <0x0>; + index = <0x$2>; + system-path = "/proc$2/fsi"; status = "mustexist"; - system-path = "/proc0/fsi"; - pib@1000 { - #address-cells = <0x2>; - #size-cells = <0x1>; - reg = <0x0 0x1000 0x7>; - index = <0x0>; - compatible = "ibm,kernel-pib"; - device-path = "/dev/scom1"; - system-path = "/proc0/pib"; - }; - - sbefifo@2400 { /* Bogus address */ - reg = <0x0 0x2400 0x7>; - index = <0x0>; - compatible = "ibm,kernel-sbefifo"; - device-path = "/dev/sbefifo1"; + PIB(1000, $2, $3) + SBEFIFO($2, $3) +')dnl - sbefifo-mem { - compatible = "ibm,sbefifo-mem"; - system-path = "/mem0"; - }; +dnl +dnl FSI_POST() +dnl +define(`FSI_POST', +` + }; +')dnl - sbefifo-pba { - compatible = "ibm,sbefifo-mem-pba"; - system-path = "/mempba0"; - }; +dnl +dnl HMFSI([addr], [port], [index], [path-index]) +dnl +define(`HMFSI', +` + hmfsi@$1 { + #address-cells = <0x2>; + #size-cells = <0x1>; + reg = <0x0 0x$1 0x8000>; + compatible = "ibm,fsi-hmfsi"; + port = <0x$2>; + index = <0x$3>; + system-path = "/proc$3/fsi"; - sbefifo-chipop { - compatible = "ibm,sbefifo-chipop"; - index = <0x0>; - }; - }; + PIB(1000, $3, $4) + SBEFIFO($3, $4) + }; +')dnl - hmfsi@100000 { - #address-cells = <0x2>; - #size-cells = <0x1>; - compatible = "ibm,fsi-hmfsi"; - reg = <0x0 0x100000 0x8000>; - port = <0x1>; - index = <0x1>; - system-path = "/proc1/fsi"; - pib@1000 { - #address-cells = <0x2>; - #size-cells = <0x1>; - reg = <0x0 0x1000 0x7>; - index = <0x1>; - compatible = "ibm,kernel-pib"; - device-path = "/dev/scom2"; - system-path = "/proc1/pib"; - }; +/dts-v1/; - sbefifo@2400 { /* Bogus address */ - reg = <0x0 0x2400 0x7>; - index = <0x1>; - compatible = "ibm,kernel-sbefifo"; - device-path = "/dev/sbefifo2"; +/ { + #address-cells = <0x1>; + #size-cells = <0x0>; - sbefifo-mem { - compatible = "ibm,sbefifo-mem"; - system-path = "/mem1"; - }; + FSI_PRE(0, 0, 1) - sbefifo-pba { - compatible = "ibm,sbefifo-mem-pba"; - system-path = "/mempba1"; - }; + HMFSI(100000, 1, 1, 2) + HMFSI(180000, 2, 2, 3) + HMFSI(200000, 3, 3, 4) + HMFSI(280000, 4, 4, 5) + HMFSI(300000, 5, 5, 6) + HMFSI(380000, 6, 6, 7) + HMFSI(400000, 7, 7, 8) - sbefifo-chipop { - compatible = "ibm,sbefifo-chipop"; - index = <0x1>; - }; - }; - }; - }; + FSI_POST() }; From patchwork Thu Apr 30 03:05:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1279888 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49CKys69M2z9sSg for ; Thu, 30 Apr 2020 13:06:13 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=ODBtDkq1; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 49CKys534TzDr9B for ; Thu, 30 Apr 2020 13:06:13 +1000 (AEST) X-Original-To: pdbg@lists.ozlabs.org Delivered-To: pdbg@lists.ozlabs.org Received: from ozlabs.org (bilbo.ozlabs.org [IPv6:2401:3900:2:1::2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 49CKyV4TKqzDr8t for ; Thu, 30 Apr 2020 13:05:54 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=ozlabs.org Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=ODBtDkq1; dkim-atps=neutral Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 49CKyV1t1Cz9sSj; Thu, 30 Apr 2020 13:05:54 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1588215954; bh=l2Cgrt9mQeuvJ29XLLvAatAFZcCOVGCLArTWqHN+g7g=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ODBtDkq1aOWSCceX5tJWFFNH1er3Wb6DUloqxSTmyT6RirmTmJCXM4NO+l1LKIhez GQ/Vws80dV7uM2rx1StXnbELXJ46n13awwj75zayXpg7qkAmi5an8Gz96FxFtpO4th 4NuBKZYNjm+QPX4Sk4hVZFrr+ik9n9AohkOIEYN84kDKTUbv9leQPOi9FVZGEtsefA C/327eZFDr+QHFhSZmaietyOq1Kcr5WjQ0xQ98vXKlxgrBjbMy/lixkwdzGQJ2yCYJ qtt9M7vH/HpJEp10wYb6j0bqJ5viEy16kdTvznmiONQqfv+NvduBgkGTKveYpx6C5n 7VxYUkrATcRmg== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Thu, 30 Apr 2020 13:05:36 +1000 Message-Id: <20200430030544.234289-4-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.4 In-Reply-To: <20200430030544.234289-1-amitay@ozlabs.org> References: <20200430030544.234289-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH 03/11] dts: Rename p9-cronus to bmc-cronus X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs Reviewed-by: Alistair Popple --- Makefile.am | 2 +- p9-cronus.dts.m4 => bmc-cronus.dts.m4 | 0 libpdbg/dtb.c | 4 ++-- 3 files changed, 3 insertions(+), 3 deletions(-) rename p9-cronus.dts.m4 => bmc-cronus.dts.m4 (100%) diff --git a/Makefile.am b/Makefile.am index 041ec01..4b53c80 100644 --- a/Makefile.am +++ b/Makefile.am @@ -77,7 +77,7 @@ if TARGET_PPC ARCH_FLAGS="-DTARGET_PPC=1" endif -DT = fake.dts fake2.dts p8-cronus.dts p9-cronus.dts \ +DT = fake.dts fake2.dts p8-cronus.dts bmc-cronus.dts \ p8-fsi.dts p8-i2c.dts p8-kernel.dts \ p9w-fsi.dts p9r-fsi.dts p9z-fsi.dts bmc-kernel.dts \ p9-sbefifo.dts \ diff --git a/p9-cronus.dts.m4 b/bmc-cronus.dts.m4 similarity index 100% rename from p9-cronus.dts.m4 rename to bmc-cronus.dts.m4 diff --git a/libpdbg/dtb.c b/libpdbg/dtb.c index f9573a6..6a9fc73 100644 --- a/libpdbg/dtb.c +++ b/libpdbg/dtb.c @@ -42,7 +42,7 @@ #include "p8-host.dt.h" #include "p9-host.dt.h" #include "p8-cronus.dt.h" -#include "p9-cronus.dt.h" +#include "bmc-cronus.dt.h" #include "p9-sbefifo.dt.h" #include "p8.dt.h" @@ -413,7 +413,7 @@ struct pdbg_dtb *pdbg_default_dtb(void *system_fdt) dtb->system.fdt = &_binary_p8_dtb_o_start; } else if (!strncmp(pdbg_backend_option, "p9", 2)) { if (!dtb->backend.fdt) - dtb->backend.fdt = &_binary_p9_cronus_dtb_o_start; + dtb->backend.fdt = &_binary_bmc_cronus_dtb_o_start; if (!dtb->system.fdt) dtb->system.fdt = &_binary_p9_dtb_o_start; } else { From patchwork Thu Apr 30 03:05:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1279889 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49CKyy2QCgz9sSd for ; Thu, 30 Apr 2020 13:06:18 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=fAGWPv0I; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 49CKyx1MjHzDrBm for ; Thu, 30 Apr 2020 13:06:17 +1000 (AEST) X-Original-To: pdbg@lists.ozlabs.org Delivered-To: pdbg@lists.ozlabs.org Received: from ozlabs.org (bilbo.ozlabs.org [IPv6:2401:3900:2:1::2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 49CKyW3dLZzDr8t for ; Thu, 30 Apr 2020 13:05:55 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=ozlabs.org Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=fAGWPv0I; dkim-atps=neutral Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 49CKyV4s6Wz9sSd; Thu, 30 Apr 2020 13:05:54 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1588215954; bh=zACoKkQahugGBDMAD41tk1S5ko+/jKI8CcqL5eUdkJ4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fAGWPv0IMJHwUUXMPzOk4u+oPmNgj3odwd6o2ONk+1Vy8heBdjUYwynrz/wCTHbP5 Rr+4GXsruLsCUexIRefPL4UWzZtQujygLP96suJG8eXSyb15xG/+2kxRjTeJ6YWV9S z9oGs94TJcSMooyAfEsiwAaXO09Na12WAbwoeTBDXaU0QtTNAmmdKZ5zMxD4NlxaPr LFfOx8w3xCQ6HE4qjnkr33VjubQmwUsPbfPJQezx0sntzffc9RqByF4EDkaQrYa/G4 +aBXf+2M8ciE6o97RXLH0P7iKvwc3Vpi/SKwNJT1tWk3Hm/yQYRBPw8KqkmcCVJG8W IUUDw7w78K1vw== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Thu, 30 Apr 2020 13:05:37 +1000 Message-Id: <20200430030544.234289-5-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.4 In-Reply-To: <20200430030544.234289-1-amitay@ozlabs.org> References: <20200430030544.234289-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH 04/11] dts: Populate all possible chips in bmc-cronus device tree X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs Reviewed-by: Alistair Popple --- bmc-cronus.dts.m4 | 73 +++++++++++++++++++---------------------------- 1 file changed, 29 insertions(+), 44 deletions(-) diff --git a/bmc-cronus.dts.m4 b/bmc-cronus.dts.m4 index b9173b2..1ec49b5 100644 --- a/bmc-cronus.dts.m4 +++ b/bmc-cronus.dts.m4 @@ -1,67 +1,52 @@ -/dts-v1/; - -/ { - fsi0 { - compatible = "ibm,cronus-fsi"; - index = <0x0>; - system-path = "/proc0/fsi"; - }; - - pib0 { - compatible = "ibm,cronus-pib"; - index = <0x0>; - system-path = "/proc0/pib"; - }; - - fsi1 { +dnl +dnl CHIP([index]) +dnl +define(`CHIP', +` + fsi$1 { compatible = "ibm,cronus-fsi"; - index = <0x1>; - system-path = "/proc1/fsi"; + index = <0x$1>; + system-path = "/proc$1/fsi"; }; - pib1 { + pib$1 { compatible = "ibm,cronus-pib"; - index = <0x1>; - system-path = "/proc1/pib"; + index = <0x$1>; + system-path = "/proc$1/pib"; }; - sbefifo0 { - index = <0x0>; + sbefifo$1 { compatible = "ibm,cronus-sbefifo"; + index = <0x$1>; sbefifo-chipop { compatible = "ibm,sbefifo-chipop"; - index = <0x0>; + index = <0x$1>; }; sbefifo-mem { compatible = "ibm,sbefifo-mem"; - system-path = "/mem0"; + index = <0x$1>; + system-path = "/mem$1"; }; sbefifo-pba { compatible = "ibm,sbefifo-mem-pba"; - system-path = "/mempba0"; + index = <0x$1>; + system-path = "/mempba$1"; }; }; +')dnl - sbefifo1 { - index = <0x1>; - compatible = "ibm,cronus-sbefifo"; - - sbefifo-chipop { - compatible = "ibm,sbefifo-chipop"; - index = <0x1>; - }; - - sbefifo-mem { - compatible = "ibm,sbefifo-mem"; - system-path = "/mem1"; - }; +/dts-v1/; - sbefifo-pba { - compatible = "ibm,sbefifo-mem-pba"; - system-path = "/mempba1"; - }; - }; +/ { + CHIP(0) + CHIP(1) + CHIP(2) + CHIP(3) + CHIP(4) + CHIP(5) + CHIP(6) + CHIP(7) }; From patchwork Thu Apr 30 03:05:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1279890 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49CKz13XP1z9sSd for ; Thu, 30 Apr 2020 13:06:21 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=mX1OST39; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 49CKz12YtszDr9C for ; Thu, 30 Apr 2020 13:06:21 +1000 (AEST) X-Original-To: pdbg@lists.ozlabs.org Delivered-To: pdbg@lists.ozlabs.org Received: from ozlabs.org (bilbo.ozlabs.org [203.11.71.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 49CKyW5tpszDr94 for ; Thu, 30 Apr 2020 13:05:55 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=ozlabs.org Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=mX1OST39; dkim-atps=neutral Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 49CKyW44V0z9sSk; Thu, 30 Apr 2020 13:05:55 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1588215955; bh=VaNEBLkEi2od1eTS6jZMJu+OsaB1ZfGGxzdS88KwiPI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mX1OST39H+2bCx/T/emX78hnL2ZwAbnUNrOM1kNhrI9/NaKImRxn5L65qKhvA5qag zmFmhVlLTZ9NWTCP3BGF65xlRtMzwZPV+wasKU1d9rL/EUYWtaZ2OzEWRlpIZJCZ8q fwbx0MIRxefdTb62uAVlHOmjmAfUdBa2AYSciuVwj1fPs8VFfAuq8dtPQbfW+lmAj8 cBLRTXRkBJgev5wf41T0y/3+Op+kosx++h+nD2eydO1WKImgT9ncgZF9WkUSr2M0lc przuL8z/yMNWXAe+oypcYfo8Ppvoa4KH9cpJ0SjXQVdZb8YmaXkSk1ZXfMc0HVti5+ okG0Us4XOju1Q== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Thu, 30 Apr 2020 13:05:38 +1000 Message-Id: <20200430030544.234289-6-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.4 In-Reply-To: <20200430030544.234289-1-amitay@ozlabs.org> References: <20200430030544.234289-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH 05/11] dts: Rename p9-sbefifo to bmc-sbefifo X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs Reviewed-by: Alistair Popple --- Makefile.am | 2 +- p9-sbefifo.dts.m4 => bmc-sbefifo.dts.m4 | 0 libpdbg/dtb.c | 4 ++-- 3 files changed, 3 insertions(+), 3 deletions(-) rename p9-sbefifo.dts.m4 => bmc-sbefifo.dts.m4 (100%) diff --git a/Makefile.am b/Makefile.am index 4b53c80..64f3e0b 100644 --- a/Makefile.am +++ b/Makefile.am @@ -80,7 +80,7 @@ endif DT = fake.dts fake2.dts p8-cronus.dts bmc-cronus.dts \ p8-fsi.dts p8-i2c.dts p8-kernel.dts \ p9w-fsi.dts p9r-fsi.dts p9z-fsi.dts bmc-kernel.dts \ - p9-sbefifo.dts \ + bmc-sbefifo.dts \ p8-host.dts p9-host.dts p8.dts DT_sources = $(DT:.dts=.dtb.S) p9.dtb.S diff --git a/p9-sbefifo.dts.m4 b/bmc-sbefifo.dts.m4 similarity index 100% rename from p9-sbefifo.dts.m4 rename to bmc-sbefifo.dts.m4 diff --git a/libpdbg/dtb.c b/libpdbg/dtb.c index 6a9fc73..5013d96 100644 --- a/libpdbg/dtb.c +++ b/libpdbg/dtb.c @@ -43,7 +43,7 @@ #include "p9-host.dt.h" #include "p8-cronus.dt.h" #include "bmc-cronus.dt.h" -#include "p9-sbefifo.dt.h" +#include "bmc-sbefifo.dt.h" #include "p8.dt.h" #include "p9.dt.h" @@ -431,7 +431,7 @@ struct pdbg_dtb *pdbg_default_dtb(void *system_fdt) if (!strcmp(pdbg_backend_option, "p9")) { if (!dtb->backend.fdt) - dtb->backend.fdt = &_binary_p9_sbefifo_dtb_o_start; + dtb->backend.fdt = &_binary_bmc_sbefifo_dtb_o_start; if (!dtb->system.fdt) dtb->system.fdt = &_binary_p9_dtb_o_start; } else { From patchwork Thu Apr 30 03:05:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1279891 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49CKz626hyz9sSg for ; Thu, 30 Apr 2020 13:06:26 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=m3KVKYYn; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 49CKz610mqzDrBc for ; Thu, 30 Apr 2020 13:06:26 +1000 (AEST) X-Original-To: pdbg@lists.ozlabs.org Delivered-To: pdbg@lists.ozlabs.org Received: from ozlabs.org (bilbo.ozlabs.org [IPv6:2401:3900:2:1::2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 49CKyX1PGKzDr8t for ; Thu, 30 Apr 2020 13:05:56 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=ozlabs.org Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=m3KVKYYn; dkim-atps=neutral Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 49CKyW6XFBz9sSj; Thu, 30 Apr 2020 13:05:55 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1588215956; bh=ggyfXtn3GIc52mHqCiwBbdTTue80Tp6duah6wObs4U4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=m3KVKYYn9vlSeygjIwk4/aV2bFarDRkbflYIQB7muywpg8JH1cA5QxawvDnBtiQiK KgyM2df50Wcgsx5o/EalHAQ7wK5rru1BkKmv2FlhP6Ma9b/rIYFfNYU8+QXUCQodC6 qoLuVRrYLsm3dfJeLARBeGSOf70rVFXGD9hhuyP08Dsx5pgq0NqfKw8UPnpWi5hmcv dl25EvVQgo1FX4/vv+wOdRIOCWXBaxrWw9F0D1eYRFk5YLcZzXq4cKwHy/cZK7olvf aUQej/UVKdKhazRJPY0cNT0qBWgGA3SBl06Yo2d3hEtmLus5D+7u9/w11nBarPeAzB vRPOsJcQZwpaQ== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Thu, 30 Apr 2020 13:05:39 +1000 Message-Id: <20200430030544.234289-7-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.4 In-Reply-To: <20200430030544.234289-1-amitay@ozlabs.org> References: <20200430030544.234289-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH 06/11] dts: Populate all possible chips in bmc-sbefifo device tree X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs Reviewed-by: Alistair Popple --- bmc-sbefifo.dts.m4 | 152 +++++++++++++++++++++++++-------------------- 1 file changed, 83 insertions(+), 69 deletions(-) diff --git a/bmc-sbefifo.dts.m4 b/bmc-sbefifo.dts.m4 index 48b3051..f4ec4ab 100644 --- a/bmc-sbefifo.dts.m4 +++ b/bmc-sbefifo.dts.m4 @@ -1,86 +1,100 @@ -/dts-v1/; +dnl +dnl SBEFIFO([index], [path-index]) +dnl +define(`SBEFIFO', +` + sbefifo@2400 { /* Bogus address */ + reg = <0x0 0x2400 0x7>; + compatible = "ibm,kernel-sbefifo"; + index = <0x$1>; + device-path = "/dev/sbefifo$2"; -/ { - #address-cells = <0x1>; - #size-cells = <0x0>; + sbefifo-pib { + #address-cells = <0x2>; + #size-cells = <0x1>; + compatible = "ibm,sbefifo-pib"; + index = <0x$1>; + system-path = "/proc$1/pib"; + }; + + sbefifo-mem { + compatible = "ibm,sbefifo-mem"; + index = <0x$1>; + system-path = "/mem$1"; + }; + + sbefifo-pba { + compatible = "ibm,sbefifo-mem-pba"; + index = <0x$1>; + system-path = "/mempba$1"; + }; + + sbefifo-chipop { + compatible = "ibm,sbefifo-chipop"; + index = <0x$1>; + }; + }; +')dnl - fsi0: kernelfsi@0 { +dnl +dnl FSI_PRE([addr], [index], [path-index]) +dnl +define(`FSI_PRE', +` + fsi@$1 { #address-cells = <0x2>; #size-cells = <0x1>; compatible = "ibm,kernel-fsi"; - reg = <0x0 0x0 0x0>; - index = <0x0>; + reg = <0x0 0x$1 0x8000>; + index = <0x$2>; status = "mustexist"; - system-path = "/proc0/fsi"; + system-path = "/proc$2/fsi"; - sbefifo@2400 { /* Bogus address */ - reg = <0x0 0x2400 0x7>; - index = <0x0>; - compatible = "ibm,kernel-sbefifo"; - device-path = "/dev/sbefifo1"; + SBEFIFO($2, $3) +')dnl - sbefifo-pib { - #address-cells = <0x2>; - #size-cells = <0x1>; - index = <0x0>; - compatible = "ibm,sbefifo-pib"; - system-path = "/proc0/pib"; - }; - - sbefifo-mem { - compatible = "ibm,sbefifo-mem"; - system-path = "/mem0"; - }; +dnl +dnl FSI_POST() +dnl +define(`FSI_POST', +` + }; +')dnl - sbefifo-pba { - compatible = "ibm,sbefifo-mem-pba"; - system-path = "/mempba0"; - }; +dnl +dnl HMFSI([addr], [port], [index], [path-index]) +dnl +define(`HMFSI', +` + hmfsi@$1 { + #address-cells = <0x2>; + #size-cells = <0x1>; + compatible = "ibm,fsi-hmfsi"; + reg = <0x0 0x$1 0x8000>; + port = <0x$2>; + index = <0x$3>; + system-path = "/proc$3/fsi"; - sbefifo-chipop { - compatible = "ibm,sbefifo-chipop"; - index = <0x0>; - }; - }; + SBEFIFO($3, $4) + }; +')dnl - hmfsi@100000 { - #address-cells = <0x2>; - #size-cells = <0x1>; - compatible = "ibm,fsi-hmfsi"; - reg = <0x0 0x100000 0x8000>; - port = <0x1>; - index = <0x1>; - system-path = "/proc1/fsi"; - sbefifo@2400 { /* Bogus address */ - reg = <0x0 0x2400 0x7>; - index = <0x1>; - compatible = "ibm,kernel-sbefifo"; - device-path = "/dev/sbefifo2"; +/dts-v1/; - sbefifo-pib { - #address-cells = <0x2>; - #size-cells = <0x1>; - index = <0x1>; - compatible = "ibm,sbefifo-pib"; - system-path = "/proc1/pib"; - }; +/ { + #address-cells = <0x1>; + #size-cells = <0x0>; - sbefifo-mem { - compatible = "ibm,sbefifo-mem"; - system-path = "/mem1"; - }; + FSI_PRE(0, 0, 1) - sbefifo-pba { - compatible = "ibm,sbefifo-mem-pba"; - system-path = "/mempba1"; - }; + HMFSI(100000, 1, 1, 2) + HMFSI(180000, 2, 2, 3) + HMFSI(200000, 3, 3, 4) + HMFSI(280000, 4, 4, 5) + HMFSI(300000, 5, 5, 6) + HMFSI(380000, 6, 6, 7) + HMFSI(400000, 7, 7, 8) - sbefifo-chipop { - compatible = "ibm,sbefifo-chipop"; - index = <0x1>; - }; - }; - }; - }; + FSI_POST() }; From patchwork Thu Apr 30 03:05:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1279892 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49CKz86n7Kz9sSd for ; Thu, 30 Apr 2020 13:06:28 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=Nb0uDJk9; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 49CKz84ZtdzDrC8 for ; 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Thu, 30 Apr 2020 13:05:56 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1588215956; bh=uZqHWs68P6/hxCanc4p0eE2aMTH2k33LZ5M9P2JpAkI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Nb0uDJk9J07t/w5PbksFabQugEQqQwwkN3PZ7+wJoEUEGk2o6PYiynj3RaNnkl0w2 MyvEiLOwtyMdVNg/Z/1s0UPkaJUjNN3fp0P8ICDfJ1eaVSV8nFueo1xlWC6YkcAsg1 WDPZsPkq0IaeMF0/oee0jyWSZaemUIG+BLlILI6Ahc1/H4PhLSvTEwpIFCeliWVMeF Y+xfY0yb83RBi6hH/H+tRcaW4mxobbnT7BFGF7IvVGjdbI+4yqOBOCI+3txYcEPGhQ eIF8vMUqS3kHh2z6yBlI3mFHtE3VKXptUtrvX/mHeasJdhTTLMEkogPzWgW9hlVTN9 bmO4E9tf2He0A== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Thu, 30 Apr 2020 13:05:40 +1000 Message-Id: <20200430030544.234289-8-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.4 In-Reply-To: <20200430030544.234289-1-amitay@ozlabs.org> References: <20200430030544.234289-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH 07/11] dts: Generate p9.dts X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs Reviewed-by: Alistair Popple --- p9.dts => p9.dts.m4 | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename p9.dts => p9.dts.m4 (100%) diff --git a/p9.dts b/p9.dts.m4 similarity index 100% rename from p9.dts rename to p9.dts.m4 From patchwork Thu Apr 30 03:05:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1279900 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49CMlH3Tqdz9sSM for ; Thu, 30 Apr 2020 14:26:19 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=mhBaHHmL; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 49CMlH2g8SzDrBj for ; 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Thu, 30 Apr 2020 13:05:56 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1588215957; bh=addd2QoC8AWtUCA7tDo1NaD9xhQHa71x/9eXoduGCSI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mhBaHHmLTRvnl96PFsAQiQYmBzJtmoQRozFc0tGaJrqo3ZHVT4HMiJTOqQlenpYiR u7qr9/mY5ZqiGLe9CYhhIkkryWHA0ZmH6htAnhUM+BVg4NwJro3Oo9JaZ1yx57cFph j7T7CCftt1FWs2Tq7srRfqGv4i97Tb/a2WyxKBTg/MjNfu6mK9inShdby8EjejQVf6 LIfCGK6xV69BSTc29DtPHqfpihdd0Nf4YYVmNhgsT7ZMEcRHBXzaGKlCJMe0x8i3z4 qB8kw5U17Sye4l7IQSDhPDa3Ymq2CDDLNJ+wMXM8seHX0xi0QwUZ6KXizkaoFLyd9S EM0H5kK7dlGeA== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Thu, 30 Apr 2020 13:05:41 +1000 Message-Id: <20200430030544.234289-9-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.4 In-Reply-To: <20200430030544.234289-1-amitay@ozlabs.org> References: <20200430030544.234289-1-amitay@ozlabs.org> MIME-Version: 1.0 X-Mailman-Approved-At: Thu, 30 Apr 2020 14:26:17 +1000 Subject: [Pdbg] [PATCH 08/11] dts: Populate all possible chips in p9 system tree X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Convert repeated patterns to m4 macros to avoid errors. Signed-off-by: Amitay Isaacs --- p9.dts.m4 | 3211 ++--------------------------- tests/test_p9_fapi_translation.sh | 774 +++++++ 2 files changed, 988 insertions(+), 2997 deletions(-) diff --git a/p9.dts.m4 b/p9.dts.m4 index 1e99937..6cdfba4 100644 --- a/p9.dts.m4 +++ b/p9.dts.m4 @@ -1,61 +1,146 @@ -/dts-v1/; - -/ { - - mem0 { - index = < 0x00 >; +define(`CONCAT', `$1$2')dnl + +dnl +dnl CORE([index]) +dnl +define(`THREAD', +` + thread@$1 { + reg = <0x00>; + compatible = "ibm,power-thread", "ibm,power9-thread"; + tid = <0x$1>; + index = <0x$1>; + }; +')dnl + +dnl +dnl CORE([index]) +dnl +define(`CORE', +` + core@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00 0x00 0xfffff>; + compatible = "ibm,power-core", "ibm,power9-core"; + index = <0x$1>; + + THREAD(0) + THREAD(1) + THREAD(2) + THREAD(3) + }; +')dnl + +dnl +dnl CHIPLET__([index]) +dnl +define(`CHIPLET__', +`define(`addr', CONCAT($1, 000000))dnl + + CONCAT(chiplet@, addr) { + reg = <0x00 CONCAT(0x,addr) 0xfffff>; + compatible = "ibm,power9-chiplet"; + index = <0x$1>; + +')dnl + +dnl +dnl CHIPLET_([index]) +dnl +define(`CHIPLET_', +`define(`addr', CONCAT($1, 000000))dnl + + CONCAT(chiplet@, addr) { + #address-cells = <0x02>; + #size-cells = <0x01>; + reg = <0x00 CONCAT(0x,addr) 0xfffff>; + compatible = "ibm,power9-chiplet"; + index = <0x$1>; + +')dnl + +dnl +dnl EQ_([index]) +dnl +define(`EQ_', +`define(`chiplet_id', CONCAT(1, $1))dnl +define(`addr', CONCAT(chiplet_id, 000000))dnl + + eq@$1 { + #address-cells = <0x02>; + #size-cells = <0x01>; + reg = <0x00 CONCAT(0x,addr) 0xfffff>; + compatible = "ibm,power9-eq"; + index = <$1>; + +')dnl + +dnl +dnl EX_([eq_index, ex_index]) +dnl +define(`EX_', +`define(`chiplet_id', CONCAT(1, $1))dnl +define(`addr', CONCAT(chiplet_id, 000000))dnl + + ex@$2 { + #address-cells = <0x02>; + #size-cells = <0x01>; + reg = <0x00 CONCAT(0x,addr) 0xfffff>; + compatible = "ibm,power9-ex"; + index = <$2>; + +')dnl + +dnl +dnl CHIP([index]) +dnl +define(`CHIP', +` + mem$1 { + index = < 0x$1 >; }; - proc0 { + proc$1 { compatible = "ibm,power-proc", "ibm,power9-proc"; - index = < 0x00 >; + index = < 0x$1 >; fsi { - index = < 0x00 >; + index = < 0x$1 >; }; pib { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - index = < 0x00 >; + index = < 0x$1 >; adu@90000 { compatible = "ibm,power9-adu"; reg = < 0x00 0x90000 0x50 >; - system-path = "/mem0"; + system-path = "/mem$1"; }; htm@5012880 { compatible = "ibm,power9-nhtm"; reg = < 0x00 0x5012880 0x40 >; - index = < 0x00 >; + index = < 0x$1 >; }; htm@50128C0 { compatible = "ibm,power9-nhtm"; reg = < 0x00 0x50128c0 0x40 >; - index = < 0x01 >; + index = < 0x$1 >; }; - chiplet@1000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x01 >; - reg = < 0x00 0x1000000 0xfffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - + CHIPLET_(1) tp@0 { + reg = < 0x00 0x1000000 0xfffff >; compatible = "ibm,power9-tp"; index = < 0x00 >; - reg = < 0x00 0x1000000 0xffffff >; }; }; - chiplet@2000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x02 >; - reg = < 0x00 0x2000000 0xfffff >; - + CHIPLET__(2) n0 { compatible = "ibm,power9-nest"; index = < 0x00 >; @@ -67,11 +152,7 @@ }; }; - chiplet@3000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x03 >; - reg = < 0x00 0x3000000 0xfffff >; - + CHIPLET__(3) n1 { compatible = "ibm,power9-nest"; index = < 0x01 >; @@ -88,11 +169,7 @@ }; }; - chiplet@4000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x04 >; - reg = < 0x00 0x4000000 0xfffff >; - + CHIPLET__(4) n2 { compatible = "ibm,power9-nest"; index = < 0x02 >; @@ -104,11 +181,7 @@ }; }; - chiplet@5000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x05 >; - reg = < 0x00 0x5000000 0xfffff >; - + CHIPLET__(5) n3 { compatible = "ibm,power9-nest"; index = < 0x03 >; @@ -125,32 +198,19 @@ }; }; - chiplet@6000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x06 >; - reg = < 0x00 0x6000000 0xfffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - xbus@0 { + CHIPLET_(6) + xbus$1_0: xbus@0 { compatible = "ibm,power9-xbus"; index = < 0x01 >; - reg = < 0x00 0x6000000 0xffffff >; - other-end = "/proc1/pib/chiplet@6000000/xbus@1"; + reg = < 0x00 0x6000000 0xfffff >; }; }; - chiplet@7000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x07 >; - reg = < 0x00 0x7000000 0xfffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - + CHIPLET_(7) mc@0 { + reg = < 0x00 0x7000000 0xfffff >; compatible = "ibm,power9-mc"; index = < 0x00 >; - reg = < 0x00 0x7000000 0xffffff >; mca0 { compatible = "ibm,power9-mca"; @@ -179,17 +239,11 @@ }; }; - chiplet@8000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x08 >; - reg = < 0x00 0x8000000 0xfffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - + CHIPLET_(8) mc@1 { + reg = < 0x00 0x8000000 0xfffff >; compatible = "ibm,power9-mc"; index = < 0x01 >; - reg = < 0x00 0x8000000 0xffffff >; mca0 { compatible = "ibm,power9-mca"; @@ -218,17 +272,11 @@ }; }; - chiplet@9000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x09 >; - reg = < 0x00 0x9000000 0xfffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - + CHIPLET_(9) obus@0 { + reg = < 0x00 0x9000000 0xfffff >; compatible = "ibm,power9-obus"; index = < 0x00 >; - reg = < 0x00 0x9000000 0xffffff >; }; obrick0 { @@ -247,17 +295,11 @@ }; }; - chiplet@c000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x0c >; - reg = < 0x00 0xc000000 0xfffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - + CHIPLET_(c) obus@3 { + reg = < 0x00 0xc000000 0xfffff >; compatible = "ibm,power9-obus"; index = < 0x03 >; - reg = < 0x00 0xc000000 0xffffff >; }; obrick0 { @@ -276,17 +318,11 @@ }; }; - chiplet@d000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x0d >; - reg = < 0x00 0xd000000 0xfffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - + CHIPLET_(d) pec@d000000 { + reg = < 0x00 0xd000000 0xfffff >; compatible = "ibm,power9-pec"; index = < 0x00 >; - reg = < 0x00 0xd000000 0xfffff >; }; phb0 { @@ -300,17 +336,11 @@ }; }; - chiplet@e000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x0e >; - reg = < 0x00 0xe000000 0xfffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - + CHIPLET_(e) pec@e000000 { + reg = < 0x00 0xe000000 0xfffff >; compatible = "ibm,power9-pec"; index = < 0x01 >; - reg = < 0x00 0xe000000 0xfffff >; }; phb0 { @@ -324,17 +354,11 @@ }; }; - chiplet@f000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x0f >; - reg = < 0x00 0xf000000 0xfffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - + CHIPLET_(f) pec@f000000 { + reg = < 0x00 0xf000000 0xfffff >; compatible = "ibm,power9-pec"; index = < 0x02 >; - reg = < 0x00 0xf000000 0xfffff >; }; phb0 { @@ -348,1249 +372,145 @@ }; }; - chiplet@10000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x10 >; - reg = < 0x00 0x10000000 0xfffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - eq@0 { - compatible = "ibm,power9-eq"; - index = < 0x00 >; - reg = < 0x00 0x10000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - ex@0 { - compatible = "ibm,power9-ex"; - index = < 0x00 >; - reg = < 0x00 0x10000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - chiplet@20000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x20 >; - reg = < 0x00 0x20000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x00 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; + CHIPLET_(10) + EQ_(0) + EX_(0,0) + CHIPLET_(20) + CORE(00) }; - chiplet@21000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x21 >; - reg = < 0x00 0x21000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x01 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; + CHIPLET_(21) + CORE(01) }; }; - ex@1 { - compatible = "ibm,power9-ex"; - index = < 0x01 >; - reg = < 0x00 0x10000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - chiplet@22000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x22 >; - reg = < 0x00 0x22000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x02 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; + EX_(0,1) + CHIPLET_(22) + CORE(02) }; - chiplet@23000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x23 >; - reg = < 0x00 0x23000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x03 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; + CHIPLET_(23) + CORE(03) }; }; }; }; - chiplet@11000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x11 >; - reg = < 0x00 0x11000000 0xfffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - eq@1 { - compatible = "ibm,power9-eq"; - index = < 0x01 >; - reg = < 0x00 0x11000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - ex@0 { - compatible = "ibm,power9-ex"; - index = < 0x00 >; - reg = < 0x00 0x10000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - chiplet@24000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x24 >; - reg = < 0x00 0x24000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x04 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; + CHIPLET_(11) + EQ_(1) + EX_(1,0) + CHIPLET_(24) + CORE(04) }; - chiplet@25000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x25 >; - reg = < 0x00 0x25000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x05 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; + CHIPLET_(25) + CORE(05) }; }; - ex@1 { - compatible = "ibm,power9-ex"; - index = < 0x01 >; - reg = < 0x00 0x10000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - chiplet@26000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x26 >; - reg = < 0x00 0x26000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x06 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; + EX_(1,1) + CHIPLET_(26) + CORE(06) }; - chiplet@27000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x27 >; - reg = < 0x00 0x27000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x07 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; + CHIPLET_(27) + CORE(07) }; }; }; }; - chiplet@12000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x12 >; - reg = < 0x00 0x12000000 0xfffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - eq@2 { - compatible = "ibm,power9-eq"; - index = < 0x02 >; - reg = < 0x00 0x12000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - ex@0 { - compatible = "ibm,power9-ex"; - index = < 0x00 >; - reg = < 0x00 0x12000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - chiplet@28000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x28 >; - reg = < 0x00 0x28000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x08 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; + CHIPLET_(12) + EQ_(2) + EX_(2,0) + CHIPLET_(28) + CORE(08) }; - chiplet@29000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x29 >; - reg = < 0x00 0x29000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x09 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; + CHIPLET_(29) + CORE(09) }; }; - ex@1 { - compatible = "ibm,power9-ex"; - index = < 0x01 >; - reg = < 0x00 0x12000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - chiplet@2a000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x2a >; - reg = < 0x00 0x2a000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x0a >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; + EX_(2,1) + CHIPLET_(2a) + CORE(0a) }; - chiplet@2b000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x2b >; - reg = < 0x00 0x2b000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x0b >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; + CHIPLET_(2b) + CORE(0b) }; }; }; }; - chiplet@13000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x13 >; - reg = < 0x00 0x13000000 0xfffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - eq@3 { - compatible = "ibm,power9-eq"; - index = < 0x03 >; - reg = < 0x00 0x13000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - ex@0 { - compatible = "ibm,power9-ex"; - index = < 0x00 >; - reg = < 0x00 0x13000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - chiplet@2c000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x2c >; - reg = < 0x00 0x2c000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x0c >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; + CHIPLET_(13) + EQ_(3) + EX_(3,0) + CHIPLET_(2c) + CORE(0c) }; - chiplet@2d000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x2d >; - reg = < 0x00 0x2d000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x0d >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; + CHIPLET_(2d) + CORE(0d) }; }; - ex@1 { - compatible = "ibm,power9-ex"; - index = < 0x01 >; - reg = < 0x00 0x13000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - chiplet@2e000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x2e >; - reg = < 0x00 0x2e000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x0e >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; + EX_(3,1) + CHIPLET_(2e) + CORE(0e) }; - chiplet@2f000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x2f >; - reg = < 0x00 0x2f000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x0f >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; + CHIPLET_(2f) + CORE(0f) }; }; }; }; - chiplet@14000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x14 >; - reg = < 0x00 0x14000000 0xfffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - eq@4 { - compatible = "ibm,power9-eq"; - index = < 0x04 >; - reg = < 0x00 0x13000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - ex@0 { - compatible = "ibm,power9-ex"; - index = < 0x00 >; - reg = < 0x00 0x14000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - chiplet@30000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x30 >; - reg = < 0x00 0x30000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x10 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; + CHIPLET_(14) + EQ_(4) + EX_(4,0) + CHIPLET_(30) + CORE(10) }; - chiplet@31000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x31 >; - reg = < 0x00 0x31000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x11 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; + CHIPLET_(31) + CORE(11) }; }; - ex@1 { - compatible = "ibm,power9-ex"; - index = < 0x01 >; - reg = < 0x00 0x14000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - chiplet@32000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x32 >; - reg = < 0x00 0x32000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x12 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; + EX_(4,1) + CHIPLET_(32) + CORE(12) }; - chiplet@33000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x33 >; - reg = < 0x00 0x33000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x13 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; + CHIPLET_(33) + CORE(13) }; }; }; }; - chiplet@15000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x15 >; - reg = < 0x00 0x15000000 0xfffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - eq@5 { - compatible = "ibm,power9-eq"; - index = < 0x05 >; - reg = < 0x00 0x13000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - ex@0 { - compatible = "ibm,power9-ex"; - index = < 0x00 >; - reg = < 0x00 0x15000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - chiplet@34000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x34 >; - reg = < 0x00 0x34000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x14 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; + CHIPLET_(15) + EQ_(5) + EX_(5,0) + CHIPLET_(34) + CORE(14) }; - chiplet@35000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x35 >; - reg = < 0x00 0x35000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x15 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; + CHIPLET_(35) + CORE(15) }; }; - ex@1 { - compatible = "ibm,power9-ex"; - index = < 0x01 >; - reg = < 0x00 0x15000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - chiplet@36000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x36 >; - reg = < 0x00 0x36000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x16 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; + EX_(5,1) + CHIPLET_(36) + CORE(16) }; - chiplet@37000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x37 >; - reg = < 0x00 0x37000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x17 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; + CHIPLET_(37) + CORE(17) }; }; }; @@ -1717,1720 +637,17 @@ }; }; }; +')dnl - mem1 { - index = < 0x01 >; - }; - - proc1 { - compatible = "ibm,power-proc", "ibm,power9-proc"; - index = < 0x01 >; - - fsi { - index = < 0x00 >; - }; - - pib { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - index = < 0x00 >; - - adu@90000 { - compatible = "ibm,power9-adu"; - reg = < 0x00 0x90000 0x50 >; - system-path = "/mem1"; - }; - - htm@5012880 { - compatible = "ibm,power9-nhtm"; - reg = < 0x00 0x5012880 0x40 >; - index = < 0x00 >; - }; - - htm@50128C0 { - compatible = "ibm,power9-nhtm"; - reg = < 0x00 0x50128c0 0x40 >; - index = < 0x01 >; - }; - - chiplet@1000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x01 >; - reg = < 0x00 0x1000000 0xfffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - tp@0 { - compatible = "ibm,power9-tp"; - index = < 0x00 >; - reg = < 0x00 0x1000000 0xffffff >; - }; - }; - - chiplet@2000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x02 >; - reg = < 0x00 0x2000000 0xfffff >; - - n0 { - compatible = "ibm,power9-nest"; - index = < 0x00 >; - - capp0 { - compatible = "ibm,power9-capp"; - index = < 0x00 >; - }; - }; - }; - - chiplet@3000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x03 >; - reg = < 0x00 0x3000000 0xfffff >; - - n1 { - compatible = "ibm,power9-nest"; - index = < 0x01 >; - - mcs2 { - compatible = "ibm,power9-mcs"; - index = < 0x02 >; - }; - - mcs3 { - compatible = "ibm,power9-mcs"; - index = < 0x03 >; - }; - }; - }; - - chiplet@4000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x04 >; - reg = < 0x00 0x4000000 0xfffff >; - - n2 { - compatible = "ibm,power9-nest"; - index = < 0x02 >; - - capp1 { - compatible = "ibm,power9-capp"; - index = < 0x01 >; - }; - }; - }; - - chiplet@5000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x05 >; - reg = < 0x00 0x5000000 0xfffff >; - - n3 { - compatible = "ibm,power9-nest"; - index = < 0x03 >; - - mcs0 { - compatible = "ibm,power9-mcs"; - index = < 0x00 >; - }; - - mcs1 { - compatible = "ibm,power9-mcs"; - index = < 0x01 >; - }; - }; - }; - - chiplet@6000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x06 >; - reg = < 0x00 0x6000000 0xfffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - xbus@0 { - compatible = "ibm,power9-xbus"; - index = < 0x01 >; - reg = < 0x00 0x6000000 0xffffff >; - other-end = "/proc0/pib/chiplet@6000000/xbus@1"; - }; - }; - - chiplet@7000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x07 >; - reg = < 0x00 0x7000000 0xfffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - mc@0 { - compatible = "ibm,power9-mc"; - index = < 0x00 >; - reg = < 0x00 0x7000000 0xffffff >; - - mca0 { - compatible = "ibm,power9-mca"; - index = < 0x00 >; - }; - - mca1 { - compatible = "ibm,power9-mca"; - index = < 0x01 >; - }; - - mca2 { - compatible = "ibm,power9-mca"; - index = < 0x02 >; - }; - - mca3 { - compatible = "ibm,power9-mca"; - index = < 0x03 >; - }; - - mcbist { - compatible = "ibm,power9-mcbist"; - index = < 0x00 >; - }; - }; - }; - - chiplet@8000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x08 >; - reg = < 0x00 0x8000000 0xfffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - mc@1 { - compatible = "ibm,power9-mc"; - index = < 0x01 >; - reg = < 0x00 0x8000000 0xffffff >; - - mca0 { - compatible = "ibm,power9-mca"; - index = < 0x04 >; - }; - - mca1 { - compatible = "ibm,power9-mca"; - index = < 0x05 >; - }; - - mca2 { - compatible = "ibm,power9-mca"; - index = < 0x06 >; - }; - - mca3 { - compatible = "ibm,power9-mca"; - index = < 0x07 >; - }; - - mcbist { - compatible = "ibm,power9-mcbist"; - index = < 0x01 >; - }; - }; - }; - - chiplet@9000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x09 >; - reg = < 0x00 0x9000000 0xfffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - obus@0 { - compatible = "ibm,power9-obus"; - index = < 0x00 >; - reg = < 0x00 0x9000000 0xffffff >; - }; - - obrick0 { - compatible = "ibm,power9-obus_brick"; - index = < 0x00 >; - }; - - obrick1 { - compatible = "ibm,power9-obus_brick"; - index = < 0x01 >; - }; - - obrick2 { - compatible = "ibm,power9-obus_brick"; - index = < 0x02 >; - }; - }; - - chiplet@c000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x0c >; - reg = < 0x00 0xc000000 0xfffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; +/dts-v1/; - obus@3 { - compatible = "ibm,power9-obus"; - index = < 0x03 >; - reg = < 0x00 0xc000000 0xffffff >; - }; - - obrick0 { - compatible = "ibm,power9-obus_brick"; - index = < 0x09 >; - }; - - obrick1 { - compatible = "ibm,power9-obus_brick"; - index = < 0x0a >; - }; - - obrick2 { - compatible = "ibm,power9-obus_brick"; - index = < 0x0b >; - }; - }; - - chiplet@d000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x0d >; - reg = < 0x00 0xd000000 0xfffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - pec@d000000 { - compatible = "ibm,power9-pec"; - index = < 0x00 >; - reg = < 0x00 0xd000000 0xfffff >; - }; - - phb0 { - compatible = "ibm,power9-phb"; - index = < 0x00 >; - }; - - phb1 { - compatible = "ibm,power9-phb"; - index = < 0x01 >; - }; - }; - - chiplet@e000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x0e >; - reg = < 0x00 0xe000000 0xfffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - pec@e000000 { - compatible = "ibm,power9-pec"; - index = < 0x01 >; - reg = < 0x00 0xe000000 0xfffff >; - }; - - phb0 { - compatible = "ibm,power9-phb"; - index = < 0x02 >; - }; - - phb1 { - compatible = "ibm,power9-phb"; - index = < 0x03 >; - }; - }; - - chiplet@f000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x0f >; - reg = < 0x00 0xf000000 0xfffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - pec@f000000 { - compatible = "ibm,power9-pec"; - index = < 0x02 >; - reg = < 0x00 0xf000000 0xfffff >; - }; - - phb0 { - compatible = "ibm,power9-phb"; - index = < 0x04 >; - }; - - phb1 { - compatible = "ibm,power9-phb"; - index = < 0x05 >; - }; - }; - - chiplet@10000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x10 >; - reg = < 0x00 0x10000000 0xfffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - eq@0 { - compatible = "ibm,power9-eq"; - index = < 0x00 >; - reg = < 0x00 0x10000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - ex@0 { - compatible = "ibm,power9-ex"; - index = < 0x00 >; - reg = < 0x00 0x10000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - chiplet@20000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x20 >; - reg = < 0x00 0x20000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x00 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; - }; - - chiplet@21000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x21 >; - reg = < 0x00 0x21000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x01 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; - }; - }; - - ex@1 { - compatible = "ibm,power9-ex"; - index = < 0x01 >; - reg = < 0x00 0x10000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - chiplet@22000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x22 >; - reg = < 0x00 0x22000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x02 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; - }; - - chiplet@23000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x23 >; - reg = < 0x00 0x23000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x03 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; - }; - }; - }; - }; - - chiplet@11000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x11 >; - reg = < 0x00 0x11000000 0xfffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - eq@1 { - compatible = "ibm,power9-eq"; - index = < 0x01 >; - reg = < 0x00 0x11000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - ex@0 { - compatible = "ibm,power9-ex"; - index = < 0x00 >; - reg = < 0x00 0x10000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - chiplet@24000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x24 >; - reg = < 0x00 0x24000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x04 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; - }; - - chiplet@25000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x25 >; - reg = < 0x00 0x25000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x05 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; - }; - }; - - ex@1 { - compatible = "ibm,power9-ex"; - index = < 0x01 >; - reg = < 0x00 0x10000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - chiplet@26000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x26 >; - reg = < 0x00 0x26000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x06 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; - }; - - chiplet@27000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x27 >; - reg = < 0x00 0x27000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x07 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; - }; - }; - }; - }; - - chiplet@12000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x12 >; - reg = < 0x00 0x12000000 0xfffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - eq@2 { - compatible = "ibm,power9-eq"; - index = < 0x02 >; - reg = < 0x00 0x12000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - ex@0 { - compatible = "ibm,power9-ex"; - index = < 0x00 >; - reg = < 0x00 0x12000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - chiplet@28000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x28 >; - reg = < 0x00 0x28000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x08 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; - }; - - chiplet@29000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x29 >; - reg = < 0x00 0x29000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x09 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; - }; - }; - - ex@1 { - compatible = "ibm,power9-ex"; - index = < 0x01 >; - reg = < 0x00 0x12000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - chiplet@2a000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x2a >; - reg = < 0x00 0x2a000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x0a >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; - }; - - chiplet@2b000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x2b >; - reg = < 0x00 0x2b000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x0b >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; - }; - }; - }; - }; - - chiplet@13000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x13 >; - reg = < 0x00 0x13000000 0xfffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - eq@3 { - compatible = "ibm,power9-eq"; - index = < 0x03 >; - reg = < 0x00 0x13000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - ex@0 { - compatible = "ibm,power9-ex"; - index = < 0x00 >; - reg = < 0x00 0x13000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - chiplet@2c000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x2c >; - reg = < 0x00 0x2c000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x0c >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; - }; - - chiplet@2d000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x2d >; - reg = < 0x00 0x2d000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x0d >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; - }; - }; - - ex@1 { - compatible = "ibm,power9-ex"; - index = < 0x01 >; - reg = < 0x00 0x13000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - chiplet@2e000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x2e >; - reg = < 0x00 0x2e000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x0e >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; - }; - - chiplet@2f000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x2f >; - reg = < 0x00 0x2f000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x0f >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; - }; - }; - }; - }; - - chiplet@14000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x14 >; - reg = < 0x00 0x14000000 0xfffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - eq@4 { - compatible = "ibm,power9-eq"; - index = < 0x04 >; - reg = < 0x00 0x13000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - ex@0 { - compatible = "ibm,power9-ex"; - index = < 0x00 >; - reg = < 0x00 0x14000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - chiplet@30000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x30 >; - reg = < 0x00 0x30000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x10 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; - }; - - chiplet@31000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x31 >; - reg = < 0x00 0x31000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x11 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; - }; - }; - - ex@1 { - compatible = "ibm,power9-ex"; - index = < 0x01 >; - reg = < 0x00 0x14000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - chiplet@32000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x32 >; - reg = < 0x00 0x32000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x12 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; - }; - - chiplet@33000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x33 >; - reg = < 0x00 0x33000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x13 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; - }; - }; - }; - }; - - chiplet@15000000 { - compatible = "ibm,power9-chiplet"; - index = < 0x15 >; - reg = < 0x00 0x15000000 0xfffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - eq@5 { - compatible = "ibm,power9-eq"; - index = < 0x05 >; - reg = < 0x00 0x13000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - ex@0 { - compatible = "ibm,power9-ex"; - index = < 0x00 >; - reg = < 0x00 0x15000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - chiplet@34000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x34 >; - reg = < 0x00 0x34000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x14 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; - }; - - chiplet@35000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x35 >; - reg = < 0x00 0x35000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x15 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; - }; - }; - - ex@1 { - compatible = "ibm,power9-ex"; - index = < 0x01 >; - reg = < 0x00 0x15000000 0xffffff >; - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - - chiplet@36000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x36 >; - reg = < 0x00 0x36000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x16 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; - }; - - chiplet@37000000 { - #address-cells = < 0x02 >; - #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; - index = < 0x37 >; - reg = < 0x00 0x37000000 0xfffff >; - - core@0 { - #address-cells = < 0x01 >; - #size-cells = < 0x00 >; - compatible = "ibm,power-core", "ibm,power9-core"; - index = < 0x17 >; - reg = < 0x00 0x00 0xfffff >; - - thread@0 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x00 >; - index = < 0x00 >; - }; - - thread@1 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x01 >; - index = < 0x01 >; - }; - - thread@2 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x02 >; - index = < 0x02 >; - }; - - thread@3 { - compatible = "ibm,power-thread", "ibm,power9-thread"; - reg = < 0x00 >; - tid = < 0x03 >; - index = < 0x03 >; - }; - }; - }; - }; - }; - }; - - nv0 { - compatible = "ibm,power9-nv"; - index = < 0x00 >; - }; - - nv1 { - compatible = "ibm,power9-nv"; - index = < 0x01 >; - }; - - nv2 { - compatible = "ibm,power9-nv"; - index = < 0x02 >; - }; - - nv3 { - compatible = "ibm,power9-nv"; - index = < 0x03 >; - }; - - nv4 { - compatible = "ibm,power9-nv"; - index = < 0x04 >; - }; - - nv5 { - compatible = "ibm,power9-nv"; - index = < 0x05 >; - }; - - occ0 { - compatible = "ibm,power9-occ"; - index = < 0x00 >; - }; - - sbe0 { - compatible = "ibm,power9-sbe"; - index = < 0x00 >; - }; - - ppe0 { - compatible = "ibm,power9-ppe"; - index = < 0x00 >; - }; - - ppe1 { - compatible = "ibm,power9-ppe"; - index = < 0x0a >; - }; - - ppe2 { - compatible = "ibm,power9-ppe"; - index = < 0x0d >; - }; - - ppe3 { - compatible = "ibm,power9-ppe"; - index = < 0x14 >; - }; - - ppe4 { - compatible = "ibm,power9-ppe"; - index = < 0x19 >; - }; - - ppe5 { - compatible = "ibm,power9-ppe"; - index = < 0x1e >; - }; - - ppe6 { - compatible = "ibm,power9-ppe"; - index = < 0x28 >; - }; - - ppe7 { - compatible = "ibm,power9-ppe"; - index = < 0x29 >; - }; - - ppe8 { - compatible = "ibm,power9-ppe"; - index = < 0x2a >; - }; - - ppe9 { - compatible = "ibm,power9-ppe"; - index = < 0x2b >; - }; - - ppe10 { - compatible = "ibm,power9-ppe"; - index = < 0x2c >; - }; - - ppe11 { - compatible = "ibm,power9-ppe"; - index = < 0x2d >; - }; - - ppe12 { - compatible = "ibm,power9-ppe"; - index = < 0x2e >; - }; - - ppe13 { - compatible = "ibm,power9-ppe"; - index = < 0x32 >; - }; - - ppe14 { - compatible = "ibm,power9-ppe"; - index = < 0x34 >; - }; - - ppe15 { - compatible = "ibm,power9-ppe"; - index = < 0x38 >; - }; - }; - }; +/ { + CHIP(0) + CHIP(1) + CHIP(2) + CHIP(3) + CHIP(4) + CHIP(5) + CHIP(6) + CHIP(7) }; diff --git a/tests/test_p9_fapi_translation.sh b/tests/test_p9_fapi_translation.sh index fbb194d..8f44953 100755 --- a/tests/test_p9_fapi_translation.sh +++ b/tests/test_p9_fapi_translation.sh @@ -56,6 +56,150 @@ Testing /proc1/pib/chiplet@15000000/eq@5/ex@0/chiplet@34000000/core@0 20 Testing /proc1/pib/chiplet@15000000/eq@5/ex@0/chiplet@35000000/core@0 21 Testing /proc1/pib/chiplet@15000000/eq@5/ex@1/chiplet@36000000/core@0 22 Testing /proc1/pib/chiplet@15000000/eq@5/ex@1/chiplet@37000000/core@0 23 +Testing /proc2/pib/chiplet@10000000/eq@0/ex@0/chiplet@20000000/core@0 0 +Testing /proc2/pib/chiplet@10000000/eq@0/ex@0/chiplet@21000000/core@0 1 +Testing /proc2/pib/chiplet@10000000/eq@0/ex@1/chiplet@22000000/core@0 2 +Testing /proc2/pib/chiplet@10000000/eq@0/ex@1/chiplet@23000000/core@0 3 +Testing /proc2/pib/chiplet@11000000/eq@1/ex@0/chiplet@24000000/core@0 4 +Testing /proc2/pib/chiplet@11000000/eq@1/ex@0/chiplet@25000000/core@0 5 +Testing /proc2/pib/chiplet@11000000/eq@1/ex@1/chiplet@26000000/core@0 6 +Testing /proc2/pib/chiplet@11000000/eq@1/ex@1/chiplet@27000000/core@0 7 +Testing /proc2/pib/chiplet@12000000/eq@2/ex@0/chiplet@28000000/core@0 8 +Testing /proc2/pib/chiplet@12000000/eq@2/ex@0/chiplet@29000000/core@0 9 +Testing /proc2/pib/chiplet@12000000/eq@2/ex@1/chiplet@2a000000/core@0 10 +Testing /proc2/pib/chiplet@12000000/eq@2/ex@1/chiplet@2b000000/core@0 11 +Testing /proc2/pib/chiplet@13000000/eq@3/ex@0/chiplet@2c000000/core@0 12 +Testing /proc2/pib/chiplet@13000000/eq@3/ex@0/chiplet@2d000000/core@0 13 +Testing /proc2/pib/chiplet@13000000/eq@3/ex@1/chiplet@2e000000/core@0 14 +Testing /proc2/pib/chiplet@13000000/eq@3/ex@1/chiplet@2f000000/core@0 15 +Testing /proc2/pib/chiplet@14000000/eq@4/ex@0/chiplet@30000000/core@0 16 +Testing /proc2/pib/chiplet@14000000/eq@4/ex@0/chiplet@31000000/core@0 17 +Testing /proc2/pib/chiplet@14000000/eq@4/ex@1/chiplet@32000000/core@0 18 +Testing /proc2/pib/chiplet@14000000/eq@4/ex@1/chiplet@33000000/core@0 19 +Testing /proc2/pib/chiplet@15000000/eq@5/ex@0/chiplet@34000000/core@0 20 +Testing /proc2/pib/chiplet@15000000/eq@5/ex@0/chiplet@35000000/core@0 21 +Testing /proc2/pib/chiplet@15000000/eq@5/ex@1/chiplet@36000000/core@0 22 +Testing /proc2/pib/chiplet@15000000/eq@5/ex@1/chiplet@37000000/core@0 23 +Testing /proc3/pib/chiplet@10000000/eq@0/ex@0/chiplet@20000000/core@0 0 +Testing /proc3/pib/chiplet@10000000/eq@0/ex@0/chiplet@21000000/core@0 1 +Testing /proc3/pib/chiplet@10000000/eq@0/ex@1/chiplet@22000000/core@0 2 +Testing /proc3/pib/chiplet@10000000/eq@0/ex@1/chiplet@23000000/core@0 3 +Testing /proc3/pib/chiplet@11000000/eq@1/ex@0/chiplet@24000000/core@0 4 +Testing /proc3/pib/chiplet@11000000/eq@1/ex@0/chiplet@25000000/core@0 5 +Testing /proc3/pib/chiplet@11000000/eq@1/ex@1/chiplet@26000000/core@0 6 +Testing /proc3/pib/chiplet@11000000/eq@1/ex@1/chiplet@27000000/core@0 7 +Testing /proc3/pib/chiplet@12000000/eq@2/ex@0/chiplet@28000000/core@0 8 +Testing /proc3/pib/chiplet@12000000/eq@2/ex@0/chiplet@29000000/core@0 9 +Testing /proc3/pib/chiplet@12000000/eq@2/ex@1/chiplet@2a000000/core@0 10 +Testing /proc3/pib/chiplet@12000000/eq@2/ex@1/chiplet@2b000000/core@0 11 +Testing /proc3/pib/chiplet@13000000/eq@3/ex@0/chiplet@2c000000/core@0 12 +Testing /proc3/pib/chiplet@13000000/eq@3/ex@0/chiplet@2d000000/core@0 13 +Testing /proc3/pib/chiplet@13000000/eq@3/ex@1/chiplet@2e000000/core@0 14 +Testing /proc3/pib/chiplet@13000000/eq@3/ex@1/chiplet@2f000000/core@0 15 +Testing /proc3/pib/chiplet@14000000/eq@4/ex@0/chiplet@30000000/core@0 16 +Testing /proc3/pib/chiplet@14000000/eq@4/ex@0/chiplet@31000000/core@0 17 +Testing /proc3/pib/chiplet@14000000/eq@4/ex@1/chiplet@32000000/core@0 18 +Testing /proc3/pib/chiplet@14000000/eq@4/ex@1/chiplet@33000000/core@0 19 +Testing /proc3/pib/chiplet@15000000/eq@5/ex@0/chiplet@34000000/core@0 20 +Testing /proc3/pib/chiplet@15000000/eq@5/ex@0/chiplet@35000000/core@0 21 +Testing /proc3/pib/chiplet@15000000/eq@5/ex@1/chiplet@36000000/core@0 22 +Testing /proc3/pib/chiplet@15000000/eq@5/ex@1/chiplet@37000000/core@0 23 +Testing /proc4/pib/chiplet@10000000/eq@0/ex@0/chiplet@20000000/core@0 0 +Testing /proc4/pib/chiplet@10000000/eq@0/ex@0/chiplet@21000000/core@0 1 +Testing /proc4/pib/chiplet@10000000/eq@0/ex@1/chiplet@22000000/core@0 2 +Testing /proc4/pib/chiplet@10000000/eq@0/ex@1/chiplet@23000000/core@0 3 +Testing /proc4/pib/chiplet@11000000/eq@1/ex@0/chiplet@24000000/core@0 4 +Testing /proc4/pib/chiplet@11000000/eq@1/ex@0/chiplet@25000000/core@0 5 +Testing /proc4/pib/chiplet@11000000/eq@1/ex@1/chiplet@26000000/core@0 6 +Testing /proc4/pib/chiplet@11000000/eq@1/ex@1/chiplet@27000000/core@0 7 +Testing /proc4/pib/chiplet@12000000/eq@2/ex@0/chiplet@28000000/core@0 8 +Testing /proc4/pib/chiplet@12000000/eq@2/ex@0/chiplet@29000000/core@0 9 +Testing /proc4/pib/chiplet@12000000/eq@2/ex@1/chiplet@2a000000/core@0 10 +Testing /proc4/pib/chiplet@12000000/eq@2/ex@1/chiplet@2b000000/core@0 11 +Testing /proc4/pib/chiplet@13000000/eq@3/ex@0/chiplet@2c000000/core@0 12 +Testing /proc4/pib/chiplet@13000000/eq@3/ex@0/chiplet@2d000000/core@0 13 +Testing /proc4/pib/chiplet@13000000/eq@3/ex@1/chiplet@2e000000/core@0 14 +Testing /proc4/pib/chiplet@13000000/eq@3/ex@1/chiplet@2f000000/core@0 15 +Testing /proc4/pib/chiplet@14000000/eq@4/ex@0/chiplet@30000000/core@0 16 +Testing /proc4/pib/chiplet@14000000/eq@4/ex@0/chiplet@31000000/core@0 17 +Testing /proc4/pib/chiplet@14000000/eq@4/ex@1/chiplet@32000000/core@0 18 +Testing /proc4/pib/chiplet@14000000/eq@4/ex@1/chiplet@33000000/core@0 19 +Testing /proc4/pib/chiplet@15000000/eq@5/ex@0/chiplet@34000000/core@0 20 +Testing /proc4/pib/chiplet@15000000/eq@5/ex@0/chiplet@35000000/core@0 21 +Testing /proc4/pib/chiplet@15000000/eq@5/ex@1/chiplet@36000000/core@0 22 +Testing /proc4/pib/chiplet@15000000/eq@5/ex@1/chiplet@37000000/core@0 23 +Testing /proc5/pib/chiplet@10000000/eq@0/ex@0/chiplet@20000000/core@0 0 +Testing /proc5/pib/chiplet@10000000/eq@0/ex@0/chiplet@21000000/core@0 1 +Testing /proc5/pib/chiplet@10000000/eq@0/ex@1/chiplet@22000000/core@0 2 +Testing /proc5/pib/chiplet@10000000/eq@0/ex@1/chiplet@23000000/core@0 3 +Testing /proc5/pib/chiplet@11000000/eq@1/ex@0/chiplet@24000000/core@0 4 +Testing /proc5/pib/chiplet@11000000/eq@1/ex@0/chiplet@25000000/core@0 5 +Testing /proc5/pib/chiplet@11000000/eq@1/ex@1/chiplet@26000000/core@0 6 +Testing /proc5/pib/chiplet@11000000/eq@1/ex@1/chiplet@27000000/core@0 7 +Testing /proc5/pib/chiplet@12000000/eq@2/ex@0/chiplet@28000000/core@0 8 +Testing /proc5/pib/chiplet@12000000/eq@2/ex@0/chiplet@29000000/core@0 9 +Testing /proc5/pib/chiplet@12000000/eq@2/ex@1/chiplet@2a000000/core@0 10 +Testing /proc5/pib/chiplet@12000000/eq@2/ex@1/chiplet@2b000000/core@0 11 +Testing /proc5/pib/chiplet@13000000/eq@3/ex@0/chiplet@2c000000/core@0 12 +Testing /proc5/pib/chiplet@13000000/eq@3/ex@0/chiplet@2d000000/core@0 13 +Testing /proc5/pib/chiplet@13000000/eq@3/ex@1/chiplet@2e000000/core@0 14 +Testing /proc5/pib/chiplet@13000000/eq@3/ex@1/chiplet@2f000000/core@0 15 +Testing /proc5/pib/chiplet@14000000/eq@4/ex@0/chiplet@30000000/core@0 16 +Testing /proc5/pib/chiplet@14000000/eq@4/ex@0/chiplet@31000000/core@0 17 +Testing /proc5/pib/chiplet@14000000/eq@4/ex@1/chiplet@32000000/core@0 18 +Testing /proc5/pib/chiplet@14000000/eq@4/ex@1/chiplet@33000000/core@0 19 +Testing /proc5/pib/chiplet@15000000/eq@5/ex@0/chiplet@34000000/core@0 20 +Testing /proc5/pib/chiplet@15000000/eq@5/ex@0/chiplet@35000000/core@0 21 +Testing /proc5/pib/chiplet@15000000/eq@5/ex@1/chiplet@36000000/core@0 22 +Testing /proc5/pib/chiplet@15000000/eq@5/ex@1/chiplet@37000000/core@0 23 +Testing /proc6/pib/chiplet@10000000/eq@0/ex@0/chiplet@20000000/core@0 0 +Testing /proc6/pib/chiplet@10000000/eq@0/ex@0/chiplet@21000000/core@0 1 +Testing /proc6/pib/chiplet@10000000/eq@0/ex@1/chiplet@22000000/core@0 2 +Testing /proc6/pib/chiplet@10000000/eq@0/ex@1/chiplet@23000000/core@0 3 +Testing /proc6/pib/chiplet@11000000/eq@1/ex@0/chiplet@24000000/core@0 4 +Testing /proc6/pib/chiplet@11000000/eq@1/ex@0/chiplet@25000000/core@0 5 +Testing /proc6/pib/chiplet@11000000/eq@1/ex@1/chiplet@26000000/core@0 6 +Testing /proc6/pib/chiplet@11000000/eq@1/ex@1/chiplet@27000000/core@0 7 +Testing /proc6/pib/chiplet@12000000/eq@2/ex@0/chiplet@28000000/core@0 8 +Testing /proc6/pib/chiplet@12000000/eq@2/ex@0/chiplet@29000000/core@0 9 +Testing /proc6/pib/chiplet@12000000/eq@2/ex@1/chiplet@2a000000/core@0 10 +Testing /proc6/pib/chiplet@12000000/eq@2/ex@1/chiplet@2b000000/core@0 11 +Testing /proc6/pib/chiplet@13000000/eq@3/ex@0/chiplet@2c000000/core@0 12 +Testing /proc6/pib/chiplet@13000000/eq@3/ex@0/chiplet@2d000000/core@0 13 +Testing /proc6/pib/chiplet@13000000/eq@3/ex@1/chiplet@2e000000/core@0 14 +Testing /proc6/pib/chiplet@13000000/eq@3/ex@1/chiplet@2f000000/core@0 15 +Testing /proc6/pib/chiplet@14000000/eq@4/ex@0/chiplet@30000000/core@0 16 +Testing /proc6/pib/chiplet@14000000/eq@4/ex@0/chiplet@31000000/core@0 17 +Testing /proc6/pib/chiplet@14000000/eq@4/ex@1/chiplet@32000000/core@0 18 +Testing /proc6/pib/chiplet@14000000/eq@4/ex@1/chiplet@33000000/core@0 19 +Testing /proc6/pib/chiplet@15000000/eq@5/ex@0/chiplet@34000000/core@0 20 +Testing /proc6/pib/chiplet@15000000/eq@5/ex@0/chiplet@35000000/core@0 21 +Testing /proc6/pib/chiplet@15000000/eq@5/ex@1/chiplet@36000000/core@0 22 +Testing /proc6/pib/chiplet@15000000/eq@5/ex@1/chiplet@37000000/core@0 23 +Testing /proc7/pib/chiplet@10000000/eq@0/ex@0/chiplet@20000000/core@0 0 +Testing /proc7/pib/chiplet@10000000/eq@0/ex@0/chiplet@21000000/core@0 1 +Testing /proc7/pib/chiplet@10000000/eq@0/ex@1/chiplet@22000000/core@0 2 +Testing /proc7/pib/chiplet@10000000/eq@0/ex@1/chiplet@23000000/core@0 3 +Testing /proc7/pib/chiplet@11000000/eq@1/ex@0/chiplet@24000000/core@0 4 +Testing /proc7/pib/chiplet@11000000/eq@1/ex@0/chiplet@25000000/core@0 5 +Testing /proc7/pib/chiplet@11000000/eq@1/ex@1/chiplet@26000000/core@0 6 +Testing /proc7/pib/chiplet@11000000/eq@1/ex@1/chiplet@27000000/core@0 7 +Testing /proc7/pib/chiplet@12000000/eq@2/ex@0/chiplet@28000000/core@0 8 +Testing /proc7/pib/chiplet@12000000/eq@2/ex@0/chiplet@29000000/core@0 9 +Testing /proc7/pib/chiplet@12000000/eq@2/ex@1/chiplet@2a000000/core@0 10 +Testing /proc7/pib/chiplet@12000000/eq@2/ex@1/chiplet@2b000000/core@0 11 +Testing /proc7/pib/chiplet@13000000/eq@3/ex@0/chiplet@2c000000/core@0 12 +Testing /proc7/pib/chiplet@13000000/eq@3/ex@0/chiplet@2d000000/core@0 13 +Testing /proc7/pib/chiplet@13000000/eq@3/ex@1/chiplet@2e000000/core@0 14 +Testing /proc7/pib/chiplet@13000000/eq@3/ex@1/chiplet@2f000000/core@0 15 +Testing /proc7/pib/chiplet@14000000/eq@4/ex@0/chiplet@30000000/core@0 16 +Testing /proc7/pib/chiplet@14000000/eq@4/ex@0/chiplet@31000000/core@0 17 +Testing /proc7/pib/chiplet@14000000/eq@4/ex@1/chiplet@32000000/core@0 18 +Testing /proc7/pib/chiplet@14000000/eq@4/ex@1/chiplet@33000000/core@0 19 +Testing /proc7/pib/chiplet@15000000/eq@5/ex@0/chiplet@34000000/core@0 20 +Testing /proc7/pib/chiplet@15000000/eq@5/ex@0/chiplet@35000000/core@0 21 +Testing /proc7/pib/chiplet@15000000/eq@5/ex@1/chiplet@36000000/core@0 22 +Testing /proc7/pib/chiplet@15000000/eq@5/ex@1/chiplet@37000000/core@0 23 EOF test_run libpdbg_p9_fapi_translation_test core @@ -74,6 +218,42 @@ Testing /proc1/pib/chiplet@12000000/eq@2 2 Testing /proc1/pib/chiplet@13000000/eq@3 3 Testing /proc1/pib/chiplet@14000000/eq@4 4 Testing /proc1/pib/chiplet@15000000/eq@5 5 +Testing /proc2/pib/chiplet@10000000/eq@0 0 +Testing /proc2/pib/chiplet@11000000/eq@1 1 +Testing /proc2/pib/chiplet@12000000/eq@2 2 +Testing /proc2/pib/chiplet@13000000/eq@3 3 +Testing /proc2/pib/chiplet@14000000/eq@4 4 +Testing /proc2/pib/chiplet@15000000/eq@5 5 +Testing /proc3/pib/chiplet@10000000/eq@0 0 +Testing /proc3/pib/chiplet@11000000/eq@1 1 +Testing /proc3/pib/chiplet@12000000/eq@2 2 +Testing /proc3/pib/chiplet@13000000/eq@3 3 +Testing /proc3/pib/chiplet@14000000/eq@4 4 +Testing /proc3/pib/chiplet@15000000/eq@5 5 +Testing /proc4/pib/chiplet@10000000/eq@0 0 +Testing /proc4/pib/chiplet@11000000/eq@1 1 +Testing /proc4/pib/chiplet@12000000/eq@2 2 +Testing /proc4/pib/chiplet@13000000/eq@3 3 +Testing /proc4/pib/chiplet@14000000/eq@4 4 +Testing /proc4/pib/chiplet@15000000/eq@5 5 +Testing /proc5/pib/chiplet@10000000/eq@0 0 +Testing /proc5/pib/chiplet@11000000/eq@1 1 +Testing /proc5/pib/chiplet@12000000/eq@2 2 +Testing /proc5/pib/chiplet@13000000/eq@3 3 +Testing /proc5/pib/chiplet@14000000/eq@4 4 +Testing /proc5/pib/chiplet@15000000/eq@5 5 +Testing /proc6/pib/chiplet@10000000/eq@0 0 +Testing /proc6/pib/chiplet@11000000/eq@1 1 +Testing /proc6/pib/chiplet@12000000/eq@2 2 +Testing /proc6/pib/chiplet@13000000/eq@3 3 +Testing /proc6/pib/chiplet@14000000/eq@4 4 +Testing /proc6/pib/chiplet@15000000/eq@5 5 +Testing /proc7/pib/chiplet@10000000/eq@0 0 +Testing /proc7/pib/chiplet@11000000/eq@1 1 +Testing /proc7/pib/chiplet@12000000/eq@2 2 +Testing /proc7/pib/chiplet@13000000/eq@3 3 +Testing /proc7/pib/chiplet@14000000/eq@4 4 +Testing /proc7/pib/chiplet@15000000/eq@5 5 EOF test_run libpdbg_p9_fapi_translation_test eq @@ -104,6 +284,78 @@ Testing /proc1/pib/chiplet@14000000/eq@4/ex@0 0 Testing /proc1/pib/chiplet@14000000/eq@4/ex@1 1 Testing /proc1/pib/chiplet@15000000/eq@5/ex@0 0 Testing /proc1/pib/chiplet@15000000/eq@5/ex@1 1 +Testing /proc2/pib/chiplet@10000000/eq@0/ex@0 0 +Testing /proc2/pib/chiplet@10000000/eq@0/ex@1 1 +Testing /proc2/pib/chiplet@11000000/eq@1/ex@0 0 +Testing /proc2/pib/chiplet@11000000/eq@1/ex@1 1 +Testing /proc2/pib/chiplet@12000000/eq@2/ex@0 0 +Testing /proc2/pib/chiplet@12000000/eq@2/ex@1 1 +Testing /proc2/pib/chiplet@13000000/eq@3/ex@0 0 +Testing /proc2/pib/chiplet@13000000/eq@3/ex@1 1 +Testing /proc2/pib/chiplet@14000000/eq@4/ex@0 0 +Testing /proc2/pib/chiplet@14000000/eq@4/ex@1 1 +Testing /proc2/pib/chiplet@15000000/eq@5/ex@0 0 +Testing /proc2/pib/chiplet@15000000/eq@5/ex@1 1 +Testing /proc3/pib/chiplet@10000000/eq@0/ex@0 0 +Testing /proc3/pib/chiplet@10000000/eq@0/ex@1 1 +Testing /proc3/pib/chiplet@11000000/eq@1/ex@0 0 +Testing /proc3/pib/chiplet@11000000/eq@1/ex@1 1 +Testing /proc3/pib/chiplet@12000000/eq@2/ex@0 0 +Testing /proc3/pib/chiplet@12000000/eq@2/ex@1 1 +Testing /proc3/pib/chiplet@13000000/eq@3/ex@0 0 +Testing /proc3/pib/chiplet@13000000/eq@3/ex@1 1 +Testing /proc3/pib/chiplet@14000000/eq@4/ex@0 0 +Testing /proc3/pib/chiplet@14000000/eq@4/ex@1 1 +Testing /proc3/pib/chiplet@15000000/eq@5/ex@0 0 +Testing /proc3/pib/chiplet@15000000/eq@5/ex@1 1 +Testing /proc4/pib/chiplet@10000000/eq@0/ex@0 0 +Testing /proc4/pib/chiplet@10000000/eq@0/ex@1 1 +Testing /proc4/pib/chiplet@11000000/eq@1/ex@0 0 +Testing /proc4/pib/chiplet@11000000/eq@1/ex@1 1 +Testing /proc4/pib/chiplet@12000000/eq@2/ex@0 0 +Testing /proc4/pib/chiplet@12000000/eq@2/ex@1 1 +Testing /proc4/pib/chiplet@13000000/eq@3/ex@0 0 +Testing /proc4/pib/chiplet@13000000/eq@3/ex@1 1 +Testing /proc4/pib/chiplet@14000000/eq@4/ex@0 0 +Testing /proc4/pib/chiplet@14000000/eq@4/ex@1 1 +Testing /proc4/pib/chiplet@15000000/eq@5/ex@0 0 +Testing /proc4/pib/chiplet@15000000/eq@5/ex@1 1 +Testing /proc5/pib/chiplet@10000000/eq@0/ex@0 0 +Testing /proc5/pib/chiplet@10000000/eq@0/ex@1 1 +Testing /proc5/pib/chiplet@11000000/eq@1/ex@0 0 +Testing /proc5/pib/chiplet@11000000/eq@1/ex@1 1 +Testing /proc5/pib/chiplet@12000000/eq@2/ex@0 0 +Testing /proc5/pib/chiplet@12000000/eq@2/ex@1 1 +Testing /proc5/pib/chiplet@13000000/eq@3/ex@0 0 +Testing /proc5/pib/chiplet@13000000/eq@3/ex@1 1 +Testing /proc5/pib/chiplet@14000000/eq@4/ex@0 0 +Testing /proc5/pib/chiplet@14000000/eq@4/ex@1 1 +Testing /proc5/pib/chiplet@15000000/eq@5/ex@0 0 +Testing /proc5/pib/chiplet@15000000/eq@5/ex@1 1 +Testing /proc6/pib/chiplet@10000000/eq@0/ex@0 0 +Testing /proc6/pib/chiplet@10000000/eq@0/ex@1 1 +Testing /proc6/pib/chiplet@11000000/eq@1/ex@0 0 +Testing /proc6/pib/chiplet@11000000/eq@1/ex@1 1 +Testing /proc6/pib/chiplet@12000000/eq@2/ex@0 0 +Testing /proc6/pib/chiplet@12000000/eq@2/ex@1 1 +Testing /proc6/pib/chiplet@13000000/eq@3/ex@0 0 +Testing /proc6/pib/chiplet@13000000/eq@3/ex@1 1 +Testing /proc6/pib/chiplet@14000000/eq@4/ex@0 0 +Testing /proc6/pib/chiplet@14000000/eq@4/ex@1 1 +Testing /proc6/pib/chiplet@15000000/eq@5/ex@0 0 +Testing /proc6/pib/chiplet@15000000/eq@5/ex@1 1 +Testing /proc7/pib/chiplet@10000000/eq@0/ex@0 0 +Testing /proc7/pib/chiplet@10000000/eq@0/ex@1 1 +Testing /proc7/pib/chiplet@11000000/eq@1/ex@0 0 +Testing /proc7/pib/chiplet@11000000/eq@1/ex@1 1 +Testing /proc7/pib/chiplet@12000000/eq@2/ex@0 0 +Testing /proc7/pib/chiplet@12000000/eq@2/ex@1 1 +Testing /proc7/pib/chiplet@13000000/eq@3/ex@0 0 +Testing /proc7/pib/chiplet@13000000/eq@3/ex@1 1 +Testing /proc7/pib/chiplet@14000000/eq@4/ex@0 0 +Testing /proc7/pib/chiplet@14000000/eq@4/ex@1 1 +Testing /proc7/pib/chiplet@15000000/eq@5/ex@0 0 +Testing /proc7/pib/chiplet@15000000/eq@5/ex@1 1 EOF test_run libpdbg_p9_fapi_translation_test ex @@ -112,6 +364,12 @@ test_run libpdbg_p9_fapi_translation_test ex test_result 0 < X-Patchwork-Id: 1279893 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49CKzC44vMz9sSg for ; Thu, 30 Apr 2020 13:06:31 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=eBAJ76Aj; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 49CKzC2wxSzDrBr for ; Thu, 30 Apr 2020 13:06:31 +1000 (AEST) X-Original-To: pdbg@lists.ozlabs.org Delivered-To: pdbg@lists.ozlabs.org Received: from ozlabs.org (bilbo.ozlabs.org [203.11.71.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 49CKyZ26dDzDrB4 for ; Thu, 30 Apr 2020 13:05:58 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=ozlabs.org Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=eBAJ76Aj; dkim-atps=neutral Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 49CKyY63dGz9sSh; Thu, 30 Apr 2020 13:05:57 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1588215957; bh=6T4LKK5R003yWuSb4W/edqh/PArfeWwViuSxD22LI7o=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eBAJ76AjK9iQZi0i5kqHNeHIIdhj/AMZ7EYPg5e9cox615NdjGNvQX7iVRB9/cZoE hhZKVz9vWUy3jIVgHX2GYXTCjUSUf52OajzYENIqM34Qjjn9ZEGdyVeYDbaFae5fhF 2zM7RW6tv/eZMiL2+FRBtPPTGWUeWjpxlOdaZZix1rSfwo6lHW/zr3vBmfOmqsIf7D p5BvSYyqHJYQRHLoeDb0vtVEC9KVry4s264dqqwwzlButzSwTbZKsOTfZ1s4jgujV7 mbcboao22SurcedEDcw3Q3A3REiYLQitrlBu0Cjy6vegEHdPiRinF4rErj0rJOOlBr 5iu+gf1WSvUfQ== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Thu, 30 Apr 2020 13:05:42 +1000 Message-Id: <20200430030544.234289-10-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.4 In-Reply-To: <20200430030544.234289-1-amitay@ozlabs.org> References: <20200430030544.234289-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH 09/11] tests: Remove unnecessary include and dependency X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs Reviewed-by: Alistair Popple --- Makefile.am | 4 ---- src/tests/libpdbg_probe_test.c | 2 -- src/tests/libpdbg_target_test.c | 2 -- 3 files changed, 8 deletions(-) diff --git a/Makefile.am b/Makefile.am index 64f3e0b..babb82c 100644 --- a/Makefile.am +++ b/Makefile.am @@ -243,8 +243,6 @@ libpdbg_target_test_CFLAGS = $(libpdbg_test_cflags) libpdbg_target_test_LDFLAGS = $(libpdbg_test_ldflags) libpdbg_target_test_LDADD = $(libpdbg_test_ldadd) -src/tests/libpdbg_target_test.c: fake.dt.h - libpdbg_probe_test1_SOURCES = src/tests/libpdbg_probe_test.c libpdbg_probe_test1_CFLAGS = $(libpdbg_test_cflags) -DTEST_ID=1 libpdbg_probe_test1_LDFLAGS = $(libpdbg_test_ldflags) @@ -260,8 +258,6 @@ libpdbg_probe_test3_CFLAGS = $(libpdbg_test_cflags) -DTEST_ID=3 libpdbg_probe_test3_LDFLAGS = $(libpdbg_test_ldflags) libpdbg_probe_test3_LDADD = $(libpdbg_test_ldadd) -src/tests/libpdbg_probe_test.c: fake.dt.h - libpdbg_dtree_test_SOURCES = src/tests/libpdbg_dtree_test.c libpdbg_dtree_test_CFLAGS = $(libpdbg_test_cflags) libpdbg_dtree_test_LDFLAGS = $(libpdbg_test_ldflags) diff --git a/src/tests/libpdbg_probe_test.c b/src/tests/libpdbg_probe_test.c index c76f77f..cdefddd 100644 --- a/src/tests/libpdbg_probe_test.c +++ b/src/tests/libpdbg_probe_test.c @@ -20,8 +20,6 @@ #include -#include "fake.dt.h" - static void for_each_target(struct pdbg_target *parent, void (*callback)(struct pdbg_target *target, enum pdbg_target_status status), diff --git a/src/tests/libpdbg_target_test.c b/src/tests/libpdbg_target_test.c index 36e6891..d7ffbd2 100644 --- a/src/tests/libpdbg_target_test.c +++ b/src/tests/libpdbg_target_test.c @@ -21,8 +21,6 @@ #include -#include "fake.dt.h" - static int count_target(struct pdbg_target *parent, const char *classname) { struct pdbg_target *target; From patchwork Thu Apr 30 03:05:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1279894 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49CKzG1CGSz9sSg for ; Thu, 30 Apr 2020 13:06:34 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=IC68laY4; dkim-atps=neutral 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key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 49CKyZ23vKz9sSd; Thu, 30 Apr 2020 13:05:58 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1588215958; bh=CmQRMF7PR2PQAhht27yT9wZvQ4HH3cHOjjqCyW1FTTU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=IC68laY4THUPhpz8z04m8/avCkBAbRCjpNJuDbl99l5rmU9tl/nKbKMurAtWrvB9W EszjtL3Y9K+QaV/rjGn+r+QDy2htiBQYHh3a2ZYT5ULB3eIp8ETXH6+/lG/opF8kOh b965mZArma+sjGLF9FMqRqP3FRBJVlsmpWDInpydfkFRJobppqAjwO1ZYZm8l7Ff8O 1Ziu0q19VOHsUby/zutUXuVTFIZkuseh23AlmcVjlN1DODCBk0vJPvEdviZ0VE7xsB 9FWYJQY0wSOOwunU2RLUBxtyvSF0GUaI3myaH2uxWBYA+Fe9G2SWmR/PBx9vHxwiMd qvJFokkWjAkXA== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Thu, 30 Apr 2020 13:05:43 +1000 Message-Id: <20200430030544.234289-11-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.4 In-Reply-To: <20200430030544.234289-1-amitay@ozlabs.org> References: <20200430030544.234289-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH 10/11] dts: Split fake backend and system trees X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs Reviewed-by: Alistair Popple --- Makefile.am | 4 ++-- fake-backend.dts.m4 | 52 +++++++++++++++++++++++++++++++++++++++++++++ fake.dts.m4 | 31 +-------------------------- libpdbg/dtb.c | 3 +++ tests/test_prop.sh | 4 ++++ 5 files changed, 62 insertions(+), 32 deletions(-) create mode 100644 fake-backend.dts.m4 diff --git a/Makefile.am b/Makefile.am index babb82c..e0b0954 100644 --- a/Makefile.am +++ b/Makefile.am @@ -35,7 +35,7 @@ PDBG_TESTS = \ TESTS = $(libpdbg_tests) optcmd_test $(PDBG_TESTS) tests/test_tree2.sh: fake2.dtb -tests/test_prop.sh: fake.dtb +tests/test_prop.sh: fake.dtb fake-backend.dtb tests/test_p9_fapi_translation.sh: p9.dtb bmc-kernel.dtb test: $(libpdbg_tests) @@ -77,7 +77,7 @@ if TARGET_PPC ARCH_FLAGS="-DTARGET_PPC=1" endif -DT = fake.dts fake2.dts p8-cronus.dts bmc-cronus.dts \ +DT = fake.dts fake-backend.dts fake2.dts p8-cronus.dts bmc-cronus.dts \ p8-fsi.dts p8-i2c.dts p8-kernel.dts \ p9w-fsi.dts p9r-fsi.dts p9z-fsi.dts bmc-kernel.dts \ bmc-sbefifo.dts \ diff --git a/fake-backend.dts.m4 b/fake-backend.dts.m4 new file mode 100644 index 0000000..2686c4e --- /dev/null +++ b/fake-backend.dts.m4 @@ -0,0 +1,52 @@ +define(`CONCAT', `$1$2')dnl + +dnl +dnl forloop([var], [start], [end], [iterator]) +dnl +divert(`-1') +define(`forloop', `pushdef(`$1', `$2')_forloop($@)popdef(`$1')') +define(`_forloop', + `$4`'ifelse($1, `$3', `', `define(`$1', incr($1))$0($@)')') + +dnl +dnl dump_backend([index], [addr]) +dnl +define(`dump_backend',dnl +`define(`pib_addr', eval(`$2+100'))dnl + + fsi@$2 { + #address-cells = <0x1>; + #size-cells = <0x1>; + compatible = "ibm,fake-fsi"; + system-path = "/proc$1/fsi"; + reg = <0x0 0x0>; + index = <0x$1>; + + CONCAT(pib@,pib_addr) { + #address-cells = <0x1>; + #size-cells = <0x1>; + compatible = "ibm,fake-pib"; + system-path = "/proc$1/pib"; + reg = ; + index = <0x$1>; + ATTR1 = <0xc0ffee>; + }; + }; + +')dnl + +dnl +dnl dump_system([num_processors], [num_cores], [num_threads]) +dnl +define(`dump_system', +`forloop(`i', `0', eval(`$1-1'), `dump_backend(i, eval(20000+i*1000))') +') +divert`'dnl + +/dts-v1/; + +/ { + #address-cells = <0x1>; + #size-cells = <0x1>; +dump_system(8, 4, 2) +}; diff --git a/fake.dts.m4 b/fake.dts.m4 index 3824738..190597a 100644 --- a/fake.dts.m4 +++ b/fake.dts.m4 @@ -71,40 +71,11 @@ define(`dump_processor',dnl forloop(`i', `0', eval(`$2-1'), `dump_core(i, eval(10000+(i+1)*10), $3)') dump_processor_post()') -dnl -dnl dump_backend([index], [addr]) -dnl -define(`dump_backend',dnl -`define(`pib_addr', eval(`$2+100'))dnl - - fsi@$2 { - #address-cells = <0x1>; - #size-cells = <0x1>; - compatible = "ibm,fake-fsi"; - system-path = "/proc$1/fsi"; - reg = <0x0 0x0>; - index = <0x$1>; - - CONCAT(pib@,pib_addr) { - #address-cells = <0x1>; - #size-cells = <0x1>; - compatible = "ibm,fake-pib"; - system-path = "/proc$1/pib"; - reg = ; - index = <0x$1>; - ATTR1 = <0xc0ffee>; - }; - }; - -')dnl - - dnl dnl dump_system([num_processors], [num_cores], [num_threads]) dnl define(`dump_system', -`forloop(`i', `0', eval(`$1-1'), `dump_backend(i, eval(20000+i*1000))') -forloop(`i', `0', eval(`$1-1'),dnl +`forloop(`i', `0', eval(`$1-1'),dnl ` CONCAT(proc,i) { index = < CONCAT(0x,i) >; diff --git a/libpdbg/dtb.c b/libpdbg/dtb.c index 5013d96..09f039f 100644 --- a/libpdbg/dtb.c +++ b/libpdbg/dtb.c @@ -31,6 +31,7 @@ #include "target.h" #include "fake.dt.h" +#include "fake-backend.dt.h" #include "p8-i2c.dt.h" #include "p8-fsi.dt.h" @@ -447,6 +448,8 @@ struct pdbg_dtb *pdbg_default_dtb(void *system_fdt) case PDBG_BACKEND_FAKE: if (!dtb->system.fdt) dtb->system.fdt = &_binary_fake_dtb_o_start; + if (!dtb->backend.fdt) + dtb->backend.fdt = &_binary_fake_backend_dtb_o_start; break; } diff --git a/tests/test_prop.sh b/tests/test_prop.sh index 5511a75..ba7eaac 100755 --- a/tests/test_prop.sh +++ b/tests/test_prop.sh @@ -39,7 +39,11 @@ test_run libpdbg_prop_test /proc0/pib write ATTR2 char PROCESSOR0 cp fake.dtb fake-prop.dtb test_cleanup rm -f fake-prop.dtb +cp fake-backend.dtb fake-backend-prop.dtb +test_cleanup rm -f fake-backend-prop.dtb + export PDBG_DTB=fake-prop.dtb +export PDBG_BACKEND_DTB=fake-backend-prop.dtb test_result 0 -- test_run libpdbg_prop_test /proc1/pib write ATTR1 int 0xdeadbeef From patchwork Thu Apr 30 03:05:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1279895 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49CKzL3FDCz9sSg for ; Thu, 30 Apr 2020 13:06:38 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=sx0gM0Q1; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 49CKzL2HGWzDr94 for ; Thu, 30 Apr 2020 13:06:38 +1000 (AEST) X-Original-To: pdbg@lists.ozlabs.org Delivered-To: pdbg@lists.ozlabs.org Received: from ozlabs.org (bilbo.ozlabs.org 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t=1588215959; bh=NwDuTQuXK15HQdSdoN65jLcIlI7hlsRRMdqNqWUzhmA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=sx0gM0Q1RHNrsesao9XKXJywN9N4anD+mA/C3xqJ6HedAWvC+FQmRXU9HEMKMHZeh YyQPPvpoYfsczZZiNovQikih2S8KMSdioMb4C4JhQXIXjCfRKVHJIsnc29OuqTtVN4 spWmU2lYh4ruB1nvz28bId7cnB/gmgzLj2udqMkTHSIQIapbh9OqF4XztccS4KugBE 3L/IMpIpvkyCTDz4Z5XszdRsoOe9BF2sUs7OaAfX1mSNGycDko7jcqfau+8BwFNkUn mx93NeorKBkwGxc9EcwYvf2NpRlpaVC6zBsW+i8vlZEwl1iFNmve/HLyvUeBjTIPAm if7unYXocgU+g== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Thu, 30 Apr 2020 13:05:44 +1000 Message-Id: <20200430030544.234289-12-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.4 In-Reply-To: <20200430030544.234289-1-amitay@ozlabs.org> References: <20200430030544.234289-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH 11/11] dts: Split fake2 into backend and system trees X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs --- Makefile.am | 5 ++- fake2-backend.dts.m4 | 104 +++++++++++++++++++++++++++++++++++++++++++ fake2.dts.m4 | 80 +-------------------------------- tests/test_tree2.sh | 1 + 4 files changed, 109 insertions(+), 81 deletions(-) create mode 100644 fake2-backend.dts.m4 diff --git a/Makefile.am b/Makefile.am index e0b0954..f9c0adc 100644 --- a/Makefile.am +++ b/Makefile.am @@ -34,7 +34,7 @@ PDBG_TESTS = \ TESTS = $(libpdbg_tests) optcmd_test $(PDBG_TESTS) -tests/test_tree2.sh: fake2.dtb +tests/test_tree2.sh: fake2.dtb fake2-backend.dtb tests/test_prop.sh: fake.dtb fake-backend.dtb tests/test_p9_fapi_translation.sh: p9.dtb bmc-kernel.dtb @@ -77,7 +77,8 @@ if TARGET_PPC ARCH_FLAGS="-DTARGET_PPC=1" endif -DT = fake.dts fake-backend.dts fake2.dts p8-cronus.dts bmc-cronus.dts \ +DT = fake.dts fake-backend.dts fake2.dts fake2-backend.dts \ + p8-cronus.dts bmc-cronus.dts \ p8-fsi.dts p8-i2c.dts p8-kernel.dts \ p9w-fsi.dts p9r-fsi.dts p9z-fsi.dts bmc-kernel.dts \ bmc-sbefifo.dts \ diff --git a/fake2-backend.dts.m4 b/fake2-backend.dts.m4 new file mode 100644 index 0000000..36c1140 --- /dev/null +++ b/fake2-backend.dts.m4 @@ -0,0 +1,104 @@ +define(`CONCAT', `$1$2')dnl + +dnl +dnl forloop([var], [start], [end], [iterator]) +dnl +divert(`-1') +define(`forloop', `pushdef(`$1', `$2')_forloop($@)popdef(`$1')') +define(`_forloop', + `$4`'ifelse($1, `$3', `', `define(`$1', incr($1))$0($@)')') + +dnl +dnl dump_thread([index]) +dnl +define(`dump_thread', +` + thread@$1 { + #address-cells = <0x0>; + #size-cells = <0x0>; + compatible = "ibm,fake-thread"; + reg = <0x$1 0x0>; + index = <0x$1>; + }; +')dnl + +dnl +dnl dump_core_pre([index], [addr]) +dnl +define(`dump_core_pre', +` + core@$2 { + #address-cells = <0x1>; + #size-cells = <0x1>; + compatible = "ibm,fake-core"; + reg = <0x$2 0x0>; + index = <0x$1>;') + +dnl +dnl dump_core_post() +dnl +define(`dump_core_post', ` }; +')dnl + +dnl +dnl dump_core([index], [addr], [num_threads]) +dnl +define(`dump_core', +`dump_core_pre(`$1', `$2') +forloop(`i', `0', eval(`$3-1'), `dump_thread(i)') +dump_core_post()') + +dnl +dnl dump_processor_pre([index], [addr]) +dnl +define(`dump_processor_pre', +`define(`pib_addr', eval(`$2+100'))dnl + fsi@$2 { + #address-cells = <0x1>; + #size-cells = <0x1>; + compatible = "ibm,fake-fsi"; + system-path = "/proc$1/fsi"; + reg = <0x0 0x0>; + index = <0x$1>; + + CONCAT(pib@,pib_addr) { + #address-cells = <0x1>; + #size-cells = <0x1>; + compatible = "ibm,fake-pib"; + system-path = "/proc$1/pib"; + reg = ; + index = <0x$1>;') + +dnl +dnl dump_processor_post() +dnl +define(`dump_processor_post', ` }; + + }; + +')dnl + +dnl +dnl dump_processor([index], [addr], [num_cores], [num_threads]) +dnl +define(`dump_processor',dnl +`dump_processor_pre(`$1', `$2') +forloop(`i', `0', eval(`$3-1'), `dump_core(i, eval(10000+(i+1)*10), $4)') +dump_processor_post()') + +dnl +dnl dump_system([num_processors], [num_cores], [num_threads]) +dnl +define(`dump_system', +`forloop(`i', `0', eval(`$1-1'), `dump_processor(i, eval(20000+i*1000), $2, $3)') +') +divert`'dnl + +/dts-v1/; + +/ { + #address-cells = <0x1>; + #size-cells = <0x1>; +dump_system(8, 4, 2) +}; + diff --git a/fake2.dts.m4 b/fake2.dts.m4 index 8c7b21a..f71caa2 100644 --- a/fake2.dts.m4 +++ b/fake2.dts.m4 @@ -8,84 +8,6 @@ define(`forloop', `pushdef(`$1', `$2')_forloop($@)popdef(`$1')') define(`_forloop', `$4`'ifelse($1, `$3', `', `define(`$1', incr($1))$0($@)')') -dnl -dnl dump_thread([index]) -dnl -define(`dump_thread', -` - thread@$1 { - #address-cells = <0x0>; - #size-cells = <0x0>; - compatible = "ibm,fake-thread"; - reg = <0x$1 0x0>; - index = <0x$1>; - }; -')dnl - -dnl -dnl dump_core_pre([index], [addr]) -dnl -define(`dump_core_pre', -` - core@$2 { - #address-cells = <0x1>; - #size-cells = <0x1>; - compatible = "ibm,fake-core"; - reg = <0x$2 0x0>; - index = <0x$1>;') - -dnl -dnl dump_core_post() -dnl -define(`dump_core_post', ` }; -')dnl - -dnl -dnl dump_core([index], [addr], [num_threads]) -dnl -define(`dump_core', -`dump_core_pre(`$1', `$2') -forloop(`i', `0', eval(`$3-1'), `dump_thread(i)') -dump_core_post()') - -dnl -dnl dump_processor_pre([index], [addr]) -dnl -define(`dump_processor_pre', -`define(`pib_addr', eval(`$2+100'))dnl - fsi@$2 { - #address-cells = <0x1>; - #size-cells = <0x1>; - compatible = "ibm,fake-fsi"; - system-path = "/proc$1/fsi"; - reg = <0x0 0x0>; - index = <0x$1>; - - CONCAT(pib@,pib_addr) { - #address-cells = <0x1>; - #size-cells = <0x1>; - compatible = "ibm,fake-pib"; - system-path = "/proc$1/pib"; - reg = ; - index = <0x$1>;') - -dnl -dnl dump_processor_post() -dnl -define(`dump_processor_post', ` }; - - }; - -')dnl - -dnl -dnl dump_processor([index], [addr], [num_cores], [num_threads]) -dnl -define(`dump_processor',dnl -`dump_processor_pre(`$1', `$2') -forloop(`i', `0', eval(`$3-1'), `dump_core(i, eval(10000+(i+1)*10), $4)') -dump_processor_post()') - dnl dnl dump_system([num_processors], [num_cores], [num_threads]) dnl @@ -96,7 +18,7 @@ define(`dump_system', index = < CONCAT(0x,i) >; }; ') -forloop(`i', `0', eval(`$1-1'), `dump_processor(i, eval(20000+i*1000), $2, $3)')') +') divert`'dnl /dts-v1/; diff --git a/tests/test_tree2.sh b/tests/test_tree2.sh index 7b8ccc8..3b475eb 100755 --- a/tests/test_tree2.sh +++ b/tests/test_tree2.sh @@ -5,6 +5,7 @@ test_group "tree tests for fake2.dts" export PDBG_DTB="fake2.dtb" +export PDBG_BACKEND_DTB="fake2-backend.dtb" test_result 0 <