From patchwork Fri Apr 24 19:11:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Stubbs X-Patchwork-Id: 1276600 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=codesourcery.com Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4983hD5Zfqz9sTK for ; Sat, 25 Apr 2020 05:12:11 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id AF3993894E52; Fri, 24 Apr 2020 19:12:07 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from esa4.mentor.iphmx.com (esa4.mentor.iphmx.com [68.232.137.252]) by sourceware.org (Postfix) with ESMTPS id 47E223893653 for ; Fri, 24 Apr 2020 19:12:05 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 47E223893653 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=codesourcery.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=Andrew_Stubbs@mentor.com IronPort-SDR: ooRwHtMXDSHBBw2xx2O64zreI0FmGCQCn0cFjYU2dxOnXQK2cXbzK7hwSUvxBp/c7i4NOv1TCj 6+bbxhUPljjUSRqacjm08mGrkbXDbzKY9KgTbtQPkXpsGjIx01/5WzC6g2qKn2YS/ZoOmLBNad vbz6KxAzuf36EbMhU7IRIxQPKTB+otz3aqecJWz4qt+b1yXehyHliPDEGCuy5hXYS63XCOxDEf UUiULCMC7+EOxm0pYsnyj+fBBEgx+wDFBYW4wgEqx5QZLAQBV1E1dGK2Kzn/LpNQfv5CYZZaqe sZc= X-IronPort-AV: E=Sophos;i="5.73,313,1583222400"; d="scan'208";a="48274729" Received: from orw-gwy-01-in.mentorg.com ([192.94.38.165]) by esa4.mentor.iphmx.com with ESMTP; 24 Apr 2020 11:12:04 -0800 IronPort-SDR: 5Bthf323xe3yP0EuPOHBHvPqIDfiFPjfpYg+WCEOKSwnXbc0bNNFNCfoh8x6TKW81hmgmLheIo iuapneU4UaNesoiqXlde+bpXYD10r+I5MhYAgRlduBkUB7rNVDKr0EZ7ph/2gIMFRRH4K+BvLV gwLts2NvCrxft6ipL69fRVSA1lU2Qu68iXXPsAehQukM/RcqgwLAms9b4ZE4Pz37L16eGCJVz5 MRacXhsYMRElhu/rbolhiwLZ9Jdn6ZtqbLGWEQ+zFLfJzLH4Q+snj/fyoFwTeSO+HuBBxX+gTD RG4= From: Andrew Stubbs Subject: [committed] amdgcn: Fix wrong-code bug in 64-bit masked add To: "gcc-patches@gcc.gnu.org" Message-ID: <4b0ed794-47ee-19f3-3bd9-606c93cedc3f@codesourcery.com> Date: Fri, 24 Apr 2020 20:11:59 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.7.0 MIME-Version: 1.0 Content-Language: en-GB X-Originating-IP: [137.202.0.90] X-ClientProxiedBy: SVR-IES-MBX-04.mgc.mentorg.com (139.181.222.4) To svr-ies-mbx-01.mgc.mentorg.com (139.181.222.1) X-Spam-Status: No, score=-24.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, HEADER_FROM_DIFFERENT_DOMAINS, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" This patch fixes a bug in which the high-part of a 64-bit add doesn't always merge in the masked lanes properly, depending on register allocation. Unfortunately I don't have a small reproducer for this one, so there's no testcase. Andrew amdgcn: Fix wrong-code bug in 64-bit masked add 2020-04-24 Andrew Stubbs gcc/ * config/gcn/gcn-valu.md (add_zext_dup2_exec): Fix merge of high-part. (add_sext_dup2_exec): Likewise. diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md index 0422e153cf3..d3badb4059c 100644 --- a/gcc/config/gcn/gcn-valu.md +++ b/gcc/config/gcn/gcn-valu.md @@ -1497,7 +1497,8 @@ rtx dsthi = gcn_operand_part (mode, operands[0], 1); emit_insn (gen_vec_duplicate_exec (dsthi, gcn_operand_part (DImode, operands[2], 1), - gcn_gen_undef (mode), operands[4])); + gcn_operand_part (mode, operands[3], 1), + operands[4])); emit_insn (gen_addc3_exec (dsthi, dsthi, const0_rtx, vcc, vcc, gcn_operand_part (mode, operands[3], 1), @@ -1564,7 +1565,8 @@ rtx dsthi = gcn_operand_part (mode, operands[0], 1); emit_insn (gen_vec_duplicate_exec (dsthi, gcn_operand_part (DImode, operands[2], 1), - gcn_gen_undef (mode), operands[4])); + gcn_operand_part (mode, operands[3], 1), + operands[4])); emit_insn (gen_addc3_exec (dsthi, dsthi, operands[5], vcc, vcc, gcn_operand_part (mode, operands[3], 1),