From patchwork Tue Apr 7 06:15:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1267231 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48xHHQ0h5Vz9sRY for ; Tue, 7 Apr 2020 16:16:50 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=DTLWuQ51; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 48xHHP6r4rzDqYJ for ; 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Tue, 7 Apr 2020 16:16:37 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1586240198; bh=93r2vAiPWMeAvgAbvqbTZZFFiwmF+XOUI59RxBrqc8I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DTLWuQ51BweudgCl4qR7PQziXEgLszdSFhbWlu6wMuj97IbqFrbyfPKxUb6uIU1Mu 4nWDD6bPcN/VahREQCQC4OOCcb9TAiiaDHT90lkW7toMvNAX+N4WevpSF9JTT6VuOK hvp76SG5Vdp/BZxS5XLfjKlAKs618rtLhnEeFMxkB5cmLvPCGFIN0qzpkgp4FXigl5 afb1tuSEu9+EKISC4i/uS19/8ZRP6bUBkF+m9vylmFuozUSWQVVK1727o1NGQLZn4Z Z9Wun7MmR5lCb235eK0TIhkij/e1jPbBNZ9RVRvXasgETiimrqxKSj9JD9A9rpKakZ Un1IUsDXsA39w== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Tue, 7 Apr 2020 16:15:55 +1000 Message-Id: <20200407061613.21325-2-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.2 In-Reply-To: <20200407061613.21325-1-amitay@ozlabs.org> References: <20200407061613.21325-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH v2 01/19] libsbefifo: Fix compilation error for undefined variable X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs Reviewed-by: Alistair Popple --- libsbefifo/operation.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/libsbefifo/operation.c b/libsbefifo/operation.c index 07d9f64..8717f15 100644 --- a/libsbefifo/operation.c +++ b/libsbefifo/operation.c @@ -60,17 +60,18 @@ static int sbefifo_transport(struct sbefifo_context *sctx, uint8_t *msg, uint32_ int rc; size_t buflen; + buflen = msg_len; rc = sbefifo_write(sctx, msg, buflen); if (rc) { - LOG("write: cmd=%08x, rc=%d\n", cmd, rc); + LOG("write: cmd=%08x, rc=%d\n", be32toh(*(uint32_t *)(msg+4)), rc); return rc; } buflen = *out_len; rc = sbefifo_read(sctx, out, &buflen); if (rc) { - LOG("read: cmd=%08x, buflen=%zu, rc=%d\n", cmd, buflen, rc); + LOG("read: cmd=%08x, buflen=%zu, rc=%d\n", be32toh(*(uint32_t *)(msg+4)), buflen, rc); return rc; } From patchwork Tue Apr 7 06:15:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1267236 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48xHHy0msyz9sRR for ; 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dkim=pass (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=WH7QTeuB; dkim-atps=neutral Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 48xHHB1g6zz9sRf; Tue, 7 Apr 2020 16:16:38 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1586240198; bh=DdHelmoaI95vjZk/UBJMwv9KlOaVQAxCjK2NGz5An3w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WH7QTeuBTBbUZw66+1c8WnvkPqmi1r4pwT0lGKwYUTN9SDKGhop+KQMPoGHoXw+/Y IR8h23gjoui2fPKB1ern4B3O8lXMxvLv391NRc/BB1oAcQ5n6Q4aGafiji5TT44h/x E2Nv43+Ykzst97OIMlY39esk5vqM32MgUPY5KHR6t0ygAy0Q0RNfdk+ltt+lkXHPac bVfkcOTkSbIDcNCPCV8xXJb6I7snAfwR9on0SSNKoPzdMGfdiEY0M2EexXUcrzA6b6 edgWLQb/DWaB1Oj1SfzFsbwp87QZCJZxOzxBY2Fbch9kXuPCdkOHkdI0aS8tHY8f1H ucIGDgtVJM2Fg== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Tue, 7 Apr 2020 16:15:56 +1000 Message-Id: <20200407061613.21325-3-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.2 In-Reply-To: <20200407061613.21325-1-amitay@ozlabs.org> References: <20200407061613.21325-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH v2 02/19] libsbefifo: Use the correct sized pointer X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs Reviewed-by: Alistair Popple --- libsbefifo/cmd_scom.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/libsbefifo/cmd_scom.c b/libsbefifo/cmd_scom.c index bc9b5f9..bb44e5e 100644 --- a/libsbefifo/cmd_scom.c +++ b/libsbefifo/cmd_scom.c @@ -24,7 +24,7 @@ static int sbefifo_scom_get_push(uint64_t addr, uint8_t **buf, uint32_t *buflen) { - uint8_t *msg; + uint32_t *msg; uint32_t nwords, cmd; nwords = 4; @@ -83,7 +83,7 @@ int sbefifo_scom_get(struct sbefifo_context *sctx, uint64_t addr, uint64_t *valu static int sbefifo_scom_put_push(uint64_t addr, uint64_t value, uint8_t **buf, uint32_t *buflen) { - uint8_t *msg; + uint32_t *msg; uint32_t nwords, cmd; nwords = 6; From patchwork Tue Apr 7 06:15:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1267234 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48xHHh46Hhz9sRY for ; Tue, 7 Apr 2020 16:17:04 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; 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dkim-atps=neutral Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 48xHHB42qsz9sSJ; Tue, 7 Apr 2020 16:16:38 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1586240198; bh=q+XFRpknAMuT2TT2Mxw/tSOGfaXlatRLJuWXKXVtOEk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Qdr8uod0yRxQfUeIrL0ptkoAl2Hb9xybAB3ERZmgVNSWBFnuEQSe2URJ7THFLdS5h 8RXAZBdUHAsjsCo1+sRmNBbZRifiEHih0aQUr+pzMOW6ZxDDqsj7kYsBqx2gMTJcww I+tYnXmWnKN0Glw7+HDKi6Sah9Vim3ztPY+KnizZxPBIQ6KlsW3964Pk0YsFItbUdF Z+qVICjSeG90aXfdDPQCbWk46RwL7zs3Pvc62n7ys3SSMbGYMELhN7iQIMCULSwiwx vqqKYmkFc/zxs2qmeLR/k+AG8iV1ALMSdedkVm+Wr+pwvjciIYaVeL2EKAJdTH+13q Dk1203RRxndgg== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Tue, 7 Apr 2020 16:15:57 +1000 Message-Id: <20200407061613.21325-4-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.2 In-Reply-To: <20200407061613.21325-1-amitay@ozlabs.org> References: <20200407061613.21325-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH v2 03/19] libpdbg: Add an api to get current backend X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs Reviewed-by: Alistair Popple --- libpdbg/dtb.c | 5 +++++ libpdbg/target.h | 1 + 2 files changed, 6 insertions(+) diff --git a/libpdbg/dtb.c b/libpdbg/dtb.c index b094e34..70b7962 100644 --- a/libpdbg/dtb.c +++ b/libpdbg/dtb.c @@ -293,6 +293,11 @@ bool pdbg_set_backend(enum pdbg_backend backend, const char *backend_option) return true; } +enum pdbg_backend pdbg_get_backend(void) +{ + return pdbg_backend; +} + const char *pdbg_get_backend_option(void) { return pdbg_backend_option; diff --git a/libpdbg/target.h b/libpdbg/target.h index 3b74844..7094b51 100644 --- a/libpdbg/target.h +++ b/libpdbg/target.h @@ -80,6 +80,7 @@ extern struct list_head empty_list; extern struct list_head target_classes; struct pdbg_dtb *pdbg_default_dtb(void *system_fdt); +enum pdbg_backend pdbg_get_backend(void); const char *pdbg_get_backend_option(void); bool pdbg_fdt_is_readonly(void *fdt); From patchwork Tue Apr 7 06:15:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1267232 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48xHHW5NK9z9sRY for ; Tue, 7 Apr 2020 16:16:55 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=OR4Ykgn2; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 48xHHW0z3HzDqYJ for ; Tue, 7 Apr 2020 16:16:55 +1000 (AEST) X-Original-To: pdbg@lists.ozlabs.org Delivered-To: pdbg@lists.ozlabs.org Received: from ozlabs.org (bilbo.ozlabs.org [IPv6:2401:3900:2:1::2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 48xHHC1jNLzDqWs for ; Tue, 7 Apr 2020 16:16:39 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=ozlabs.org Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=OR4Ykgn2; dkim-atps=neutral Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 48xHHB6Jb3z9sSK; Tue, 7 Apr 2020 16:16:38 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1586240199; bh=VsIDIQmt3Q8t09prjdbinlmT6oabcH+LgXE0bumjBmo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OR4Ykgn2CzXwGHVVeGjBAZRjCJ+nPqFCQUzV1e0Z0zVmV6tb7pmsR1lzQKkx48vvy bufEVeJWzODcKNJ4A+yZm5Kuoo7x87/eTwetTkLtfI8d26CbW0ezU7gQovsFDVGgO/ CYgR7YNuaf6mzdii2AqQy24BoiiGxezgiWBsgv6P5M//pL5X5yOGMlfFfVsKwyetps drODN5earGrcKHYn9yHTzyvNFsj2G9LLiz4pxGVPVbKxZ/4j6L1YYNnUCKJ6s48DwS 2+WXOxNx+DrQlrW3u6dYsp6CnQzODxMgPn6xeWNTqI2yphtUiy/o8hszxRgdY0Mpen 5FZKVUe0L6cgQ== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Tue, 7 Apr 2020 16:15:58 +1000 Message-Id: <20200407061613.21325-5-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.2 In-Reply-To: <20200407061613.21325-1-amitay@ozlabs.org> References: <20200407061613.21325-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH v2 04/19] libpdbg: Register hwunit drivers per backend X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" This will allow to load backend specific drivers first. All the drivers are registered with the default backend, so this patch does not change libpdbg behaviour. Signed-off-by: Amitay Isaacs Reviewed-by: Alistair Popple --- libpdbg/adu.c | 4 +-- libpdbg/bmcfsi.c | 2 +- libpdbg/cfam.c | 8 +++--- libpdbg/chip.c | 2 +- libpdbg/cronus.c | 6 ++--- libpdbg/fake.c | 8 +++--- libpdbg/host.c | 2 +- libpdbg/htm.c | 6 ++--- libpdbg/hwunit.c | 31 ++++++++++++++++------- libpdbg/hwunit.h | 2 +- libpdbg/i2c.c | 2 +- libpdbg/kernel.c | 4 +-- libpdbg/p8chip.c | 4 +-- libpdbg/p9_fapi_targets.c | 52 +++++++++++++++++++-------------------- libpdbg/p9chip.c | 4 +-- libpdbg/sbefifo.c | 8 +++--- 16 files changed, 79 insertions(+), 66 deletions(-) diff --git a/libpdbg/adu.c b/libpdbg/adu.c index df610a7..fe60118 100644 --- a/libpdbg/adu.c +++ b/libpdbg/adu.c @@ -597,6 +597,6 @@ DECLARE_HW_UNIT(p9_adu); __attribute__((constructor)) static void register_adu(void) { - pdbg_hwunit_register(&p8_adu_hw_unit); - pdbg_hwunit_register(&p9_adu_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p8_adu_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_adu_hw_unit); } diff --git a/libpdbg/bmcfsi.c b/libpdbg/bmcfsi.c index 1d2e304..2639595 100644 --- a/libpdbg/bmcfsi.c +++ b/libpdbg/bmcfsi.c @@ -519,5 +519,5 @@ DECLARE_HW_UNIT(bmcfsi); __attribute__((constructor)) static void register_bmcfsi(void) { - pdbg_hwunit_register(&bmcfsi_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &bmcfsi_hw_unit); } diff --git a/libpdbg/cfam.c b/libpdbg/cfam.c index da4c5fc..0b0b6f0 100644 --- a/libpdbg/cfam.c +++ b/libpdbg/cfam.c @@ -353,8 +353,8 @@ DECLARE_HW_UNIT(cfam_hmfsi); __attribute__((constructor)) static void register_cfam(void) { - pdbg_hwunit_register(&fsi_pib_hw_unit); - pdbg_hwunit_register(&p8_opb_hw_unit); - pdbg_hwunit_register(&p8_opb_hmfsi_hw_unit); - pdbg_hwunit_register(&cfam_hmfsi_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &fsi_pib_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p8_opb_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p8_opb_hmfsi_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &cfam_hmfsi_hw_unit); } diff --git a/libpdbg/chip.c b/libpdbg/chip.c index b45cffa..b961e87 100644 --- a/libpdbg/chip.c +++ b/libpdbg/chip.c @@ -679,5 +679,5 @@ DECLARE_HW_UNIT(proc); __attribute__((constructor)) static void register_proc(void) { - pdbg_hwunit_register(&proc_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &proc_hw_unit); } diff --git a/libpdbg/cronus.c b/libpdbg/cronus.c index ff8af4c..23d555b 100644 --- a/libpdbg/cronus.c +++ b/libpdbg/cronus.c @@ -219,7 +219,7 @@ DECLARE_HW_UNIT(cronus_sbefifo); __attribute__((constructor)) static void register_cronus(void) { - pdbg_hwunit_register(&cronus_pib_hw_unit); - pdbg_hwunit_register(&cronus_fsi_hw_unit); - pdbg_hwunit_register(&cronus_sbefifo_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &cronus_pib_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &cronus_fsi_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &cronus_sbefifo_hw_unit); } diff --git a/libpdbg/fake.c b/libpdbg/fake.c index 82415db..ae02463 100644 --- a/libpdbg/fake.c +++ b/libpdbg/fake.c @@ -90,8 +90,8 @@ DECLARE_HW_UNIT(fake_thread); __attribute__((constructor)) static void register_fake(void) { - pdbg_hwunit_register(&fake_fsi_hw_unit); - pdbg_hwunit_register(&fake_pib_hw_unit); - pdbg_hwunit_register(&fake_core_hw_unit); - pdbg_hwunit_register(&fake_thread_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &fake_fsi_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &fake_pib_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &fake_core_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &fake_thread_hw_unit); } diff --git a/libpdbg/host.c b/libpdbg/host.c index 428c18b..d02b53d 100644 --- a/libpdbg/host.c +++ b/libpdbg/host.c @@ -127,5 +127,5 @@ DECLARE_HW_UNIT(host_pib); __attribute__((constructor)) static void register_host(void) { - pdbg_hwunit_register(&host_pib_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &host_pib_hw_unit); } diff --git a/libpdbg/htm.c b/libpdbg/htm.c index 4d23e82..a259478 100644 --- a/libpdbg/htm.c +++ b/libpdbg/htm.c @@ -1158,7 +1158,7 @@ DECLARE_HW_UNIT(p8_chtm); __attribute__((constructor)) static void register_htm(void) { - pdbg_hwunit_register(&p8_nhtm_hw_unit); - pdbg_hwunit_register(&p9_nhtm_hw_unit); - pdbg_hwunit_register(&p8_chtm_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p8_nhtm_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_nhtm_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p8_chtm_hw_unit); } diff --git a/libpdbg/hwunit.c b/libpdbg/hwunit.c index c7ec63d..710c78a 100644 --- a/libpdbg/hwunit.c +++ b/libpdbg/hwunit.c @@ -20,26 +20,28 @@ #include "hwunit.h" #define MAX_HW_UNITS 1024 +#define MAX_BACKENDS 16 -static const struct hw_unit_info *g_hw_unit[MAX_HW_UNITS]; -static int g_hw_unit_count; +static const struct hw_unit_info *g_hw_unit[MAX_BACKENDS][MAX_HW_UNITS]; +static int g_hw_unit_count[MAX_BACKENDS]; -void pdbg_hwunit_register(const struct hw_unit_info *hw_unit) +void pdbg_hwunit_register(enum pdbg_backend backend, const struct hw_unit_info *hw_unit) { - assert(g_hw_unit_count < MAX_HW_UNITS); + assert(g_hw_unit_count[backend] < MAX_HW_UNITS); - g_hw_unit[g_hw_unit_count] = hw_unit; - g_hw_unit_count++; + g_hw_unit[backend][g_hw_unit_count[backend]] = hw_unit; + g_hw_unit_count[backend]++; } -const struct hw_unit_info *pdbg_hwunit_find_compatible(const char *compat) +static const struct hw_unit_info *find_compatible(enum pdbg_backend backend, + const char *compat) { const struct hw_unit_info *p; struct pdbg_target *target; int i; - for (i = 0; i < g_hw_unit_count; i++) { - p = g_hw_unit[i]; + for (i = 0; i < g_hw_unit_count[backend]; i++) { + p = g_hw_unit[backend][i]; target = p->hw_unit; if (!strcmp(target->compatible, compat)) @@ -48,3 +50,14 @@ const struct hw_unit_info *pdbg_hwunit_find_compatible(const char *compat) return NULL; } + +const struct hw_unit_info *pdbg_hwunit_find_compatible(const char *compat) +{ + const struct hw_unit_info *p; + + p = find_compatible(pdbg_get_backend(), compat); + if (!p) + p = find_compatible(PDBG_DEFAULT_BACKEND, compat); + + return p; +} diff --git a/libpdbg/hwunit.h b/libpdbg/hwunit.h index 7165a3c..5bca088 100644 --- a/libpdbg/hwunit.h +++ b/libpdbg/hwunit.h @@ -31,7 +31,7 @@ struct hw_unit_info { size_t size; }; -void pdbg_hwunit_register(const struct hw_unit_info *hw_unit); +void pdbg_hwunit_register(enum pdbg_backend backend, const struct hw_unit_info *hw_unit); const struct hw_unit_info *pdbg_hwunit_find_compatible(const char *compat); /* diff --git a/libpdbg/i2c.c b/libpdbg/i2c.c index 1a5d089..3d0b80a 100644 --- a/libpdbg/i2c.c +++ b/libpdbg/i2c.c @@ -177,5 +177,5 @@ DECLARE_HW_UNIT(p8_i2c_pib); __attribute__((constructor)) static void register_i2c(void) { - pdbg_hwunit_register(&p8_i2c_pib_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p8_i2c_pib_hw_unit); } diff --git a/libpdbg/kernel.c b/libpdbg/kernel.c index dbd3586..c4637a7 100644 --- a/libpdbg/kernel.c +++ b/libpdbg/kernel.c @@ -264,6 +264,6 @@ DECLARE_HW_UNIT(kernel_pib); __attribute__((constructor)) static void register_kernel(void) { - pdbg_hwunit_register(&kernel_fsi_hw_unit); - pdbg_hwunit_register(&kernel_pib_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &kernel_fsi_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &kernel_pib_hw_unit); } diff --git a/libpdbg/p8chip.c b/libpdbg/p8chip.c index 1bf71e8..484d77c 100644 --- a/libpdbg/p8chip.c +++ b/libpdbg/p8chip.c @@ -738,6 +738,6 @@ DECLARE_HW_UNIT(p8_core); __attribute__((constructor)) static void register_p8chip(void) { - pdbg_hwunit_register(&p8_thread_hw_unit); - pdbg_hwunit_register(&p8_core_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p8_thread_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p8_core_hw_unit); } diff --git a/libpdbg/p9_fapi_targets.c b/libpdbg/p9_fapi_targets.c index 1dc7af8..97680d5 100644 --- a/libpdbg/p9_fapi_targets.c +++ b/libpdbg/p9_fapi_targets.c @@ -720,30 +720,30 @@ DECLARE_HW_UNIT(p9_capp); __attribute__((constructor)) static void register_p9_fapi_targets(void) { - pdbg_hwunit_register(&p9_ex_hw_unit); - pdbg_hwunit_register(&p9_mba_hw_unit); - pdbg_hwunit_register(&p9_mcs_hw_unit); - pdbg_hwunit_register(&p9_xbus_hw_unit); - pdbg_hwunit_register(&p9_abus_hw_unit); - pdbg_hwunit_register(&p9_l4_hw_unit); - pdbg_hwunit_register(&p9_eq_hw_unit); - pdbg_hwunit_register(&p9_mca_hw_unit); - pdbg_hwunit_register(&p9_mcbist_hw_unit); - pdbg_hwunit_register(&p9_mi_hw_unit); - pdbg_hwunit_register(&p9_dmi_hw_unit); - pdbg_hwunit_register(&p9_obus_hw_unit); - pdbg_hwunit_register(&p9_obus_brick_hw_unit); - pdbg_hwunit_register(&p9_sbe_hw_unit); - pdbg_hwunit_register(&p9_ppe_hw_unit); - pdbg_hwunit_register(&p9_pec_hw_unit); - pdbg_hwunit_register(&p9_phb_hw_unit); - pdbg_hwunit_register(&p9_mc_hw_unit); - pdbg_hwunit_register(&p9_mem_port_hw_unit); - pdbg_hwunit_register(&p9_nmmu_hw_unit); - pdbg_hwunit_register(&p9_pau_hw_unit); - pdbg_hwunit_register(&p9_iohs_hw_unit); - pdbg_hwunit_register(&p9_fc_hw_unit); - pdbg_hwunit_register(&p9_pauc_hw_unit); - pdbg_hwunit_register(&p9_chiplet_hw_unit); - pdbg_hwunit_register(&p9_capp_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_ex_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_mba_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_mcs_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_xbus_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_abus_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_l4_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_eq_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_mca_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_mcbist_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_mi_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_dmi_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_obus_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_obus_brick_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_sbe_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_ppe_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_pec_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_phb_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_mc_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_mem_port_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_nmmu_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_pau_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_iohs_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_fc_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_pauc_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_chiplet_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_capp_hw_unit); } diff --git a/libpdbg/p9chip.c b/libpdbg/p9chip.c index 63434ee..6222dc3 100644 --- a/libpdbg/p9chip.c +++ b/libpdbg/p9chip.c @@ -510,6 +510,6 @@ DECLARE_HW_UNIT(p9_core); __attribute__((constructor)) static void register_p9chip(void) { - pdbg_hwunit_register(&p9_thread_hw_unit); - pdbg_hwunit_register(&p9_core_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_thread_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_core_hw_unit); } diff --git a/libpdbg/sbefifo.c b/libpdbg/sbefifo.c index 41e68e9..22f11f1 100644 --- a/libpdbg/sbefifo.c +++ b/libpdbg/sbefifo.c @@ -321,8 +321,8 @@ DECLARE_HW_UNIT(kernel_sbefifo); __attribute__((constructor)) static void register_sbefifo(void) { - pdbg_hwunit_register(&kernel_sbefifo_hw_unit); - pdbg_hwunit_register(&sbefifo_chipop_hw_unit); - pdbg_hwunit_register(&sbefifo_mem_hw_unit); - pdbg_hwunit_register(&sbefifo_pba_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &kernel_sbefifo_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_chipop_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_mem_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_pba_hw_unit); } From patchwork Tue Apr 7 06:15:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1267235 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48xHHr04yJz9sRY for ; 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dkim=pass (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=IRGGGT39; dkim-atps=neutral Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 48xHHC1zz7z9sSW; Tue, 7 Apr 2020 16:16:39 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1586240199; bh=c4SCjVZAOGpr2miBQyNApcLBkiBlwGvQzn9eThGRh6s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=IRGGGT39otIh3TsX/nPC4AtFpKUUsk0/FP123phg4VoxROKOz70FE7NaU5jXCugaP 9NQ6GehnR8knlSoR0oawZRmKw4yYJoXlFwfiiyEEP2PnSeE7mtJjhW/RjmwPv0jT1L 0+wH+xDRQkjWMQTgtyRm7gnwZXOaA1nP1wVuiGeEIApLCPE+VkpJjS8tM53Ox1b4gf k8m/1Dzq9S/xWqYbP4JlUGx/7coJXMdUmAQCJSSuDM5J32ecscnE9toJWX7YovFY+M j1YEQue2ohXGNSWD05GUMJ+doKZoDtXJMUYl22ReXktR7FpOL+qn7Vgm2JL+FkE5ZV qa6jUM//71C/A== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Tue, 7 Apr 2020 16:15:59 +1000 Message-Id: <20200407061613.21325-6-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.2 In-Reply-To: <20200407061613.21325-1-amitay@ozlabs.org> References: <20200407061613.21325-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH v2 05/19] libpdbg: Register fsi drivers with fsi backend X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs Reviewed-by: Alistair Popple --- libpdbg/bmcfsi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/libpdbg/bmcfsi.c b/libpdbg/bmcfsi.c index 2639595..2f199fa 100644 --- a/libpdbg/bmcfsi.c +++ b/libpdbg/bmcfsi.c @@ -519,5 +519,5 @@ DECLARE_HW_UNIT(bmcfsi); __attribute__((constructor)) static void register_bmcfsi(void) { - pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &bmcfsi_hw_unit); + pdbg_hwunit_register(PDBG_BACKEND_FSI, &bmcfsi_hw_unit); } From patchwork Tue Apr 7 06:16:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1267237 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48xHJ22tfKz9sRR for ; Tue, 7 Apr 2020 16:17:22 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=UKUnwnVf; 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Tue, 7 Apr 2020 16:16:39 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1586240199; bh=ZZbKZcvVHMb4p34UHusil9ZdiGK1IP6J3GLVX9rmO1M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UKUnwnVfHBG1k4FpX+0rs0szyVwjGzosBbmuz/1DzaAqoW4YvYwVnCCc/Xc8BRsPF ApmecHwBTd5Tevc8FKTKvUCqZNGbymE0pKu5S9ghnC9VgPqdScnOlRfhEdPkDYheUp lpuw6orhGe26YefmymzWpBGW7vpHffAvc/kRb26mZf7jkYZI219whxtVW5GKpl9V6r hSk2a0ahL9o3PvZLT+rYeaEWZUcfixOPvAOqi84gJgKn3CQpdYNMxjD+lj40ZKfsRT r/HJCPLoHDBz+IaJumr+VH5+/R+o6DrXXeQnE13vwiLCdrSyfJSI8BPypW6Czz09wV hzTg5kxEMBBSA== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Tue, 7 Apr 2020 16:16:00 +1000 Message-Id: <20200407061613.21325-7-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.2 In-Reply-To: <20200407061613.21325-1-amitay@ozlabs.org> References: <20200407061613.21325-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH v2 06/19] libpdbg: Register i2c driver with i2c backend X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs Reviewed-by: Alistair Popple --- libpdbg/i2c.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/libpdbg/i2c.c b/libpdbg/i2c.c index 3d0b80a..e3d508b 100644 --- a/libpdbg/i2c.c +++ b/libpdbg/i2c.c @@ -177,5 +177,5 @@ DECLARE_HW_UNIT(p8_i2c_pib); __attribute__((constructor)) static void register_i2c(void) { - pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p8_i2c_pib_hw_unit); + pdbg_hwunit_register(PDBG_BACKEND_I2C, &p8_i2c_pib_hw_unit); } From patchwork Tue Apr 7 06:16:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1267238 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48xHJ61Rvkz9sRY for ; Tue, 7 Apr 2020 16:17:26 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=xXTVmeOF; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 48xHJ55zkDzDqWl for ; Tue, 7 Apr 2020 16:17:25 +1000 (AEST) X-Original-To: pdbg@lists.ozlabs.org Delivered-To: pdbg@lists.ozlabs.org Received: from ozlabs.org (bilbo.ozlabs.org [203.11.71.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 48xHHD2vjVzDqTw for ; Tue, 7 Apr 2020 16:16:40 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=ozlabs.org Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=xXTVmeOF; dkim-atps=neutral Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 48xHHC6sDtz9sRR; Tue, 7 Apr 2020 16:16:39 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1586240200; bh=4LiZkrF9sajttJvyt46kdbJd8a9z1QqP0yn9VmbyviU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=xXTVmeOFQ/c0n31GOvUz8r2CtueXax57PsmvJQh4yky4UoBJ3RwyPniTg/LsCAa7S 3rvj1qld1LYx6ETjlmyNRILCel8GIJCs4YLoB5eguNulM/cjO+nv4KCnSQhHdFB4ps ocSVgUMNVGnOt3pPSvyWOlAyb84KUaTZEwjtOVxUfb3zDTDqr+/SbkiLLjJIeWKhfE I9vUty9A2anaJUhM6D12oMkRm/yQh7r/Vfu5H82BTHUTkZvLgQGBAXOpNzdADANz5p HWFzzur0BYrmnsjt5omVVHQDa8XAUKh2br5rPdvRt2wZpW0iTCJJNEVT2HtRFP7U0i gHl1kfjupekJQ== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Tue, 7 Apr 2020 16:16:01 +1000 Message-Id: <20200407061613.21325-8-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.2 In-Reply-To: <20200407061613.21325-1-amitay@ozlabs.org> References: <20200407061613.21325-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH v2 07/19] libpdbg: Register fake drivers with fake backend X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs Reviewed-by: Alistair Popple --- libpdbg/fake.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/libpdbg/fake.c b/libpdbg/fake.c index ae02463..64925d4 100644 --- a/libpdbg/fake.c +++ b/libpdbg/fake.c @@ -90,8 +90,8 @@ DECLARE_HW_UNIT(fake_thread); __attribute__((constructor)) static void register_fake(void) { - pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &fake_fsi_hw_unit); - pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &fake_pib_hw_unit); - pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &fake_core_hw_unit); - pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &fake_thread_hw_unit); + pdbg_hwunit_register(PDBG_BACKEND_FAKE, &fake_fsi_hw_unit); + pdbg_hwunit_register(PDBG_BACKEND_FAKE, &fake_pib_hw_unit); + pdbg_hwunit_register(PDBG_BACKEND_FAKE, &fake_core_hw_unit); + pdbg_hwunit_register(PDBG_BACKEND_FAKE, &fake_thread_hw_unit); } From patchwork Tue Apr 7 06:16:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1267239 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48xHJ91jBJz9sRR for ; Tue, 7 Apr 2020 16:17:29 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=o1E/Lkm/; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 48xHJ84H07zDqWs for ; Tue, 7 Apr 2020 16:17:28 +1000 (AEST) X-Original-To: pdbg@lists.ozlabs.org Delivered-To: pdbg@lists.ozlabs.org Received: from ozlabs.org (bilbo.ozlabs.org [203.11.71.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 48xHHD6JsBzDqV4 for ; Tue, 7 Apr 2020 16:16:40 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=ozlabs.org Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=o1E/Lkm/; dkim-atps=neutral Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 48xHHD3Knjz9sRY; Tue, 7 Apr 2020 16:16:40 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1586240200; bh=Ax8eXO/Bldi6DntBJ1r2NcNMhIR1Eo+d+FvsRXSlwh0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=o1E/Lkm/fsAJZvu4SnTDZyM2Bjs0YZCZH3/B8yjdSmW9q0K8V3306A/Jqr0y5/fQm XD/WOzdXn34gom3dF4z8T94iyffCAc31sDwx8k6d/xbBi/pTmJ5K/pIpil30P737TQ LqHi26WYTdORAvh79KjJh3u+xj4US9gi7bBTLb2N8fYkNIyWDi5BKmnQxoZt1chqmE o9CWT/EULAdYZe0KjKr1ueRkxz4aptmNQsxNBw61SE1OVNJFSXIz3dhzWvaJ3odiWy Fxk7tHdfzhCuml13mWekY8BFfcsQnvxo8oIpxZeqUQuw6crmzdeR8WSYjIInv87XM1 ZZmDGo0c80i1g== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Tue, 7 Apr 2020 16:16:02 +1000 Message-Id: <20200407061613.21325-9-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.2 In-Reply-To: <20200407061613.21325-1-amitay@ozlabs.org> References: <20200407061613.21325-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH v2 08/19] libpdbg: Register host drivers with host backend X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs Reviewed-by: Alistair Popple --- libpdbg/host.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/libpdbg/host.c b/libpdbg/host.c index d02b53d..63a0d5b 100644 --- a/libpdbg/host.c +++ b/libpdbg/host.c @@ -127,5 +127,5 @@ DECLARE_HW_UNIT(host_pib); __attribute__((constructor)) static void register_host(void) { - pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &host_pib_hw_unit); + pdbg_hwunit_register(PDBG_BACKEND_HOST, &host_pib_hw_unit); } From patchwork Tue Apr 7 06:16:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1267240 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48xHJD0dzrz9sRR for ; Tue, 7 Apr 2020 16:17:32 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=GXN+vDv7; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 48xHJC4TbrzDqhS for ; Tue, 7 Apr 2020 16:17:31 +1000 (AEST) X-Original-To: pdbg@lists.ozlabs.org Delivered-To: pdbg@lists.ozlabs.org Received: from ozlabs.org (bilbo.ozlabs.org [203.11.71.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 48xHHF4PFrzDqTw for ; Tue, 7 Apr 2020 16:16:41 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=ozlabs.org Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=GXN+vDv7; dkim-atps=neutral Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 48xHHF1ph0z9sRR; Tue, 7 Apr 2020 16:16:41 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1586240201; bh=p+2wDTybXogrjUihi8oXERKKZcU5QTge7hhXSxPY2ZU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GXN+vDv7KhbZ08gFf+D0AcsSclxv35LzTvW/FOVYwgORNdINocjkTHIK4V09p56/0 WFVUYAPXm1uZIGt9OrKxemhsI4QRXhs7WwOmJ7EdtDnHxisbPueprFjnT6/OkQ10D5 z4tWQkJ7+4oAinyhmbFEBdhWK5M2qpWKcGMOZ4hHpPcF97n87wb1mSFWd4Xl8NNjUI tMtNtJv1ozroJmymLb8kbAOUBcl5tOeJtPRLHm+Gq2Q/4Yb4HhQhZkChfDR7fhNcSr I3+2Lm0/AOFcze2FJjqwugE+RCdYD8iVlGUakB4SX0wdvXQRYKLM0MZdtnM7Y4PPuf qnHH9CFCk9vSA== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Tue, 7 Apr 2020 16:16:03 +1000 Message-Id: <20200407061613.21325-10-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.2 In-Reply-To: <20200407061613.21325-1-amitay@ozlabs.org> References: <20200407061613.21325-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH v2 09/19] libpdbg: Register cronus drivers with cronus backend X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs Reviewed-by: Alistair Popple --- libpdbg/cronus.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/libpdbg/cronus.c b/libpdbg/cronus.c index 23d555b..eeaedc5 100644 --- a/libpdbg/cronus.c +++ b/libpdbg/cronus.c @@ -219,7 +219,7 @@ DECLARE_HW_UNIT(cronus_sbefifo); __attribute__((constructor)) static void register_cronus(void) { - pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &cronus_pib_hw_unit); - pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &cronus_fsi_hw_unit); - pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &cronus_sbefifo_hw_unit); + pdbg_hwunit_register(PDBG_BACKEND_CRONUS, &cronus_pib_hw_unit); + pdbg_hwunit_register(PDBG_BACKEND_CRONUS, &cronus_fsi_hw_unit); + pdbg_hwunit_register(PDBG_BACKEND_CRONUS, &cronus_sbefifo_hw_unit); } From patchwork Tue Apr 7 06:16:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1267241 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48xHJG0DXvz9sSJ for ; Tue, 7 Apr 2020 16:17:34 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=C0IY6RIA; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 48xHJF6KMRzDqhb for ; Tue, 7 Apr 2020 16:17:33 +1000 (AEST) X-Original-To: pdbg@lists.ozlabs.org Delivered-To: pdbg@lists.ozlabs.org Received: from ozlabs.org (bilbo.ozlabs.org [203.11.71.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 48xHHG0CCpzDqTw for ; Tue, 7 Apr 2020 16:16:42 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=ozlabs.org Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=C0IY6RIA; dkim-atps=neutral Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 48xHHF4mFPz9sRY; Tue, 7 Apr 2020 16:16:41 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1586240201; bh=sz740xnmpWFi1Qcp0cQWzZWQQTJTQ4hBnT7TtYb5lls=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=C0IY6RIAMHb6c8/VAxGNYby8qo50FP4tF8n7em+uNQeUOFgGsxLrogW9GOd7UKAIz 4wcduroYMLJf5e+DA5wq06YZ/1QzituYHDN/I3IZXeTp/PuDZmP+10NHcs4vH1PKNd GgsrY75Mc+MG0BUQLp/JAA5t3BsWoMHaP5g/ShgIAOi7fmLhcSIUchof2L2koKbMk+ 0DkQmwTzh5l0zQKxZ7NmwH7KH32yEMEhtMW/qdRevfh3JAyFRXyapORZ3Urrke6iRK uTPmYRTOJxlDR3UsrMnS68T5Y5aKNCq7ZLbHHRXiykrzmoOkyB+eN6syfTemZlg7bU B2jzUyFmrD75Q== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Tue, 7 Apr 2020 16:16:04 +1000 Message-Id: <20200407061613.21325-11-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.2 In-Reply-To: <20200407061613.21325-1-amitay@ozlabs.org> References: <20200407061613.21325-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH v2 10/19] libpdbg: Add pib driver using sbefifo X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs --- libpdbg/sbefifo.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/libpdbg/sbefifo.c b/libpdbg/sbefifo.c index 22f11f1..112504f 100644 --- a/libpdbg/sbefifo.c +++ b/libpdbg/sbefifo.c @@ -237,6 +237,22 @@ static int sbefifo_op_thread_sreset(struct chipop *chipop, return sbefifo_op_control(chipop, core_id, thread_id, SBEFIFO_INSN_OP_SRESET); } +static int sbefifo_pib_read(struct pib *pib, uint64_t addr, uint64_t *val) +{ + struct sbefifo *sbefifo = target_to_sbefifo(pib->target.parent); + struct sbefifo_context *sctx = sbefifo->get_sbefifo_context(sbefifo); + + return sbefifo_scom_get(sctx, addr, val); +} + +static int sbefifo_pib_write(struct pib *pib, uint64_t addr, uint64_t val) +{ + struct sbefifo *sbefifo = target_to_sbefifo(pib->target.parent); + struct sbefifo_context *sctx = sbefifo->get_sbefifo_context(sbefifo); + + return sbefifo_scom_put(sctx, addr, val); +} + static struct sbefifo_context *sbefifo_op_get_context(struct sbefifo *sbefifo) { return sbefifo->sf_ctx; @@ -306,6 +322,18 @@ static struct chipop sbefifo_chipop = { }; DECLARE_HW_UNIT(sbefifo_chipop); +static struct pib sbefifo_pib = { + .target = { + .name = "SBE FIFO Chip-op based PIB", + .compatible = "ibm,sbefifo-pib", + .class = "pib", + }, + .read = sbefifo_pib_read, + .write = sbefifo_pib_write, + .fd = -1, +}; +DECLARE_HW_UNIT(sbefifo_pib); + static struct sbefifo kernel_sbefifo = { .target = { .name = "Kernel based FSI SBE FIFO", @@ -323,6 +351,7 @@ static void register_sbefifo(void) { pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &kernel_sbefifo_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_chipop_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_pib_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_mem_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_pba_hw_unit); } From patchwork Tue Apr 7 06:16:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1267242 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48xHJK1Tc7z9sSJ for ; Tue, 7 Apr 2020 16:17:37 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; 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dkim-atps=neutral Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 48xHHG0fk6z9sRf; Tue, 7 Apr 2020 16:16:42 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1586240202; bh=XfyDDi66Jh1o8ijPeN/raYtTrSLUJ1P2aEfsh0n73gA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Q5J199rTdPwMknvsgs3TAmqBDPafkVoYf1WNTI255bsXrUEpC+cvIt59I8A18zMzf 50Z5Ywe0sLOWgoZI66T19929UjXRHzr/K40m6JJ/J1J+/nNqGQr/uvCy2VcFlmb0U1 t3k2QYV8s/gzgpNFeBNunkwADHk3Jvr1zz1reZrhF3EpJDzybgs1Fmgs3hdK5oy/EW ktlcHcdAdhWiWvY/233BHxuearzPDexj5vTVm38AkA8BBSGMJnX0kAHwx2GCQlq4xG i7APZIjjTYmLqeR5elv14AcmpQ5rJPCMCkVnROkotIn3cRo52jhdCaaJJB4y4GYTt0 QI3JUar44hk2g== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Tue, 7 Apr 2020 16:16:05 +1000 Message-Id: <20200407061613.21325-12-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.2 In-Reply-To: <20200407061613.21325-1-amitay@ozlabs.org> References: <20200407061613.21325-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH v2 11/19] libpdbg: Add chiplet driver using sbefifo X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs --- libpdbg/sbefifo.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/libpdbg/sbefifo.c b/libpdbg/sbefifo.c index 112504f..72a58f9 100644 --- a/libpdbg/sbefifo.c +++ b/libpdbg/sbefifo.c @@ -334,6 +334,15 @@ static struct pib sbefifo_pib = { }; DECLARE_HW_UNIT(sbefifo_pib); +static struct chiplet sbefifo_chiplet = { + .target = { + .name = "SBE FIFO Chip-op based Chiplet", + .compatible = "ibm,sbefifo-chiplet", + .class = "chiplet", + }, +}; +DECLARE_HW_UNIT(sbefifo_chiplet); + static struct sbefifo kernel_sbefifo = { .target = { .name = "Kernel based FSI SBE FIFO", @@ -352,6 +361,7 @@ static void register_sbefifo(void) pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &kernel_sbefifo_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_chipop_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_pib_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_chiplet_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_mem_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_pba_hw_unit); } From patchwork Tue Apr 7 06:16:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1267243 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48xHJM4zyQz9sRf for ; Tue, 7 Apr 2020 16:17:39 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=wr+SgsJJ; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 48xHJM3nPbzDqjh for ; Tue, 7 Apr 2020 16:17:39 +1000 (AEST) X-Original-To: pdbg@lists.ozlabs.org Delivered-To: pdbg@lists.ozlabs.org Received: from ozlabs.org (bilbo.ozlabs.org [IPv6:2401:3900:2:1::2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 48xHHH096SzDqWl for ; Tue, 7 Apr 2020 16:16:43 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=ozlabs.org Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=wr+SgsJJ; dkim-atps=neutral Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 48xHHG3xGZz9sRR; Tue, 7 Apr 2020 16:16:42 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1586240202; bh=Qj4kzwW+Br+j+ASJJxpXKbySjk0QGmGX0h5jeY2vFWI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=wr+SgsJJgiwoXP8qUtSOI3wIdLQi1Ez3C5Bf/2Xr6J4Cz4ZfYFGN8GN1rioXLuxEb BgUfY5o0C1/vuBwJLdAmcvIgFt9aV5G/nZ9AXhGUgWMMNj52MZkJuQIU34mJ1UjKNW phVGO1FnWZXEdfJAuH9Ly91+9zkJYj/cnM5GvDdVizkoYRiMydQb2Ett/2S40FD+0K gOKKXUdQyyqiv+WAu2OmW2RG5M7Cw7VosntNIx3x7XFMuaZc4U16BIIUhM8RA10pc8 w5yeRIutfBoHudEhP7q/9O1zBXGRq/Hks8pTU8Qrf0KZ7BKzWAjYdbl4S6T4rLP1+f uqn+zIfNALh6g== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Tue, 7 Apr 2020 16:16:06 +1000 Message-Id: <20200407061613.21325-13-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.2 In-Reply-To: <20200407061613.21325-1-amitay@ozlabs.org> References: <20200407061613.21325-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH v2 12/19] libpdbg: Add core driver using sbefifo X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs --- libpdbg/sbefifo.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/libpdbg/sbefifo.c b/libpdbg/sbefifo.c index 72a58f9..f498a4d 100644 --- a/libpdbg/sbefifo.c +++ b/libpdbg/sbefifo.c @@ -343,6 +343,15 @@ static struct chiplet sbefifo_chiplet = { }; DECLARE_HW_UNIT(sbefifo_chiplet); +static struct core sbefifo_core = { + .target = { + .name = "SBE FIFO Chip-op based Core", + .compatible = "ibm,sbefifo-core", + .class = "core", + }, +}; +DECLARE_HW_UNIT(sbefifo_core); + static struct sbefifo kernel_sbefifo = { .target = { .name = "Kernel based FSI SBE FIFO", @@ -362,6 +371,7 @@ static void register_sbefifo(void) pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_chipop_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_pib_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_chiplet_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_core_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_mem_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_pba_hw_unit); } From patchwork Tue Apr 7 06:16:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1267244 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48xHJS0486z9sRR for ; Tue, 7 Apr 2020 16:17:44 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=fYvMwEEH; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 48xHJR5Bx2zDqX2 for ; Tue, 7 Apr 2020 16:17:43 +1000 (AEST) X-Original-To: pdbg@lists.ozlabs.org Delivered-To: pdbg@lists.ozlabs.org Received: from ozlabs.org (bilbo.ozlabs.org [IPv6:2401:3900:2:1::2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 48xHHH31D2zDqTw for ; Tue, 7 Apr 2020 16:16:43 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=ozlabs.org Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=fYvMwEEH; dkim-atps=neutral Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 48xHHH0Xzwz9sRY; Tue, 7 Apr 2020 16:16:43 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1586240203; bh=xFXnPRNBhCTSpunr7KNpfjQZVbxShtMi+zzZGYKeCKY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fYvMwEEHNhRd/eBHAiJTJLUi55WCYKGXSNMcR96KBqOx2KZUSiDcUQpgpJ7osjbmy UzkxXXWBpPjKFpho87CUFi9l07UNCEfY/XHpQZf3rMcl06ocQIMqqCelkW13Edh4Hv KZjTRsLrE2T7JBjhbHGc7M/XjBHCKj4TFhhXMdpenyG1FG/kw4LrNMGVLF3JPnbrWn 4q/lrNagsa82D00VxNRuWutAYPr43RWbs9UapGkkjzrhjoy7mymdU+pY3DLwScdDtb 22QvZYu4RSoML/IezKj/zSMCWCTIIKZmZJEy+XF7drSWz+umx+lgZ0lSqrfcE7Un1p RQrnokLoDmznA== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Tue, 7 Apr 2020 16:16:07 +1000 Message-Id: <20200407061613.21325-14-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.2 In-Reply-To: <20200407061613.21325-1-amitay@ozlabs.org> References: <20200407061613.21325-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH v2 13/19] libpdbg: Add thread driver using sbefifo X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs --- libpdbg/sbefifo.c | 75 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 75 insertions(+) diff --git a/libpdbg/sbefifo.c b/libpdbg/sbefifo.c index f498a4d..fbc7bfc 100644 --- a/libpdbg/sbefifo.c +++ b/libpdbg/sbefifo.c @@ -253,6 +253,65 @@ static int sbefifo_pib_write(struct pib *pib, uint64_t addr, uint64_t val) return sbefifo_scom_put(sctx, addr, val); } +static int sbefifo_thread_probe(struct pdbg_target *target) +{ + struct thread *thread = target_to_thread(target); + uint32_t tid; + + assert(!pdbg_target_u32_property(target, "tid", &tid)); + thread->id = tid; + + return 0; +} + +static void sbefifo_thread_release(struct pdbg_target *target) +{ +} + +static int sbefifo_thread_op(struct thread *thread, uint32_t oper) +{ + struct pdbg_target *core = pdbg_target_require_parent("core", &thread->target); + struct sbefifo *sbefifo = target_to_sbefifo( + pdbg_target_require_parent("sbefifo", &thread->target)); + struct sbefifo_context *sctx = sbefifo->get_sbefifo_context(sbefifo); + uint8_t mode = 0; + + /* Enforce special-wakeup for thread stop and sreset */ + if ((oper & 0xf) == SBEFIFO_INSN_OP_STOP || + (oper & 0xf) == SBEFIFO_INSN_OP_SRESET) + mode = 0x2; + + return sbefifo_control_insn(sctx, + pdbg_target_index(core), + thread->id, + oper, + mode); +} +static int sbefifo_thread_start(struct thread *thread) +{ + return sbefifo_thread_op(thread, SBEFIFO_INSN_OP_START); +} + +static int sbefifo_thread_stop(struct thread *thread) +{ + return sbefifo_thread_op(thread, SBEFIFO_INSN_OP_STOP); +} + +static int sbefifo_thread_step(struct thread *thread, int count) +{ + int i, rc = 0; + + for (i = 0; i < count; i++) + rc |= sbefifo_thread_op(thread, SBEFIFO_INSN_OP_STEP); + + return rc; +} + +static int sbefifo_thread_sreset(struct thread *thread) +{ + return sbefifo_thread_op(thread, SBEFIFO_INSN_OP_SRESET); +} + static struct sbefifo_context *sbefifo_op_get_context(struct sbefifo *sbefifo) { return sbefifo->sf_ctx; @@ -352,6 +411,21 @@ static struct core sbefifo_core = { }; DECLARE_HW_UNIT(sbefifo_core); +static struct thread sbefifo_thread = { + .target = { + .name = "SBE FFIO Chip-op based Thread", + .compatible = "ibm,sbefifo-thread", + .class = "thread", + .probe = sbefifo_thread_probe, + .release = sbefifo_thread_release, + }, + .start = sbefifo_thread_start, + .stop = sbefifo_thread_stop, + .step = sbefifo_thread_step, + .sreset = sbefifo_thread_sreset, +}; +DECLARE_HW_UNIT(sbefifo_thread); + static struct sbefifo kernel_sbefifo = { .target = { .name = "Kernel based FSI SBE FIFO", @@ -372,6 +446,7 @@ static void register_sbefifo(void) pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_pib_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_chiplet_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_core_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_thread_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_mem_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_pba_hw_unit); } From patchwork Tue Apr 7 06:16:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1267245 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48xHJX55lRz9sRY for ; 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dkim=pass (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=hVTExb+I; dkim-atps=neutral Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 48xHHH3P03z9sRR; Tue, 7 Apr 2020 16:16:43 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1586240203; bh=qvptJxn2cGRXB3ZQbpBuQgUE/tnVbJycIyTyVeKMqeI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hVTExb+IbW0oZ/+8mn63IvybMq4gwbEiwLW0ZnUm7pQumekBJVfqXfG7vqLq+CqEw rFf6gmSnLBuyfCGcP7FZ7oLgsLOw0bq56Z5GuRqkWhZf60Ykw/30VRh/QqEaNLy2oA rcstWiI2/WZFWgr2i/DGFN3fAfxrKzSk1gqWnWIguO24Ev5PlXB3e8Y92Z4R4LF6mF +nEF5Yxgs6hiAoSIkgGgidSLAR4+N4qlUIztpvBj9JXZ1NM1SFOFvNIFBOfjscvjEQ L08Yo3jEdD+nQwPOa7x+8P6oBiXxKFW679Wdz5Re7+Wha2KEjCNvNft86NyyLwBrmg KCRZaNLs12lMw== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Tue, 7 Apr 2020 16:16:08 +1000 Message-Id: <20200407061613.21325-15-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.2 In-Reply-To: <20200407061613.21325-1-amitay@ozlabs.org> References: <20200407061613.21325-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH v2 14/19] libpdbg: Add all thread procedures to pib target X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs --- libpdbg/hwunit.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/libpdbg/hwunit.h b/libpdbg/hwunit.h index 5bca088..318a611 100644 --- a/libpdbg/hwunit.h +++ b/libpdbg/hwunit.h @@ -93,6 +93,10 @@ struct pib { struct pdbg_target target; int (*read)(struct pib *, uint64_t, uint64_t *); int (*write)(struct pib *, uint64_t, uint64_t); + int (*thread_start_all)(struct pib *); + int (*thread_stop_all)(struct pib *); + int (*thread_step_all)(struct pib *, int); + int (*thread_sreset_all)(struct pib *); void *priv; int fd; }; From patchwork Tue Apr 7 06:16:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1267246 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48xHJd0cXNz9sRY for ; Tue, 7 Apr 2020 16:17:53 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; 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dkim-atps=neutral Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 48xHHH6LbHz9sRY; Tue, 7 Apr 2020 16:16:43 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1586240204; bh=TRQx/CztdKjhRrN/HJfC7Rxykb0F/s9PPetGeyQSLrw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=xeLqs3ZTl/SjtWBdhRRm1J7IOB1bdrhC5gj+DuFBCN9nDHwm6eVh+tFDaH3rEjeeL d6rplUOAnKXJIuyFM5ND36udNcwmIXq9Gbo7ygBpO0EjZnDGn6pMwEk+pPkgeBNhoW SZMp5h9Gy0qZXiI8fyIP0LRrPFgsRggXAuE2bzIF/jyG9P9Mf4Sy40xHOEWUGcB8of HToEshsY8jO6M0pfhK6kAS57JL/5w79U/rSCBpDt0my+HhF+Q5pdq5AyLLtBQ0QbVM cjw8vfWdAxhnu8hR4ZIO451zrOyrmcnD+W0CoqOumeusmwdUi0tNjLP/24xWf3P7fg Xkx7vc4T0z8SA== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Tue, 7 Apr 2020 16:16:09 +1000 Message-Id: <20200407061613.21325-16-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.2 In-Reply-To: <20200407061613.21325-1-amitay@ozlabs.org> References: <20200407061613.21325-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH v2 15/19] libpdbg: Implement all thread procedures using sbefifo X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs --- libpdbg/sbefifo.c | 51 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) diff --git a/libpdbg/sbefifo.c b/libpdbg/sbefifo.c index fbc7bfc..b11b188 100644 --- a/libpdbg/sbefifo.c +++ b/libpdbg/sbefifo.c @@ -253,6 +253,53 @@ static int sbefifo_pib_write(struct pib *pib, uint64_t addr, uint64_t val) return sbefifo_scom_put(sctx, addr, val); } +static int sbefifo_pib_thread_op(struct pib *pib, uint32_t oper) +{ + struct sbefifo *sbefifo = target_to_sbefifo(pib->target.parent); + struct sbefifo_context *sctx = sbefifo->get_sbefifo_context(sbefifo); + uint32_t core_id, thread_id; + uint8_t mode = 0; + + /* + * core_id = 0xff (all SMT4 cores) + * thread_id = 0xf (all 4 threads in the SMT4 core) + */ + core_id = 0xff; + thread_id = 0xf; + + /* Enforce special-wakeup for thread stop and sreset */ + if ((oper & 0xf) == SBEFIFO_INSN_OP_STOP || + (oper & 0xf) == SBEFIFO_INSN_OP_SRESET) + mode = 0x2; + + return sbefifo_control_insn(sctx, core_id, thread_id, oper, mode); +} + +static int sbefifo_pib_thread_start(struct pib *pib) +{ + return sbefifo_pib_thread_op(pib, SBEFIFO_INSN_OP_START); +} + +static int sbefifo_pib_thread_stop(struct pib *pib) +{ + return sbefifo_pib_thread_op(pib, SBEFIFO_INSN_OP_STOP); +} + +static int sbefifo_pib_thread_step(struct pib *pib, int count) +{ + int i, rc = 0; + + for (i = 0; i < count; i++) + rc |= sbefifo_pib_thread_op(pib, SBEFIFO_INSN_OP_STEP); + + return rc; +} + +static int sbefifo_pib_thread_sreset(struct pib *pib) +{ + return sbefifo_pib_thread_op(pib, SBEFIFO_INSN_OP_SRESET); +} + static int sbefifo_thread_probe(struct pdbg_target *target) { struct thread *thread = target_to_thread(target); @@ -389,6 +436,10 @@ static struct pib sbefifo_pib = { }, .read = sbefifo_pib_read, .write = sbefifo_pib_write, + .thread_start_all = sbefifo_pib_thread_start, + .thread_stop_all = sbefifo_pib_thread_stop, + .thread_step_all = sbefifo_pib_thread_step, + .thread_sreset_all = sbefifo_pib_thread_sreset, .fd = -1, }; DECLARE_HW_UNIT(sbefifo_pib); From patchwork Tue Apr 7 06:16:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1267247 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48xHJg3sH2z9sRf for ; Tue, 7 Apr 2020 16:17:55 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=UOFz2FCl; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 48xHJg2P9VzDqWl for ; Tue, 7 Apr 2020 16:17:55 +1000 (AEST) X-Original-To: pdbg@lists.ozlabs.org Delivered-To: pdbg@lists.ozlabs.org Received: from ozlabs.org (bilbo.ozlabs.org [203.11.71.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 48xHHJ4XdGzDqTw for ; Tue, 7 Apr 2020 16:16:44 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=ozlabs.org Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=UOFz2FCl; dkim-atps=neutral Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 48xHHJ2VVsz9sRR; Tue, 7 Apr 2020 16:16:44 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1586240204; bh=4JT4kVKez+Y9IlRbaula9w+PQDpntjwjahBZYP8gOWg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UOFz2FClEWDu44aitiYqT4PstgSzmzKoZO3RqAmpix5d8xxU7Dh7aNWHEsTBWDoi3 Mxj8WKrtksVKZKggQCOmTVm0d1aINs4H/1XIY56XPUY2Rc4Z9NI3yy6tKm7YKsUNnx qWtyvx/jtf2m7Lqu2POfFv/LlsA4f1rslh5I2DKuanvO4gGvnkxDGdtATUiieVJi7/ lZED5j0DynFGXD19sBGlHTA7ogruBNqdyo6BgHhZSXNA4q8epszgNRVE5/O6nBp3Fi TJqxHrFfExtDrjVKti9jbhRjyXjVz+UHKKzbRfZ+gfsI3G7gSOzJiqy+3zvAVROner /C6X5pOjsMrZA== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Tue, 7 Apr 2020 16:16:10 +1000 Message-Id: <20200407061613.21325-17-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.2 In-Reply-To: <20200407061613.21325-1-amitay@ozlabs.org> References: <20200407061613.21325-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH v2 16/19] libpdbg: Remove special case thread procedures using sbefifo X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Always check if the all thread procedures are provided by pib. If not, use individual thread operations. Signed-off-by: Amitay Isaacs --- libpdbg/chip.c | 60 +++++++++++++++++--------------------------------- 1 file changed, 20 insertions(+), 40 deletions(-) diff --git a/libpdbg/chip.c b/libpdbg/chip.c index b961e87..4ab5a4c 100644 --- a/libpdbg/chip.c +++ b/libpdbg/chip.c @@ -156,21 +156,16 @@ int thread_sreset(struct pdbg_target *thread_target) int thread_step_all(void) { - struct pdbg_target *pib, *thread; + struct pdbg_target *target, *thread; int rc = 0, count = 0; - pdbg_for_each_class_target("pib", pib) { - struct chipop *chipop; + pdbg_for_each_class_target("pib", target) { + struct pib *pib = target_to_pib(target); - chipop = pib_to_chipop(pib); - if (!chipop) + if (!pib->thread_step_all) break; - /* - * core_id = 0xff (all SMT4 cores) - * thread_id = 0xf (all 4 threads in the SMT4 core) - */ - rc |= chipop->thread_step(chipop, 0xff, 0xf); + rc |= pib->thread_step_all(pib, 1); count++; } @@ -189,21 +184,16 @@ int thread_step_all(void) int thread_start_all(void) { - struct pdbg_target *pib, *thread; + struct pdbg_target *target, *thread; int rc = 0, count = 0; - pdbg_for_each_class_target("pib", pib) { - struct chipop *chipop; + pdbg_for_each_class_target("pib", target) { + struct pib *pib = target_to_pib(target); - chipop = pib_to_chipop(pib); - if (!chipop) + if (!pib->thread_start_all) break; - /* - * core_id = 0xff (all SMT4 cores) - * thread_id = 0xf (all 4 threads in the SMT4 core) - */ - rc |= chipop->thread_start(chipop, 0xff, 0xf); + rc |= pib->thread_start_all(pib); count++; } @@ -222,21 +212,16 @@ int thread_start_all(void) int thread_stop_all(void) { - struct pdbg_target *pib, *thread; + struct pdbg_target *target, *thread; int rc = 0, count = 0; - pdbg_for_each_class_target("pib", pib) { - struct chipop *chipop; + pdbg_for_each_class_target("pib", target) { + struct pib *pib = target_to_pib(target); - chipop = pib_to_chipop(pib); - if (!chipop) + if (!pib->thread_stop_all) break; - /* - * core_id = 0xff (all SMT4 cores) - * thread_id = 0xf (all 4 threads in the SMT4 core) - */ - rc |= chipop->thread_stop(chipop, 0xff, 0xf); + rc |= pib->thread_stop_all(pib); count++; } @@ -255,21 +240,16 @@ int thread_stop_all(void) int thread_sreset_all(void) { - struct pdbg_target *pib, *thread; + struct pdbg_target *target, *thread; int rc = 0, count = 0; - pdbg_for_each_class_target("pib", pib) { - struct chipop *chipop; + pdbg_for_each_class_target("pib", target) { + struct pib *pib = target_to_pib(target); - chipop = pib_to_chipop(pib); - if (!chipop) + if (!pib->thread_sreset_all) break; - /* - * core_id = 0xff (all SMT4 cores) - * thread_id = 0xf (all 4 threads in the SMT4 core) - */ - rc |= chipop->thread_sreset(chipop, 0xff, 0xf); + rc |= pib->thread_sreset_all(pib); count++; } From patchwork Tue Apr 7 06:16:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1267248 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48xHJm3JGSz9sRY for ; Tue, 7 Apr 2020 16:18:00 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=WpfFkNN0; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 48xHJm2NMCzDqYX for ; Tue, 7 Apr 2020 16:18:00 +1000 (AEST) X-Original-To: pdbg@lists.ozlabs.org Delivered-To: pdbg@lists.ozlabs.org Received: from ozlabs.org (bilbo.ozlabs.org [203.11.71.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 48xHHK196szDqTw for ; Tue, 7 Apr 2020 16:16:45 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=ozlabs.org Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=WpfFkNN0; dkim-atps=neutral Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 48xHHJ4y6fz9sRY; Tue, 7 Apr 2020 16:16:44 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1586240204; bh=s5+4SUaQi77TdJcOy7ZeC8d4omH+dJE8O9F2ckLJGzY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WpfFkNN03rlrCPzPaBiZ8TIlY5kq0Cw5PVI6crgPFt9lYt1qxJS5+5zcw4es88Voj l5Rw0JPGLbqh3AK5DaOsO9OOv2ZG+FjBOGmxJ+EGS+3Q4yiovyWOk9U/MaM+TqcJy/ z60G5Uc6CSUnIklnHxuUZfrfCzA+Se7Kona6NC6Hs+N3i/IA6QzSF0xC8mZpPr4jZu Xj8bJZKuHxUaARlcttZwqjvPycal//qLgjjKouuPM56/C9ycBosWh7dqSaL7BtGgN/ +++eAUXLAeKzO7lrXt+tQDAmoDH9EJHlGlou2V0WnyHXZHniMHCHN5CaH0w5LKYjNS ppQk2tuu6+vBQ== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Tue, 7 Apr 2020 16:16:11 +1000 Message-Id: <20200407061613.21325-18-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.2 In-Reply-To: <20200407061613.21325-1-amitay@ozlabs.org> References: <20200407061613.21325-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH v2 17/19] libpdbg: Drop thread procedures from chipop target X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs --- libpdbg/hwunit.h | 4 ---- libpdbg/sbefifo.c | 46 ---------------------------------------------- 2 files changed, 50 deletions(-) diff --git a/libpdbg/hwunit.h b/libpdbg/hwunit.h index 318a611..de929da 100644 --- a/libpdbg/hwunit.h +++ b/libpdbg/hwunit.h @@ -75,10 +75,6 @@ struct chipop { int (*istep)(struct chipop *, uint32_t major, uint32_t minor); int (*mpipl_enter)(struct chipop *); int (*mpipl_continue)(struct chipop *); - int (*thread_start)(struct chipop *, uint32_t core_id, uint32_t thread_id); - int (*thread_stop)(struct chipop *, uint32_t core_id, uint32_t thread_id); - int (*thread_step)(struct chipop *, uint32_t core_id, uint32_t thread_id); - int (*thread_sreset)(struct chipop *, uint32_t core_id, uint32_t thread_id); }; #define target_to_chipop(x) container_of(x, struct chipop, target) diff --git a/libpdbg/sbefifo.c b/libpdbg/sbefifo.c index b11b188..69ea9c7 100644 --- a/libpdbg/sbefifo.c +++ b/libpdbg/sbefifo.c @@ -195,48 +195,6 @@ static int sbefifo_op_mpipl_enter(struct chipop *chipop) return sbefifo_mpipl_enter(sctx); } -static int sbefifo_op_control(struct chipop *chipop, - uint32_t core_id, uint32_t thread_id, - uint32_t oper) -{ - struct sbefifo *sbefifo = target_to_sbefifo(chipop->target.parent); - struct sbefifo_context *sctx = sbefifo->get_sbefifo_context(sbefifo); - uint8_t mode = 0; - - /* Enforce special-wakeup for thread stop and sreset */ - if ((oper & 0xf) == SBEFIFO_INSN_OP_STOP || - (oper & 0xf) == SBEFIFO_INSN_OP_SRESET) - mode = 0x2; - - PR_NOTICE("sbefifo: control c:0x%x, t:0x%x, op:%u mode:%u\n", core_id, thread_id, oper, mode); - - return sbefifo_control_insn(sctx, core_id & 0xff, thread_id & 0xff, oper & 0xff, mode); -} - -static int sbefifo_op_thread_start(struct chipop *chipop, - uint32_t core_id, uint32_t thread_id) -{ - return sbefifo_op_control(chipop, core_id, thread_id, SBEFIFO_INSN_OP_START); -} - -static int sbefifo_op_thread_stop(struct chipop *chipop, - uint32_t core_id, uint32_t thread_id) -{ - return sbefifo_op_control(chipop, core_id, thread_id, SBEFIFO_INSN_OP_STOP); -} - -static int sbefifo_op_thread_step(struct chipop *chipop, - uint32_t core_id, uint32_t thread_id) -{ - return sbefifo_op_control(chipop, core_id, thread_id, SBEFIFO_INSN_OP_STEP); -} - -static int sbefifo_op_thread_sreset(struct chipop *chipop, - uint32_t core_id, uint32_t thread_id) -{ - return sbefifo_op_control(chipop, core_id, thread_id, SBEFIFO_INSN_OP_SRESET); -} - static int sbefifo_pib_read(struct pib *pib, uint64_t addr, uint64_t *val) { struct sbefifo *sbefifo = target_to_sbefifo(pib->target.parent); @@ -421,10 +379,6 @@ static struct chipop sbefifo_chipop = { .istep = sbefifo_op_istep, .mpipl_enter = sbefifo_op_mpipl_enter, .mpipl_continue = sbefifo_op_mpipl_continue, - .thread_start = sbefifo_op_thread_start, - .thread_stop = sbefifo_op_thread_stop, - .thread_step = sbefifo_op_thread_step, - .thread_sreset = sbefifo_op_thread_sreset, }; DECLARE_HW_UNIT(sbefifo_chipop); From patchwork Tue Apr 7 06:16:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1267249 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48xHJr3Gqsz9sRR for ; Tue, 7 Apr 2020 16:18:04 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=h4oHVmXl; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 48xHJq0J9qzDqhS for ; Tue, 7 Apr 2020 16:18:03 +1000 (AEST) X-Original-To: pdbg@lists.ozlabs.org Delivered-To: pdbg@lists.ozlabs.org Received: from ozlabs.org (bilbo.ozlabs.org [IPv6:2401:3900:2:1::2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 48xHHK4kvczDqTw for ; Tue, 7 Apr 2020 16:16:45 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=ozlabs.org Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=h4oHVmXl; dkim-atps=neutral Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 48xHHK1lj9z9sRf; Tue, 7 Apr 2020 16:16:45 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1586240205; bh=qZgPTAMlOuL+8I++OwFOehshHGpcAiLMTEsdQ7S3rKY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=h4oHVmXlsETVp1VtNFM+gbQ4rr1oeu0hGXqf32DCPgSxo7OUyna6u3Usnm8zednV3 7Rz5tAX5gKzK3SlXhPcA8Zm2mHKW20dQOEQKBbN0Hj5PamE9vPIjeY/99YPfOi7uAf KEjWvuDXJ+AIgvzmxMAsFlYQFdgD5O/jRUnI6d0mGAqSNcw5LEqSUFUNFIRO5tyu/V hJk7hKhiUrkSol3S03/s5O+cVVvsKTJS0isoSpC1DSlpRp/oHlxqP0sLhT/NLJtI+l 3pC668ZYjUID7UzgH9yHar9vBTv00E4sVZ6w23AnJPPpGuMQd/FgyPseUguOEtI7ew 2f2g09QRcI11w== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Tue, 7 Apr 2020 16:16:12 +1000 Message-Id: <20200407061613.21325-19-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.2 In-Reply-To: <20200407061613.21325-1-amitay@ozlabs.org> References: <20200407061613.21325-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH v2 18/19] libpdbg: Add sbefifo backend X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs --- Makefile.am | 1 + libpdbg/dtb.c | 19 ++ libpdbg/libpdbg.h | 7 +- libpdbg/sbefifo.c | 8 +- p9-sbefifo.dts.m4 | 86 ++++++ p9.dts | 652 +++++++++++++++++++++++----------------------- 6 files changed, 442 insertions(+), 331 deletions(-) create mode 100644 p9-sbefifo.dts.m4 diff --git a/Makefile.am b/Makefile.am index 109567d..046e1f7 100644 --- a/Makefile.am +++ b/Makefile.am @@ -80,6 +80,7 @@ endif DT = fake.dts fake2.dts p8-cronus.dts p9-cronus.dts \ p8-fsi.dts p8-i2c.dts p8-kernel.dts \ p9w-fsi.dts p9r-fsi.dts p9z-fsi.dts p9-kernel.dts \ + p9-sbefifo.dts \ p8-host.dts p9-host.dts p8.dts DT_sources = $(DT:.dts=.dtb.S) p9.dtb.S diff --git a/libpdbg/dtb.c b/libpdbg/dtb.c index 70b7962..f72f22b 100644 --- a/libpdbg/dtb.c +++ b/libpdbg/dtb.c @@ -43,6 +43,7 @@ #include "p9-host.dt.h" #include "p8-cronus.dt.h" #include "p9-cronus.dt.h" +#include "p9-sbefifo.dt.h" #include "p8.dt.h" #include "p9.dt.h" @@ -402,6 +403,24 @@ struct pdbg_dtb *pdbg_default_dtb(void *system_fdt) } break; + case PDBG_BACKEND_SBEFIFO: + if (!pdbg_backend_option) { + pdbg_log(PDBG_ERROR, "No system type specified\n"); + pdbg_log(PDBG_ERROR, "Use p9\n"); + return NULL; + } + + if (!strcmp(pdbg_backend_option, "p9")) { + if (!dtb->backend.fdt) + dtb->backend.fdt = &_binary_p9_sbefifo_dtb_o_start; + if (!dtb->system.fdt) + dtb->system.fdt = &_binary_p9_dtb_o_start; + } else { + pdbg_log(PDBG_ERROR, "Invalid system type %s\n", pdbg_backend_option); + pdbg_log(PDBG_ERROR, "Use p9\n"); + } + break; + default: pdbg_log(PDBG_WARNING, "Unable to determine a valid default backend, using fake backend for testing purposes\n"); /* Fall through */ diff --git a/libpdbg/libpdbg.h b/libpdbg/libpdbg.h index 1c974f5..bdc6cea 100644 --- a/libpdbg/libpdbg.h +++ b/libpdbg/libpdbg.h @@ -142,7 +142,6 @@ enum pdbg_target_status { PDBG_TARGET_RELEASED, }; - /** * @brief Describes the various methods (referred to as backends) for * accessing hardware depending on where the code is executed. @@ -197,6 +196,12 @@ enum pdbg_backend { * the BMC network address / hostname. For example p9@spoon2-bmc. */ PDBG_BACKEND_CRONUS, + + /** + * This backend uses sbefifo kernel driver on BMC to access hardware + * via SBE. + */ + PDBG_BACKEND_SBEFIFO, }; /** diff --git a/libpdbg/sbefifo.c b/libpdbg/sbefifo.c index 69ea9c7..7936df6 100644 --- a/libpdbg/sbefifo.c +++ b/libpdbg/sbefifo.c @@ -448,10 +448,10 @@ static void register_sbefifo(void) { pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &kernel_sbefifo_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_chipop_hw_unit); - pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_pib_hw_unit); - pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_chiplet_hw_unit); - pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_core_hw_unit); - pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_thread_hw_unit); + pdbg_hwunit_register(PDBG_BACKEND_SBEFIFO, &sbefifo_pib_hw_unit); + pdbg_hwunit_register(PDBG_BACKEND_SBEFIFO, &sbefifo_chiplet_hw_unit); + pdbg_hwunit_register(PDBG_BACKEND_SBEFIFO, &sbefifo_core_hw_unit); + pdbg_hwunit_register(PDBG_BACKEND_SBEFIFO, &sbefifo_thread_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_mem_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &sbefifo_pba_hw_unit); } diff --git a/p9-sbefifo.dts.m4 b/p9-sbefifo.dts.m4 new file mode 100644 index 0000000..48b3051 --- /dev/null +++ b/p9-sbefifo.dts.m4 @@ -0,0 +1,86 @@ +/dts-v1/; + +/ { + #address-cells = <0x1>; + #size-cells = <0x0>; + + fsi0: kernelfsi@0 { + #address-cells = <0x2>; + #size-cells = <0x1>; + compatible = "ibm,kernel-fsi"; + reg = <0x0 0x0 0x0>; + index = <0x0>; + status = "mustexist"; + system-path = "/proc0/fsi"; + + sbefifo@2400 { /* Bogus address */ + reg = <0x0 0x2400 0x7>; + index = <0x0>; + compatible = "ibm,kernel-sbefifo"; + device-path = "/dev/sbefifo1"; + + sbefifo-pib { + #address-cells = <0x2>; + #size-cells = <0x1>; + index = <0x0>; + compatible = "ibm,sbefifo-pib"; + system-path = "/proc0/pib"; + }; + + sbefifo-mem { + compatible = "ibm,sbefifo-mem"; + system-path = "/mem0"; + }; + + sbefifo-pba { + compatible = "ibm,sbefifo-mem-pba"; + system-path = "/mempba0"; + }; + + sbefifo-chipop { + compatible = "ibm,sbefifo-chipop"; + index = <0x0>; + }; + }; + + hmfsi@100000 { + #address-cells = <0x2>; + #size-cells = <0x1>; + compatible = "ibm,fsi-hmfsi"; + reg = <0x0 0x100000 0x8000>; + port = <0x1>; + index = <0x1>; + system-path = "/proc1/fsi"; + + sbefifo@2400 { /* Bogus address */ + reg = <0x0 0x2400 0x7>; + index = <0x1>; + compatible = "ibm,kernel-sbefifo"; + device-path = "/dev/sbefifo2"; + + sbefifo-pib { + #address-cells = <0x2>; + #size-cells = <0x1>; + index = <0x1>; + compatible = "ibm,sbefifo-pib"; + system-path = "/proc1/pib"; + }; + + sbefifo-mem { + compatible = "ibm,sbefifo-mem"; + system-path = "/mem1"; + }; + + sbefifo-pba { + compatible = "ibm,sbefifo-mem-pba"; + system-path = "/mempba1"; + }; + + sbefifo-chipop { + compatible = "ibm,sbefifo-chipop"; + index = <0x1>; + }; + }; + }; + }; +}; diff --git a/p9.dts b/p9.dts index dfc413c..f8cb88b 100644 --- a/p9.dts +++ b/p9.dts @@ -38,7 +38,7 @@ }; chiplet@1000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x01 >; reg = < 0x00 0x1000000 0xfffff >; #address-cells = < 0x02 >; @@ -52,7 +52,7 @@ }; chiplet@2000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x02 >; reg = < 0x00 0x2000000 0xfffff >; @@ -68,7 +68,7 @@ }; chiplet@3000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x03 >; reg = < 0x00 0x3000000 0xfffff >; @@ -89,7 +89,7 @@ }; chiplet@4000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x04 >; reg = < 0x00 0x4000000 0xfffff >; @@ -105,7 +105,7 @@ }; chiplet@5000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x05 >; reg = < 0x00 0x5000000 0xfffff >; @@ -126,7 +126,7 @@ }; chiplet@6000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x06 >; reg = < 0x00 0x6000000 0xfffff >; #address-cells = < 0x02 >; @@ -141,7 +141,7 @@ }; chiplet@7000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x07 >; reg = < 0x00 0x7000000 0xfffff >; #address-cells = < 0x02 >; @@ -180,7 +180,7 @@ }; chiplet@8000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x08 >; reg = < 0x00 0x8000000 0xfffff >; #address-cells = < 0x02 >; @@ -219,7 +219,7 @@ }; chiplet@9000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x09 >; reg = < 0x00 0x9000000 0xfffff >; #address-cells = < 0x02 >; @@ -248,7 +248,7 @@ }; chiplet@c000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x0c >; reg = < 0x00 0xc000000 0xfffff >; #address-cells = < 0x02 >; @@ -277,7 +277,7 @@ }; chiplet@d000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x0d >; reg = < 0x00 0xd000000 0xfffff >; #address-cells = < 0x02 >; @@ -301,7 +301,7 @@ }; chiplet@e000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x0e >; reg = < 0x00 0xe000000 0xfffff >; #address-cells = < 0x02 >; @@ -325,7 +325,7 @@ }; chiplet@f000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x0f >; reg = < 0x00 0xf000000 0xfffff >; #address-cells = < 0x02 >; @@ -349,7 +349,7 @@ }; chiplet@10000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x10 >; reg = < 0x00 0x10000000 0xfffff >; #address-cells = < 0x02 >; @@ -372,40 +372,40 @@ chiplet@20000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x20 >; reg = < 0x00 0x20000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x00 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -416,40 +416,40 @@ chiplet@21000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x21 >; reg = < 0x00 0x21000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x01 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -468,40 +468,40 @@ chiplet@22000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x22 >; reg = < 0x00 0x22000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x02 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -512,40 +512,40 @@ chiplet@23000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x23 >; reg = < 0x00 0x23000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x03 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -557,7 +557,7 @@ }; chiplet@11000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x11 >; reg = < 0x00 0x11000000 0xfffff >; #address-cells = < 0x02 >; @@ -580,40 +580,40 @@ chiplet@24000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x24 >; reg = < 0x00 0x24000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x04 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -624,40 +624,40 @@ chiplet@25000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x25 >; reg = < 0x00 0x25000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x05 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -676,40 +676,40 @@ chiplet@26000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x26 >; reg = < 0x00 0x26000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x06 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -720,40 +720,40 @@ chiplet@27000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x27 >; reg = < 0x00 0x27000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x07 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -765,7 +765,7 @@ }; chiplet@12000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x12 >; reg = < 0x00 0x12000000 0xfffff >; #address-cells = < 0x02 >; @@ -788,40 +788,40 @@ chiplet@28000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x28 >; reg = < 0x00 0x28000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x08 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -832,40 +832,40 @@ chiplet@29000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x29 >; reg = < 0x00 0x29000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x09 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -884,40 +884,40 @@ chiplet@2a000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x2a >; reg = < 0x00 0x2a000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x0a >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -928,40 +928,40 @@ chiplet@2b000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x2b >; reg = < 0x00 0x2b000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x0b >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -973,7 +973,7 @@ }; chiplet@13000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x13 >; reg = < 0x00 0x13000000 0xfffff >; #address-cells = < 0x02 >; @@ -996,40 +996,40 @@ chiplet@2c000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x2c >; reg = < 0x00 0x2c000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x0c >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -1040,40 +1040,40 @@ chiplet@2d000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x2d >; reg = < 0x00 0x2d000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x0d >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -1092,40 +1092,40 @@ chiplet@2e000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x2e >; reg = < 0x00 0x2e000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x0e >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -1136,40 +1136,40 @@ chiplet@2f000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x2f >; reg = < 0x00 0x2f000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x0f >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -1181,7 +1181,7 @@ }; chiplet@14000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x14 >; reg = < 0x00 0x14000000 0xfffff >; #address-cells = < 0x02 >; @@ -1204,40 +1204,40 @@ chiplet@30000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x30 >; reg = < 0x00 0x30000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x10 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -1248,40 +1248,40 @@ chiplet@31000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x31 >; reg = < 0x00 0x31000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x11 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -1300,40 +1300,40 @@ chiplet@32000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x32 >; reg = < 0x00 0x32000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x12 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -1344,40 +1344,40 @@ chiplet@33000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x33 >; reg = < 0x00 0x33000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x13 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -1389,7 +1389,7 @@ }; chiplet@15000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x15 >; reg = < 0x00 0x15000000 0xfffff >; #address-cells = < 0x02 >; @@ -1412,40 +1412,40 @@ chiplet@34000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x34 >; reg = < 0x00 0x34000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x14 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -1456,40 +1456,40 @@ chiplet@35000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x35 >; reg = < 0x00 0x35000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x15 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -1508,40 +1508,40 @@ chiplet@36000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x36 >; reg = < 0x00 0x36000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x16 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -1552,40 +1552,40 @@ chiplet@37000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x37 >; reg = < 0x00 0x37000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x17 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -1754,7 +1754,7 @@ }; chiplet@1000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x01 >; reg = < 0x00 0x1000000 0xfffff >; #address-cells = < 0x02 >; @@ -1768,7 +1768,7 @@ }; chiplet@2000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x02 >; reg = < 0x00 0x2000000 0xfffff >; @@ -1784,7 +1784,7 @@ }; chiplet@3000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x03 >; reg = < 0x00 0x3000000 0xfffff >; @@ -1805,7 +1805,7 @@ }; chiplet@4000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x04 >; reg = < 0x00 0x4000000 0xfffff >; @@ -1821,7 +1821,7 @@ }; chiplet@5000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x05 >; reg = < 0x00 0x5000000 0xfffff >; @@ -1842,7 +1842,7 @@ }; chiplet@6000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x06 >; reg = < 0x00 0x6000000 0xfffff >; #address-cells = < 0x02 >; @@ -1857,7 +1857,7 @@ }; chiplet@7000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x07 >; reg = < 0x00 0x7000000 0xfffff >; #address-cells = < 0x02 >; @@ -1896,7 +1896,7 @@ }; chiplet@8000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x08 >; reg = < 0x00 0x8000000 0xfffff >; #address-cells = < 0x02 >; @@ -1935,7 +1935,7 @@ }; chiplet@9000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x09 >; reg = < 0x00 0x9000000 0xfffff >; #address-cells = < 0x02 >; @@ -1964,7 +1964,7 @@ }; chiplet@c000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x0c >; reg = < 0x00 0xc000000 0xfffff >; #address-cells = < 0x02 >; @@ -1993,7 +1993,7 @@ }; chiplet@d000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x0d >; reg = < 0x00 0xd000000 0xfffff >; #address-cells = < 0x02 >; @@ -2017,7 +2017,7 @@ }; chiplet@e000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x0e >; reg = < 0x00 0xe000000 0xfffff >; #address-cells = < 0x02 >; @@ -2041,7 +2041,7 @@ }; chiplet@f000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x0f >; reg = < 0x00 0xf000000 0xfffff >; #address-cells = < 0x02 >; @@ -2065,7 +2065,7 @@ }; chiplet@10000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x10 >; reg = < 0x00 0x10000000 0xfffff >; #address-cells = < 0x02 >; @@ -2088,40 +2088,40 @@ chiplet@20000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x20 >; reg = < 0x00 0x20000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x00 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -2132,40 +2132,40 @@ chiplet@21000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x21 >; reg = < 0x00 0x21000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x01 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -2184,40 +2184,40 @@ chiplet@22000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x22 >; reg = < 0x00 0x22000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x02 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -2228,40 +2228,40 @@ chiplet@23000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x23 >; reg = < 0x00 0x23000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x03 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -2273,7 +2273,7 @@ }; chiplet@11000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x11 >; reg = < 0x00 0x11000000 0xfffff >; #address-cells = < 0x02 >; @@ -2296,40 +2296,40 @@ chiplet@24000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x24 >; reg = < 0x00 0x24000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x04 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -2340,40 +2340,40 @@ chiplet@25000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x25 >; reg = < 0x00 0x25000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x05 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -2392,40 +2392,40 @@ chiplet@26000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x26 >; reg = < 0x00 0x26000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x06 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -2436,40 +2436,40 @@ chiplet@27000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x27 >; reg = < 0x00 0x27000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x07 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -2481,7 +2481,7 @@ }; chiplet@12000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x12 >; reg = < 0x00 0x12000000 0xfffff >; #address-cells = < 0x02 >; @@ -2504,40 +2504,40 @@ chiplet@28000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x28 >; reg = < 0x00 0x28000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x08 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -2548,40 +2548,40 @@ chiplet@29000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x29 >; reg = < 0x00 0x29000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x09 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -2600,40 +2600,40 @@ chiplet@2a000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x2a >; reg = < 0x00 0x2a000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x0a >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -2644,40 +2644,40 @@ chiplet@2b000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x2b >; reg = < 0x00 0x2b000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x0b >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -2689,7 +2689,7 @@ }; chiplet@13000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x13 >; reg = < 0x00 0x13000000 0xfffff >; #address-cells = < 0x02 >; @@ -2712,40 +2712,40 @@ chiplet@2c000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x2c >; reg = < 0x00 0x2c000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x0c >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -2756,40 +2756,40 @@ chiplet@2d000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x2d >; reg = < 0x00 0x2d000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x0d >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -2808,40 +2808,40 @@ chiplet@2e000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x2e >; reg = < 0x00 0x2e000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x0e >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -2852,40 +2852,40 @@ chiplet@2f000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x2f >; reg = < 0x00 0x2f000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x0f >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -2897,7 +2897,7 @@ }; chiplet@14000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x14 >; reg = < 0x00 0x14000000 0xfffff >; #address-cells = < 0x02 >; @@ -2920,40 +2920,40 @@ chiplet@30000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x30 >; reg = < 0x00 0x30000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x10 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -2964,40 +2964,40 @@ chiplet@31000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x31 >; reg = < 0x00 0x31000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x11 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -3016,40 +3016,40 @@ chiplet@32000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x32 >; reg = < 0x00 0x32000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x12 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -3060,40 +3060,40 @@ chiplet@33000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x33 >; reg = < 0x00 0x33000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x13 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -3105,7 +3105,7 @@ }; chiplet@15000000 { - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x15 >; reg = < 0x00 0x15000000 0xfffff >; #address-cells = < 0x02 >; @@ -3128,40 +3128,40 @@ chiplet@34000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x34 >; reg = < 0x00 0x34000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x14 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -3172,40 +3172,40 @@ chiplet@35000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x35 >; reg = < 0x00 0x35000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x15 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -3224,40 +3224,40 @@ chiplet@36000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x36 >; reg = < 0x00 0x36000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x16 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; @@ -3268,40 +3268,40 @@ chiplet@37000000 { #address-cells = < 0x02 >; #size-cells = < 0x01 >; - compatible = "ibm,power9-chiplet"; + compatible = "ibm,sbefifo-chiplet", "ibm,power9-chiplet"; index = < 0x37 >; reg = < 0x00 0x37000000 0xfffff >; core@0 { #address-cells = < 0x01 >; #size-cells = < 0x00 >; - compatible = "ibm,power9-core"; + compatible = "ibm,sbefifo-core", "ibm,power9-core"; index = < 0x17 >; reg = < 0x00 0x00 0xfffff >; thread@0 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x00 >; index = < 0x00 >; }; thread@1 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x01 >; index = < 0x01 >; }; thread@2 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x02 >; index = < 0x02 >; }; thread@3 { - compatible = "ibm,power9-thread"; + compatible = "ibm,sbefifo-thread", "ibm,power9-thread"; reg = < 0x00 >; tid = < 0x03 >; index = < 0x03 >; From patchwork Tue Apr 7 06:16:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1267250 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48xHJv6XN1z9sRR for ; Tue, 7 Apr 2020 16:18:07 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=Gb/cFqEK; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 48xHJv0CD2zDqXM for ; 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Tue, 7 Apr 2020 16:16:45 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1586240205; bh=J5qcieSyIsWpmGYlR0cQffPTNREiLPvtypca8prznp4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Gb/cFqEKhYjtXCeyLyYOEfyDICFSf9Lcywn0CGkgbJIQYeko3+DXwmXq9m17IL+31 OrMNHgWhdD1c7FmiXCPTBW3O/TivgWLk8zLpBBnDnvhCitdCvWDfqchr90oKs/pQfC iMm5KWKs9OxFlodTaH24rLvEGnhqfF408hyGrVdNYDaL4YOwXM+kY97rGkVZ/1OvpN lbda4+ABUG+DA9gQmP4J8J04WMXobltrX5LhD0bWHhOBfoZsbzUQT3JAYyeXKBEUFR BnhVQpIMOLpbxPTxdJXI/sa9GyE/kk6tibjw+ooDbTQYZUIaruc7SN1EfXcDq+95KS Ixjj8jXrENpyA== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Tue, 7 Apr 2020 16:16:13 +1000 Message-Id: <20200407061613.21325-20-amitay@ozlabs.org> X-Mailer: git-send-email 2.25.2 In-Reply-To: <20200407061613.21325-1-amitay@ozlabs.org> References: <20200407061613.21325-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH v2 19/19] main: Add sbefifo backend X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs --- src/main.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/main.c b/src/main.c index 785dc26..5a5616d 100644 --- a/src/main.c +++ b/src/main.c @@ -149,6 +149,7 @@ static void print_usage(void) printf("\t\tRun command on all possible processors/chips/threads (default)\n"); printf("\t-b, --backend=backend\n"); printf("\t\tcronus:\tA backend based on cronus server\n"); + printf("\t\tsbefifo:\tA backend using sbefifo kernel driver\n"); printf("\t\tfsi:\tAn experimental backend that uses\n"); printf("\t\t\tbit-banging to access the host processor\n"); printf("\t\t\tvia the FSI bus.\n"); @@ -392,6 +393,8 @@ static bool parse_options(int argc, char *argv[]) backend = PDBG_BACKEND_HOST; } else if (strcmp(optarg, "cronus") == 0) { backend = PDBG_BACKEND_CRONUS; + } else if (strcmp(optarg, "sbefifo") == 0) { + backend = PDBG_BACKEND_SBEFIFO; } else { fprintf(stderr, "Invalid backend '%s'\n", optarg); opt_error = true;