From patchwork Wed Nov 29 17:13:52 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 842672 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="XnMJMRzT"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3yn6b45nCKz9sMN for ; Thu, 30 Nov 2017 04:14:24 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933868AbdK2ROW (ORCPT ); Wed, 29 Nov 2017 12:14:22 -0500 Received: from lelnx194.ext.ti.com ([198.47.27.80]:54755 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933828AbdK2ROR (ORCPT ); Wed, 29 Nov 2017 12:14:17 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id vATHE0nO008215; Wed, 29 Nov 2017 11:14:00 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1511975640; bh=L+dTzWXu4L9gW0IJwbMK/DUu9sBsrNl8qm36kcBafcI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=XnMJMRzTfGqAVPnKY7aP7hiGeR7WIAMZaS1sX8owpl246F1kM/MM+YS+aWcc9YKG/ AkrA7zc3Qral/I0xtmMorMnf1eB/WDnFSAKV56qseBkjzcgDR3CIZVBL8N3LfD68eY XGOKrUeIxZQFPac85LJtx88wYFfyaZFSI8AK3VSA= Received: from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id vATHE0B4003762; Wed, 29 Nov 2017 11:14:00 -0600 Received: from DLEE115.ent.ti.com (157.170.170.26) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Wed, 29 Nov 2017 11:13:59 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Wed, 29 Nov 2017 11:13:59 -0600 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id vATHDxT1024676; Wed, 29 Nov 2017 11:13:59 -0600 Received: from localhost (uda0226330.dhcp.ti.com [128.247.58.231]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id vATHDx326075; Wed, 29 Nov 2017 11:13:59 -0600 (CST) From: "Andrew F. Davis" To: Liam Girdwood , Mark Brown , Rob Herring , Mark Rutland , =?utf-8?q?Beno=C3=AEt_Cousson?= , Tony Lindgren , Shawn Guo , Sascha Hauer CC: , , , "Andrew F . Davis" Subject: [PATCH v2 1/8] ASoC: tlv320aic31xx: Fix typo in DT binding documentation Date: Wed, 29 Nov 2017 11:13:52 -0600 Message-ID: <20171129171359.29382-2-afd@ti.com> X-Mailer: git-send-email 2.15.0 In-Reply-To: <20171129171359.29382-1-afd@ti.com> References: <20171129171359.29382-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The property used to specify a GPIO intended for reset is "reset-gpios", this binding uses "gpio-reset", as almost all other bindings use the former name this use of the latter was certainly not intended. It is not compatible with newer methods used to fetch GPIO pins and to prevent the spread of this error to other bindings lets fix this here. We also standardize the pin as active-low, different device trees have marked the GPIO different ways, luckily the driver currently uses the low-level GPIO set function which does not respect the active-low flag, but future changes may change this. This is an active-low reset, mark it as such. Lastly, add an example of use for this property. Fixes: e00447fafbf7 ("ASoC: tlv320aic31xx: Add basic codec driver implementation") Signed-off-by: Andrew F. Davis --- Documentation/devicetree/bindings/sound/tlv320aic31xx.txt | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/sound/tlv320aic31xx.txt b/Documentation/devicetree/bindings/sound/tlv320aic31xx.txt index 6fbba562eaa7..5b3c33bb99e5 100644 --- a/Documentation/devicetree/bindings/sound/tlv320aic31xx.txt +++ b/Documentation/devicetree/bindings/sound/tlv320aic31xx.txt @@ -22,7 +22,7 @@ Required properties: Optional properties: -- gpio-reset - gpio pin number used for codec reset +- reset-gpios - GPIO specification for the active low RESET input. - ai31xx-micbias-vg - MicBias Voltage setting 1 or MICBIAS_2_0V - MICBIAS output is powered to 2.0V 2 or MICBIAS_2_5V - MICBIAS output is powered to 2.5V @@ -30,6 +30,10 @@ Optional properties: If this node is not mentioned or if the value is unknown, then micbias is set to 2.0V. +Deprecated properties: + +- gpio-reset - gpio pin number used for codec reset + CODEC output pins: * HPL * HPR @@ -48,6 +52,7 @@ CODEC input pins: The pins can be used in referring sound node's audio-routing property. Example: +#include #include tlv320aic31xx: tlv320aic31xx@18 { @@ -56,6 +61,8 @@ tlv320aic31xx: tlv320aic31xx@18 { ai31xx-micbias-vg = ; + reset-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; + HPVDD-supply = <®ulator>; SPRVDD-supply = <®ulator>; SPLVDD-supply = <®ulator>;