From patchwork Fri Nov 24 13:01:28 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Sean_Nyekj=C3=A6r?= X-Patchwork-Id: 841025 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=prevas.dk header.i=@prevas.dk header.b="tWp8GqFH"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3yjxD969Pnz9s4s for ; Sat, 25 Nov 2017 00:02:01 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 5CF2BC21E09; Fri, 24 Nov 2017 13:01:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 68D51C21DB2; Fri, 24 Nov 2017 13:01:57 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 47C02C21D72; Fri, 24 Nov 2017 13:01:56 +0000 (UTC) Received: from mail01.prevas.se (mail01.prevas.se [62.95.78.3]) by lists.denx.de (Postfix) with ESMTPS id D1F64C21DEB for ; Fri, 24 Nov 2017 13:01:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=prevas.dk; i=@prevas.dk; l=1951; q=dns/txt; s=ironport1; t=1511528515; x=1543064515; h=from:to:cc:subject:date:message-id:mime-version; bh=cyuikPkOrWqiL4EtJF+dTWcGjBBU2wVtN7Iii5ImEVU=; b=tWp8GqFHbqconjnpzoYjAeQ0x0TcI4CZqwko4rt2MFZLiYkplTg5cTIM MZFIsm4j2EKEd/FrgMDYT86H7jBN7W+Xg4Acm2wnyNLhXFD8H6qTSOJG9 RcUJ2DNIxHi/gay5oAR261OUYVPxUSZYD2zxEVbvpeq4NTLcuRSWkMQwe 8=; X-IronPort-AV: E=Sophos;i="5.44,447,1505772000"; d="scan'208";a="2865754" Received: from vmprevas4.prevas.se (HELO smtp.prevas.se) ([172.16.8.104]) by ironport1.prevas.se with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Nov 2017 14:01:55 +0100 Received: from skn.prevas.se (172.16.8.31) by smtp.prevas.se (172.16.8.104) with Microsoft SMTP Server (TLS) id 14.3.361.1; Fri, 24 Nov 2017 14:01:55 +0100 From: Sean Nyekjaer To: , Date: Fri, 24 Nov 2017 14:01:28 +0100 Message-ID: <20171124130128.11435-1-sean.nyekjaer@prevas.dk> X-Mailer: git-send-email 2.15.0 MIME-Version: 1.0 X-Originating-IP: [172.16.8.31] Cc: prafulla@marvell.com, sr@denx.de, luka.perkov@sartura.hr Subject: [U-Boot] [PATCH] arm: mvebu: fix boot from UART when in fallback mode X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" It's the first 8 bits of the bootrom error register that contains the boot error/fallback error code. Lets check that and continue to boot from UART. Signed-off-by: Sean Nyekjaer --- arch/arm/mach-mvebu/include/mach/soc.h | 6 ++++++ arch/arm/mach-mvebu/spl.c | 9 +++++++++ 2 files changed, 15 insertions(+) diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h index 1d302761f0..4f81285bb5 100644 --- a/arch/arm/mach-mvebu/include/mach/soc.h +++ b/arch/arm/mach-mvebu/include/mach/soc.h @@ -111,10 +111,16 @@ #define COMPHY_REFCLK_ALIGNMENT (MVEBU_REGISTER(0x182f8)) /* BootROM error register (also includes some status infos) */ +#if defined(CONFIG_ARMADA_38X) +#define CONFIG_BOOTROM_ERR_REG (MVEBU_REGISTER(0x182d0)) +#define BOOTROM_ERR_MODE_OFFS 0 +#define BOOTROM_ERR_MODE_MASK (0xf << BOOTROM_ERR_MODE_OFFS) +#else #define CONFIG_BOOTROM_ERR_REG (MVEBU_REGISTER(0x182d0)) #define BOOTROM_ERR_MODE_OFFS 28 #define BOOTROM_ERR_MODE_MASK (0xf << BOOTROM_ERR_MODE_OFFS) #define BOOTROM_ERR_MODE_UART 0x6 +#endif #if defined(CONFIG_ARMADA_375) /* SAR values for Armada 375 */ diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c index a72a769f7c..2fd6c62589 100644 --- a/arch/arm/mach-mvebu/spl.c +++ b/arch/arm/mach-mvebu/spl.c @@ -26,7 +26,16 @@ static u32 get_boot_device(void) val = readl(CONFIG_BOOTROM_ERR_REG); boot_device = (val & BOOTROM_ERR_MODE_MASK) >> BOOTROM_ERR_MODE_OFFS; debug("BOOTROM_REG=0x%08x boot_device=0x%x\n", val, boot_device); +#if defined(CONFIG_ARMADA_38X) + /* + * If the bootrom error register contains any else than zeros + * in the first 8 bits it's an error condition. And in that case + * try to boot from UART. + */ + if (boot_device) +#else if (boot_device == BOOTROM_ERR_MODE_UART) +#endif return BOOT_DEVICE_UART; /*