From patchwork Mon Nov 20 06:09:37 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shilpasri G Bhat X-Patchwork-Id: 839442 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3ygJGn5mKBz9s0g for ; Mon, 20 Nov 2017 17:10:09 +1100 (AEDT) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3ygJGn4tsWzDrTh for ; Mon, 20 Nov 2017 17:10:09 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=shilpa.bhat@linux.vnet.ibm.com; receiver=) Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3ygJGg5twyzDrTc for ; Mon, 20 Nov 2017 17:10:03 +1100 (AEDT) Received: from pps.filterd (m0098417.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id vAK6942i124277 for ; Mon, 20 Nov 2017 01:10:01 -0500 Received: from e06smtp13.uk.ibm.com (e06smtp13.uk.ibm.com [195.75.94.109]) by mx0a-001b2d01.pphosted.com with ESMTP id 2ebm9su629-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Mon, 20 Nov 2017 01:10:00 -0500 Received: from localhost by e06smtp13.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Mon, 20 Nov 2017 06:09:55 -0000 Received: from d06av21.portsmouth.uk.ibm.com (d06av21.portsmouth.uk.ibm.com [9.149.105.232]) by b06cxnps4074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id vAK69sEe44367910; Mon, 20 Nov 2017 06:09:54 GMT Received: from d06av21.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3B8A552043; Mon, 20 Nov 2017 05:03:28 +0000 (GMT) Received: from oc4502181600.ibm.com (unknown [9.79.193.34]) by d06av21.portsmouth.uk.ibm.com (Postfix) with ESMTP id 47D675203F; Mon, 20 Nov 2017 05:03:27 +0000 (GMT) From: Shilpasri G Bhat To: skiboot@lists.ozlabs.org Date: Mon, 20 Nov 2017 11:39:37 +0530 X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1511157981-19308-1-git-send-email-shilpa.bhat@linux.vnet.ibm.com> References: <1511157981-19308-1-git-send-email-shilpa.bhat@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 17112006-0012-0000-0000-0000058F4B70 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17112006-0013-0000-0000-0000190A15AA Message-Id: <1511158177-19421-1-git-send-email-shilpa.bhat@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-11-20_03:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1711200087 Subject: [Skiboot] [PATCH V4 1/4] sensors: dts: Assert special wakeup on idle cores while reading temperature X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.24 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" In P9, when a core enters a stop state, its clocks will be stopped to save power and hence we will not be able to perform a scom operation to read the DTS temperature sensor. Hence, assert a special wakeup on cores that have entered a stop state in order to successfully complete the scom operation. Signed-off-by: Shilpasri G Bhat [rlippert@google.com: Clear special wakeup only when it succeeds] --- Changes from V3: - Add per-cpu DTS timer and flag core/direct-controls.c | 4 +-- core/sensor.c | 2 +- hw/dts.c | 74 +++++++++++++++++++++++++++++++++++++++++--------- include/cpu.h | 14 ++++++++++ include/dts.h | 2 +- 5 files changed, 79 insertions(+), 17 deletions(-) diff --git a/core/direct-controls.c b/core/direct-controls.c index 512cb36..fcb9350 100644 --- a/core/direct-controls.c +++ b/core/direct-controls.c @@ -220,7 +220,7 @@ static int p9_sreset_thread(struct cpu_thread *cpu) return 0; } -static int dctl_set_special_wakeup(struct cpu_thread *t) +int dctl_set_special_wakeup(struct cpu_thread *t) { struct cpu_thread *c = t->primary; int rc = OPAL_SUCCESS; @@ -238,7 +238,7 @@ static int dctl_set_special_wakeup(struct cpu_thread *t) return rc; } -static int dctl_clear_special_wakeup(struct cpu_thread *t) +int dctl_clear_special_wakeup(struct cpu_thread *t) { struct cpu_thread *c = t->primary; int rc = OPAL_SUCCESS; diff --git a/core/sensor.c b/core/sensor.c index 57b21bc..0e2a5ca 100644 --- a/core/sensor.c +++ b/core/sensor.c @@ -28,7 +28,7 @@ static int64_t opal_sensor_read(uint32_t sensor_hndl, int token, { switch (sensor_get_family(sensor_hndl)) { case SENSOR_DTS: - return dts_sensor_read(sensor_hndl, sensor_data); + return dts_sensor_read(sensor_hndl, token, sensor_data); case SENSOR_OCC: return occ_sensor_read(sensor_hndl, sensor_data); default: diff --git a/hw/dts.c b/hw/dts.c index a10df58..72a392b 100644 --- a/hw/dts.c +++ b/hw/dts.c @@ -20,6 +20,9 @@ #include #include #include +#include +#include +#include struct dts { uint8_t valid; @@ -27,6 +30,14 @@ struct dts { int16_t temp; }; +/* + * Attributes for the core temperature sensor + */ +enum { + SENSOR_DTS_ATTR_TEMP_MAX, + SENSOR_DTS_ATTR_TEMP_TRIP +}; + /* Different sensor locations */ #define P7_CT_ZONE_LSU 0 #define P7_CT_ZONE_ISU 1 @@ -225,8 +236,37 @@ static int dts_read_core_temp_p9(uint32_t pir, struct dts *dts) return 0; } -static int dts_read_core_temp(uint32_t pir, struct dts *dts) +static void dts_async_read_temp(struct timer *t __unused, void *data, + u64 now __unused) +{ + struct dts dts; + int rc, swkup_rc; + struct cpu_thread *cpu = data; + + swkup_rc = dctl_set_special_wakeup(cpu); + + rc = dts_read_core_temp_p9(cpu->pir, &dts); + if (!rc) { + if (cpu->sensor_attr == SENSOR_DTS_ATTR_TEMP_MAX) + *(u32 *)cpu->sensor_data = dts.temp; + else if (cpu->sensor_attr == SENSOR_DTS_ATTR_TEMP_TRIP) + *(u32 *)cpu->sensor_data = dts.trip; + } + + if (!swkup_rc) + dctl_clear_special_wakeup(cpu); + + rc = opal_queue_msg(OPAL_MSG_ASYNC_COMP, NULL, NULL, cpu->token, rc); + if (rc) + prerror("Failed to queue async message\n"); + + cpu->dts_read_in_progress = false; +} + +static int dts_read_core_temp(u32 pir, struct dts *dts, u8 attr, + int token, u32 *sensor_data) { + struct cpu_thread *cpu; int rc; switch (proc_gen) { @@ -236,8 +276,22 @@ static int dts_read_core_temp(uint32_t pir, struct dts *dts) case proc_gen_p8: rc = dts_read_core_temp_p8(pir, dts); break; - case proc_gen_p9: - rc = dts_read_core_temp_p9(pir, dts); + case proc_gen_p9: /* Asynchronus read */ + cpu = find_cpu_by_pir(pir); + if (!cpu) + return OPAL_PARAMETER; + lock(&cpu->dts_lock); + if (cpu->dts_read_in_progress) { + unlock(&cpu->dts_lock); + return OPAL_BUSY; + } + cpu->dts_read_in_progress = true; + cpu->sensor_attr = attr; + cpu->sensor_data = sensor_data; + cpu->token = token; + schedule_timer(&cpu->dts_timer, 0); + rc = OPAL_ASYNC_COMPLETION; + unlock(&cpu->dts_lock); break; default: rc = OPAL_UNSUPPORTED; @@ -303,20 +357,12 @@ enum sensor_dts_class { }; /* - * Attributes for the core temperature sensor - */ -enum { - SENSOR_DTS_ATTR_TEMP_MAX, - SENSOR_DTS_ATTR_TEMP_TRIP -}; - -/* * Extract the centaur chip id which was truncated to fit in the * resource identifier field of the sensor handler */ #define centaur_get_id(rid) (0x80000000 | ((rid) & 0x3ff)) -int64_t dts_sensor_read(uint32_t sensor_hndl, uint32_t *sensor_data) +int64_t dts_sensor_read(u32 sensor_hndl, int token, u32 *sensor_data) { uint8_t attr = sensor_get_attr(sensor_hndl); uint32_t rid = sensor_get_rid(sensor_hndl); @@ -330,7 +376,7 @@ int64_t dts_sensor_read(uint32_t sensor_hndl, uint32_t *sensor_data) switch (sensor_get_frc(sensor_hndl)) { case SENSOR_DTS_CORE_TEMP: - rc = dts_read_core_temp(rid, &dts); + rc = dts_read_core_temp(rid, &dts, attr, token, sensor_data); break; case SENSOR_DTS_MEM_TEMP: rc = dts_read_mem_temp(centaur_get_id(rid), &dts); @@ -403,6 +449,8 @@ bool dts_sensor_create_nodes(struct dt_node *sensors) dt_add_property_string(node, "sensor-type", "temp"); dt_add_property_cells(node, "ibm,pir", c->pir); dt_add_property_string(node, "label", "Core"); + init_timer(&c->dts_timer, dts_async_read_temp, c); + c->dts_read_in_progress = false; } } diff --git a/include/cpu.h b/include/cpu.h index 168fa99..d4b7a42 100644 --- a/include/cpu.h +++ b/include/cpu.h @@ -23,6 +23,7 @@ #include #include #include +#include /* * cpu_thread is our internal structure representing each @@ -102,6 +103,16 @@ struct cpu_thread { struct lock dctl_lock; /* primary only */ bool dctl_stopped; /* per thread */ uint32_t special_wakeup_count; /* primary */ + + /* + * For reading DTS sensors async + */ + struct lock dts_lock; + struct timer dts_timer; + void *sensor_data; + u32 sensor_attr; + u32 token; + bool dts_read_in_progress; }; /* This global is set to 1 to allow secondaries to callin, @@ -284,4 +295,7 @@ extern void cpu_idle_delay(unsigned long delay); extern void cpu_set_radix_mode(void); extern void cpu_fast_reboot_complete(void); +int dctl_set_special_wakeup(struct cpu_thread *t); +int dctl_clear_special_wakeup(struct cpu_thread *t); + #endif /* __CPU_H */ diff --git a/include/dts.h b/include/dts.h index b37919f..17e2e15 100644 --- a/include/dts.h +++ b/include/dts.h @@ -19,7 +19,7 @@ #include -extern int64_t dts_sensor_read(uint32_t sensor_hndl, uint32_t *sensor_data); +extern int64_t dts_sensor_read(u32 sensor_hndl, int token, u32 *sensor_data); extern bool dts_sensor_create_nodes(struct dt_node *sensors); #endif /* __DTS_H */ From patchwork Mon Nov 20 06:10:36 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shilpasri G Bhat X-Patchwork-Id: 839443 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3ygJHl0j2Kz9s5L for ; Mon, 20 Nov 2017 17:10:59 +1100 (AEDT) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3ygJHk62g5zDrTh for ; Mon, 20 Nov 2017 17:10:58 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=shilpa.bhat@linux.vnet.ibm.com; receiver=) Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3ygJHd3ZvszDrTc for ; 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Violators will be prosecuted; Mon, 20 Nov 2017 06:10:45 -0000 Received: from d06av22.portsmouth.uk.ibm.com (d06av22.portsmouth.uk.ibm.com [9.149.105.58]) by b06cxnps3074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id vAK6AjQq31785088; Mon, 20 Nov 2017 06:10:45 GMT Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B43F24C044; Mon, 20 Nov 2017 06:05:52 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id BD3EB4C046; Mon, 20 Nov 2017 06:05:51 +0000 (GMT) Received: from oc4502181600.ibm.com (unknown [9.79.193.34]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTP; Mon, 20 Nov 2017 06:05:51 +0000 (GMT) From: Shilpasri G Bhat To: skiboot@lists.ozlabs.org Date: Mon, 20 Nov 2017 11:40:36 +0530 X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1511157981-19308-1-git-send-email-shilpa.bhat@linux.vnet.ibm.com> References: <1511157981-19308-1-git-send-email-shilpa.bhat@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 17112006-0040-0000-0000-000004104B06 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17112006-0041-0000-0000-000020B30E67 Message-Id: <1511158236-19477-1-git-send-email-shilpa.bhat@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-11-20_03:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1711200087 Subject: [Skiboot] [PATCH V4 2/4] core/direct-controls: wait for core special wkup bit cleared X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.24 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Robert Lippert MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" From: Robert Lippert When clearing special wakeup bit on a core, wait until the bit is actually cleared by the hardware in the status register until returning success. This may help avoid issues with back-to-back reads where the special wakeup request is cleared but the firmware is still processing the request and the next attempt to set the bit reads an immediate success from the previous operation. Change-Id: I86ec8cbbbddd1a5724f451244907693bc09e01ea Signed-off-by: Robert Lippert --- core/direct-controls.c | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/core/direct-controls.c b/core/direct-controls.c index fcb9350..0ed00c1 100644 --- a/core/direct-controls.c +++ b/core/direct-controls.c @@ -95,8 +95,12 @@ static int p9_core_clear_special_wakeup(struct cpu_thread *cpu) uint32_t chip_id = pir_to_chip_id(cpu->pir); uint32_t core_id = pir_to_core_id(cpu->pir); uint32_t swake_addr; + uint32_t sshhyp_addr; + uint64_t val; + int i; swake_addr = XSCOM_ADDR_P9_EC_SLAVE(core_id, EC_PPM_SPECIAL_WKUP_HYP); + sshhyp_addr = XSCOM_ADDR_P9_EC_SLAVE(core_id, P9_EC_PPM_SSHHYP); /* * De-assert special wakeup after a small delay. @@ -110,8 +114,25 @@ static int p9_core_clear_special_wakeup(struct cpu_thread *cpu) chip_id, core_id); return OPAL_HARDWARE; } + time_wait_us(1); - return OPAL_SUCCESS; + for (i = 0; i < P9_SPWKUP_TIMEOUT/P9_SPWKUP_POLL_INTERVAL; i++) { + if (xscom_read(chip_id, sshhyp_addr, &val)) { + prlog(PR_ERR, "Could not clear special wakeup on %u:%u:" + " Unable to read PPM_SSHHYP.\n", + chip_id, core_id); + return OPAL_HARDWARE; + } + if (!(val & P9_SPECIAL_WKUP_DONE)) + return 0; + + time_wait_us(P9_SPWKUP_POLL_INTERVAL); + } + + prlog(PR_ERR, "Could not clear special wakeup on %u:%u:" + " timeout waiting for clear of SPECIAL_WKUP_DONE.\n", + chip_id, core_id); + return OPAL_HARDWARE; } static int p9_thread_quiesced(struct cpu_thread *cpu) From patchwork Mon Nov 20 06:10:52 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shilpasri G Bhat X-Patchwork-Id: 839444 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3ygJJ13PPjz9s0g for ; Mon, 20 Nov 2017 17:11:13 +1100 (AEDT) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3ygJJ12VBBzDrV1 for ; Mon, 20 Nov 2017 17:11:13 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=shilpa.bhat@linux.vnet.ibm.com; receiver=) Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3ygJHr5jpSzDrV4 for ; Mon, 20 Nov 2017 17:11:04 +1100 (AEDT) Received: from pps.filterd (m0098417.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id vAK6Aiog129777 for ; Mon, 20 Nov 2017 01:11:02 -0500 Received: from e06smtp11.uk.ibm.com (e06smtp11.uk.ibm.com [195.75.94.107]) by mx0a-001b2d01.pphosted.com with ESMTP id 2ebm9su779-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Mon, 20 Nov 2017 01:11:02 -0500 Received: from localhost by e06smtp11.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Mon, 20 Nov 2017 06:10:58 -0000 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06cxnps4076.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id vAK6AvIY42532888; Mon, 20 Nov 2017 06:10:57 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3D0F9A4059; Mon, 20 Nov 2017 06:05:42 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5ED33A4053; Mon, 20 Nov 2017 06:05:41 +0000 (GMT) Received: from oc4502181600.ibm.com (unknown [9.79.193.34]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Mon, 20 Nov 2017 06:05:41 +0000 (GMT) From: Shilpasri G Bhat To: skiboot@lists.ozlabs.org Date: Mon, 20 Nov 2017 11:40:52 +0530 X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1511157981-19308-1-git-send-email-shilpa.bhat@linux.vnet.ibm.com> References: <1511157981-19308-1-git-send-email-shilpa.bhat@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 17112006-0040-0000-0000-000004104B0A X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17112006-0041-0000-0000-000020B30E6B Message-Id: <1511158252-19528-1-git-send-email-shilpa.bhat@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-11-20_03:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1711200087 Subject: [Skiboot] [PATCH V4 3/4] core/direct-controls: add function to read core gated state X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.24 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Robert Lippert MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" From: Robert Lippert Change-Id: Ib534503f2528de4d8b1633d9859ae9ff5d010f98 Signed-off-by: Robert Lippert --- core/direct-controls.c | 21 +++++++++++++++++++++ include/cpu.h | 1 + 2 files changed, 22 insertions(+) diff --git a/core/direct-controls.c b/core/direct-controls.c index 0ed00c1..c5ba80e 100644 --- a/core/direct-controls.c +++ b/core/direct-controls.c @@ -35,6 +35,7 @@ #define P9_SPWKUP_SET PPC_BIT(0) #define P9_EC_PPM_SSHHYP 0x0114 +#define P9_CORE_GATED PPC_BIT(0) #define P9_SPECIAL_WKUP_DONE PPC_BIT(1) /* Waking may take up to 5ms for deepest sleep states. Set timeout to 100ms */ @@ -280,6 +281,26 @@ out: return rc; } +int dctl_core_is_gated(struct cpu_thread *t) +{ + struct cpu_thread *c = t->primary; + uint32_t chip_id = pir_to_chip_id(c->pir); + uint32_t core_id = pir_to_core_id(c->pir); + uint32_t sshhyp_addr; + uint64_t val; + + sshhyp_addr = XSCOM_ADDR_P9_EC_SLAVE(core_id, P9_EC_PPM_SSHHYP); + + if (xscom_read(chip_id, sshhyp_addr, &val)) { + prlog(PR_ERR, "Could not query core gated on %u:%u:" + " Unable to read PPM_SSHHYP.\n", + chip_id, core_id); + return OPAL_HARDWARE; + } + + return !!(val & P9_CORE_GATED); +} + static int dctl_stop(struct cpu_thread *t) { struct cpu_thread *c = t->primary; diff --git a/include/cpu.h b/include/cpu.h index d4b7a42..5db4ccb 100644 --- a/include/cpu.h +++ b/include/cpu.h @@ -297,5 +297,6 @@ extern void cpu_fast_reboot_complete(void); int dctl_set_special_wakeup(struct cpu_thread *t); int dctl_clear_special_wakeup(struct cpu_thread *t); +int dctl_core_is_gated(struct cpu_thread *t); #endif /* __CPU_H */ From patchwork Mon Nov 20 06:11:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shilpasri G Bhat X-Patchwork-Id: 839445 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3ygJJX2Lx1z9s0g for ; Mon, 20 Nov 2017 17:11:40 +1100 (AEDT) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3ygJJW714KzDrTh for ; Mon, 20 Nov 2017 17:11:39 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com (client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=shilpa.bhat@linux.vnet.ibm.com; receiver=) Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3ygJJR5CXKzDrTd for ; Mon, 20 Nov 2017 17:11:35 +1100 (AEDT) Received: from pps.filterd (m0098399.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id vAK6909K103480 for ; Mon, 20 Nov 2017 01:11:33 -0500 Received: from e06smtp15.uk.ibm.com (e06smtp15.uk.ibm.com [195.75.94.111]) by mx0a-001b2d01.pphosted.com with ESMTP id 2ebqj1msfn-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Mon, 20 Nov 2017 01:11:33 -0500 Received: from localhost by e06smtp15.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Mon, 20 Nov 2017 06:11:30 -0000 Received: from d06av26.portsmouth.uk.ibm.com (d06av26.portsmouth.uk.ibm.com [9.149.105.62]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id vAK6BTJb37814518; Mon, 20 Nov 2017 06:11:29 GMT Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3BC9CAE04D; Mon, 20 Nov 2017 06:04:48 +0000 (GMT) Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 46BBEAE056; Mon, 20 Nov 2017 06:04:47 +0000 (GMT) Received: from oc4502181600.ibm.com (unknown [9.79.193.34]) by d06av26.portsmouth.uk.ibm.com (Postfix) with ESMTP; Mon, 20 Nov 2017 06:04:46 +0000 (GMT) From: Shilpasri G Bhat To: skiboot@lists.ozlabs.org Date: Mon, 20 Nov 2017 11:41:25 +0530 X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1511157981-19308-1-git-send-email-shilpa.bhat@linux.vnet.ibm.com> References: <1511157981-19308-1-git-send-email-shilpa.bhat@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 17112006-0020-0000-0000-000003CE4995 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17112006-0021-0000-0000-000042638EE3 Message-Id: <1511158285-19572-1-git-send-email-shilpa.bhat@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-11-20_03:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1711200087 Subject: [Skiboot] [PATCH V4 4/4] hw/dts: retry special wakeup operation if core still gated X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.24 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Robert Lippert MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" From: Robert Lippert It has been observed that in some cases the special wakeup operation can "succeed" but the core is still in a gated/offline state. Check for this state after attempting to wakeup a core and retry the wakeup if necessary. Change-Id: Ia6b1b75dcab590c299bed3ee0a42031f09c39eda Signed-off-by: Robert Lippert --- hw/dts.c | 30 +++++++++++++++++++++++++++++- 1 file changed, 29 insertions(+), 1 deletion(-) diff --git a/hw/dts.c b/hw/dts.c index 72a392b..d881f96 100644 --- a/hw/dts.c +++ b/hw/dts.c @@ -236,6 +236,34 @@ static int dts_read_core_temp_p9(uint32_t pir, struct dts *dts) return 0; } +static int dts_wakeup_core(struct cpu_thread *cpu) +{ + int retries = 10; + int rc; + + while (retries-- > 0) { + rc = dctl_set_special_wakeup(cpu); + if (rc) { + prerror("Failed to set special wakeup on %d (%d)\n", + cpu->pir, rc); + return rc; + } + + if (!dctl_core_is_gated(cpu)) + break; + + prlog(PR_NOTICE, "Retrying special wakeup on %d\n", cpu->pir); + rc = dctl_clear_special_wakeup(cpu); + if (rc) { + prerror("Failed to clear special wakeup on %d (%d)\n", + cpu->pir, rc); + return rc; + } + } + + return rc; +} + static void dts_async_read_temp(struct timer *t __unused, void *data, u64 now __unused) { @@ -243,7 +271,7 @@ static void dts_async_read_temp(struct timer *t __unused, void *data, int rc, swkup_rc; struct cpu_thread *cpu = data; - swkup_rc = dctl_set_special_wakeup(cpu); + swkup_rc = dts_wakeup_core(cpu); rc = dts_read_core_temp_p9(cpu->pir, &dts); if (!rc) {