From patchwork Thu Oct 24 18:02:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Miroshnichenko X-Patchwork-Id: 1183488 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46zc5q2q2gz9sP3 for ; Fri, 25 Oct 2019 06:01:03 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=yadro.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=yadro.com header.i=@yadro.com header.b="V8LyQ7xh"; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 46zc5q1WsczDq9C for ; Fri, 25 Oct 2019 06:01:03 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=yadro.com (client-ip=89.207.88.252; helo=mta-01.yadro.com; envelope-from=s.miroshnichenko@yadro.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=yadro.com Authentication-Results: lists.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=yadro.com header.i=@yadro.com header.b="V8LyQ7xh"; dkim-atps=neutral Received: from mta-01.yadro.com (mta-02.yadro.com [89.207.88.252]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 46zZq30csPzDqXX for ; Fri, 25 Oct 2019 05:03:10 +1100 (AEDT) Received: from localhost (unknown [127.0.0.1]) by mta-01.yadro.com (Postfix) with ESMTP id 0AE80437F6; Thu, 24 Oct 2019 18:03:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=yadro.com; h= content-type:content-type:content-transfer-encoding:mime-version :references:in-reply-to:x-mailer:message-id:date:date:subject :subject:from:from:received:received:received; s=mta-01; t= 1571940186; x=1573754587; bh=vnD5IWgS0YpOBnKemZx8esRP8VIDO/n45dp QTencOw0=; b=V8LyQ7xhRhTwA8I7weJ/gVXtvdEvlWQlMZVlUQDwwE5PlCjV7JP b/btAdyImNM2Wb2o9XdVksN/9NiKrOOqX7igHQ1I2iQJPffYXVDBn2SknwlAG+v0 n/JkiKCChM5l5Yuvqx93xMXoN1pymr8XsYxVcZEXdDbVMESHVx39ZVUY= X-Virus-Scanned: amavisd-new at yadro.com Received: from mta-01.yadro.com ([127.0.0.1]) by localhost (mta-01.yadro.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 2JK3Da_gv8YY; Thu, 24 Oct 2019 21:03:06 +0300 (MSK) Received: from T-EXCH-02.corp.yadro.com (t-exch-02.corp.yadro.com [172.17.10.102]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by mta-01.yadro.com (Postfix) with ESMTPS id B804442F15; Thu, 24 Oct 2019 21:03:06 +0300 (MSK) Received: from NB-148.yadro.com (172.17.15.136) by T-EXCH-02.corp.yadro.com (172.17.10.102) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.669.32; Thu, 24 Oct 2019 21:03:06 +0300 From: Sergey Miroshnichenko To: Date: Thu, 24 Oct 2019 21:02:55 +0300 Message-ID: <20191024180259.882169-2-s.miroshnichenko@yadro.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191024180259.882169-1-s.miroshnichenko@yadro.com> References: <20191024180259.882169-1-s.miroshnichenko@yadro.com> MIME-Version: 1.0 X-Originating-IP: [172.17.15.136] X-ClientProxiedBy: T-EXCH-01.corp.yadro.com (172.17.10.101) To T-EXCH-02.corp.yadro.com (172.17.10.102) Subject: [Skiboot] [PATCH RESEND v3 1/5] core/pci: Add functions to find accessible devices by bdfn X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux@yadro.com Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" During the PCIe re-enumeration by an OS the .bdfn field of the struct pci_device may not correspond to its device's actual address for a while, so the pci_find_dev() will return an invalid descriptor in this case. Some code may rely on this behavior, so this patch introduces a new function to return a descriptor for addressable devices only. This new function will help in discovering hotplugged devices. Here's a synthetic (but possible) scenario where pci_find_dev_safe() is different from pci_find_dev(): I. Before the re-enumeration: +-[0021:00]---00.0-[01-04]--+-00.0-[02]-- +-01.0-[03]----00.0 Device Z1 +-02.0-[04]-- - pci_find_dev(0021:03:00.0) returns correct struct pci_device *pd for Device Z1; - pci_find_dev_safe(0021:03:00.0) returns the same pd. II. Re-enumeration, step 1: _____ Dropped the bus numbers by writing zeros / +-[0021:00]---00.0-[00-00]--+-00.0-[02]-- +-01.0-[03]----00.0 Device Z1 +-02.0-[04]-- - Device Z1 is unreachable (bus 1 is not assigned), but pci_find_dev(0021:03:00.0) returns its pd; - pci_find_dev_safe(0021:03:00.0) returns NULL. III. Re-enumeration, step 2: __ Update the bus numbers: primary <- 0, / secondary <- 1, subordinate <- ff / +-[0021:00]---00.0-[01-ff]--+-00.0-[02]-- +-01.0-[03]----00.0 Device Z1 +-02.0-[04]-- - By coincidence, pci_find_dev(0021:03:00.0) returns pd for Device Z1; - pci_find_dev_safe(0021:03:00.0) returns pd for Device Z1, which is correct by coincidence. IV. Re-enumeration, step 3: ___ Drop the bus numbers / +-[0021:00]---00.0-[01-ff]--+-00.0-[00-00]-- +-01.0-[00-00]----00.0 Device Z1 +-02.0-[00-00]-- - Device Z1 is unreachable (downstream 0021:01:01.0 has no bus numbers assigned), but pci_find_dev(0021:03:00.0) returns its uncorrected pd; - pci_find_dev_safe(0021:03:00.0) returns NULL. V. Re-enumeration, step 4: Set the bus numbers __ _ A phantom of Device Z1 \ / from pci_find_dev(03:00.0) +-[0021:00]---00.0-[01-ff]--+-00.0-[02-06]-- - +-01.0-[00-00]----00.0 Device Z1 +-02.0-[00-00]-- - pci_find_dev(0021:03:00.0) returns a phantom of the Device Z1 for wrong address; - pci_find_dev_safe(0021:03:00.0) returns NULL. VI. Re-enumeration, step 5: +-[0021:00]---00.0-[01-ff]--+-00.0-[02-06]-- -+-01.0-[07-0b]----00.0 Device Z1 / +-02.0-[00-00]-- Set the bus numbers -- - pci_find_dev(0021:03:00.0) returns a phantom of the Device Z1; - pci_find_dev_safe(0021:03:00.0) returns NULL; - pci_find_dev_safe(0021:07:00.0) returns pd for the Device Z1, but its .bdfn field needs to be corrected (by the following patch). VI. After the re-enumeration: +-[0021:00]---00.0-[01-10]--+-00.0-[02-06]-- +-01.0-[07-0b]----00.0 Device Z1 +-02.0-[0c-10]-- Even though the .bdfn field is not correct at the moment, it is clear that this is a previously known device, not a hotplugged one. Signed-off-by: Sergey Miroshnichenko --- core/pci.c | 83 +++++++++++++++++++++++++++++++++++++++++++++++++++ include/pci.h | 2 ++ 2 files changed, 85 insertions(+) diff --git a/core/pci.c b/core/pci.c index 9ee70f4f..5bb0c2e2 100644 --- a/core/pci.c +++ b/core/pci.c @@ -1889,6 +1889,89 @@ struct pci_device *pci_find_dev(struct phb *phb, uint16_t bdfn) return pci_walk_dev(phb, NULL, __pci_find_dev, &bdfn); } +static struct pci_device *__pci_find_parent(struct pci_device *pd, uint8_t bus) +{ + struct pci_device *child; + + if (!pd) + return NULL; + + if (pd->secondary_bus == bus) + return pd; + + if (bus < pd->secondary_bus || bus > pd->subordinate_bus) + return NULL; + + list_for_each(&pd->children, child, link) { + if (child->secondary_bus == bus) + return child; + } + + list_for_each(&pd->children, child, link) { + struct pci_device *found = __pci_find_parent(child, bus); + + if (found) + return found; + } + + return NULL; +} + +struct pci_device *pci_find_parent_dev(struct phb *phb, uint16_t bdfn) +{ + struct pci_device *pd; + uint8_t bus = PCI_BUS_NUM(bdfn); + + if (!phb) + return NULL; + + list_for_each(&phb->devices, pd, link) { + struct pci_device *found = __pci_find_parent(pd, bus); + + if (found) + return found; + } + + return NULL; +} + +struct pci_device *pci_find_dev_safe(struct phb *phb, uint16_t bdfn) +{ + struct pci_device *parent; + struct pci_device *child; + + if (!phb) + return NULL; + + if (!bdfn) { + struct pci_device *pd; + + list_for_each(&phb->devices, pd, link) { + if (pd->bdfn == bdfn) + return pd; + } + } + + parent = pci_find_parent_dev(phb, bdfn); + if (!parent) + return NULL; + + list_for_each(&parent->children, child, link) { + if ((child->bdfn & 0xff) == (bdfn & 0xff)) { + if (child->bdfn != bdfn) { + PCIERR(phb, bdfn, "pci_device has invalid bdfn field %04x:%02x:%02x.%d\n", + phb->opal_id, + PCI_BUS_NUM(child->bdfn), + PCI_DEV(child->bdfn), + PCI_FUNC(child->bdfn)); + } + return child; + } + } + + return NULL; +} + static int __pci_restore_bridge_buses(struct phb *phb, struct pci_device *pd, void *data __unused) diff --git a/include/pci.h b/include/pci.h index 8169fe6a..20edb50c 100644 --- a/include/pci.h +++ b/include/pci.h @@ -463,6 +463,8 @@ extern struct pci_device *pci_walk_dev(struct phb *phb, void *), void *userdata); extern struct pci_device *pci_find_dev(struct phb *phb, uint16_t bdfn); +extern struct pci_device *pci_find_dev_safe(struct phb *phb, uint16_t bdfn); +extern struct pci_device *pci_find_parent_dev(struct phb *phb, uint16_t bdfn); extern void pci_restore_bridge_buses(struct phb *phb, struct pci_device *pd); extern struct pci_cfg_reg_filter *pci_find_cfg_reg_filter(struct pci_device *pd, uint32_t start, uint32_t len); From patchwork Thu Oct 24 18:02:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Miroshnichenko X-Patchwork-Id: 1183489 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46zc6B1Kggz9sCJ for ; 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Thu, 24 Oct 2019 21:03:07 +0300 (MSK) Received: from T-EXCH-02.corp.yadro.com (t-exch-02.corp.yadro.com [172.17.10.102]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by mta-01.yadro.com (Postfix) with ESMTPS id DFDA043130; Thu, 24 Oct 2019 21:03:06 +0300 (MSK) Received: from NB-148.yadro.com (172.17.15.136) by T-EXCH-02.corp.yadro.com (172.17.10.102) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.669.32; Thu, 24 Oct 2019 21:03:06 +0300 From: Sergey Miroshnichenko To: Date: Thu, 24 Oct 2019 21:02:56 +0300 Message-ID: <20191024180259.882169-3-s.miroshnichenko@yadro.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191024180259.882169-1-s.miroshnichenko@yadro.com> References: <20191024180259.882169-1-s.miroshnichenko@yadro.com> MIME-Version: 1.0 X-Originating-IP: [172.17.15.136] X-ClientProxiedBy: T-EXCH-01.corp.yadro.com (172.17.10.101) To T-EXCH-02.corp.yadro.com (172.17.10.102) Subject: [Skiboot] [PATCH RESEND v3 2/5] core/pci: Make the pci_scan_one() function public X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux@yadro.com Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" This change will be used by the next commit to discover new PCI devices and to create struct pci_device for them. Signed-off-by: Sergey Miroshnichenko --- core/pci.c | 4 ++-- include/pci.h | 2 ++ 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/core/pci.c b/core/pci.c index 5bb0c2e2..476a3825 100644 --- a/core/pci.c +++ b/core/pci.c @@ -214,8 +214,8 @@ bool pci_wait_crs(struct phb *phb, uint16_t bdfn, uint32_t *out_vdid) return true; } -static struct pci_device *pci_scan_one(struct phb *phb, struct pci_device *parent, - uint16_t bdfn) +struct pci_device *pci_scan_one(struct phb *phb, struct pci_device *parent, + uint16_t bdfn) { struct pci_device *pd = NULL; uint32_t vdid; diff --git a/include/pci.h b/include/pci.h index 20edb50c..64329664 100644 --- a/include/pci.h +++ b/include/pci.h @@ -444,6 +444,8 @@ extern void pci_remove_bus(struct phb *phb, struct list_head *list); extern uint8_t pci_scan_bus(struct phb *phb, uint8_t bus, uint8_t max_bus, struct list_head *list, struct pci_device *parent, bool scan_downstream); +extern struct pci_device *pci_scan_one(struct phb *phb, struct pci_device *parent, + uint16_t bdfn); extern void pci_add_device_nodes(struct phb *phb, struct list_head *list, struct dt_node *parent_node, From patchwork Thu Oct 24 18:02:57 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Miroshnichenko X-Patchwork-Id: 1183490 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46zc6Y5y2qz9sPp for ; Fri, 25 Oct 2019 06:01:41 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=yadro.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=yadro.com header.i=@yadro.com header.b="P3m7VUyD"; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 46zc6Y3NCFzDqVS for ; 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Thu, 24 Oct 2019 21:03:06 +0300 From: Sergey Miroshnichenko To: Date: Thu, 24 Oct 2019 21:02:57 +0300 Message-ID: <20191024180259.882169-4-s.miroshnichenko@yadro.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191024180259.882169-1-s.miroshnichenko@yadro.com> References: <20191024180259.882169-1-s.miroshnichenko@yadro.com> MIME-Version: 1.0 X-Originating-IP: [172.17.15.136] X-ClientProxiedBy: T-EXCH-01.corp.yadro.com (172.17.10.101) To T-EXCH-02.corp.yadro.com (172.17.10.102) Subject: [Skiboot] [PATCH RESEND v3 3/5] core/pci: Create the struct pci_device nodes automatically X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux@yadro.com Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Currently the struct pci_device nodes are created only during the bus rescan in skiboot (pci_scan_bus) initiated by an OS via OPAL. But these structures also could be created if reading the configuration space via OPAL reveals a new hotplugged device. This will allow using the standard platform-independent PCIe hotplug driver in Linux kernel ("pciehp") instead of requesting a Device Tree update. Signed-off-by: Sergey Miroshnichenko --- core/pci-opal.c | 23 +++++++++++++++++++---- 1 file changed, 19 insertions(+), 4 deletions(-) diff --git a/core/pci-opal.c b/core/pci-opal.c index 828ce8a9..a3f1b71d 100644 --- a/core/pci-opal.c +++ b/core/pci-opal.c @@ -14,13 +14,21 @@ #include #include +static struct pci_device *pci_create_dn(struct phb *phb, uint16_t bdfn) +{ + struct pci_device *parent = pci_find_parent_dev(phb, bdfn); + + return pci_scan_one(phb, parent, bdfn); +} + #define OPAL_PCICFG_ACCESS_READ(op, cb, type) \ static int64_t opal_pci_config_##op(uint64_t phb_id, \ uint64_t bus_dev_func, \ - uint64_t offset, type data) \ + uint64_t offset, type *data) \ { \ struct phb *phb = pci_get_phb(phb_id); \ int64_t rc; \ + bool dev_found; \ \ if (!opal_addr_valid((void *)data)) \ return OPAL_PARAMETER; \ @@ -28,7 +36,14 @@ static int64_t opal_pci_config_##op(uint64_t phb_id, \ if (!phb) \ return OPAL_PARAMETER; \ phb_lock(phb); \ + \ + dev_found = pci_find_dev_safe(phb, bus_dev_func); \ + \ rc = phb->ops->cfg_##cb(phb, bus_dev_func, offset, data); \ + \ + if (!rc && !dev_found && *data != (type)0xffffffff) \ + pci_create_dn(phb, bus_dev_func); \ + \ phb_unlock(phb); \ \ return rc; \ @@ -51,9 +66,9 @@ static int64_t opal_pci_config_##op(uint64_t phb_id, \ return rc; \ } -OPAL_PCICFG_ACCESS_READ(read_byte, read8, uint8_t *) -OPAL_PCICFG_ACCESS_READ(read_half_word, read16, uint16_t *) -OPAL_PCICFG_ACCESS_READ(read_word, read32, uint32_t *) +OPAL_PCICFG_ACCESS_READ(read_byte, read8, uint8_t) +OPAL_PCICFG_ACCESS_READ(read_half_word, read16, uint16_t) +OPAL_PCICFG_ACCESS_READ(read_word, read32, uint32_t) OPAL_PCICFG_ACCESS_WRITE(write_byte, write8, uint8_t) OPAL_PCICFG_ACCESS_WRITE(write_half_word, write16, uint16_t) OPAL_PCICFG_ACCESS_WRITE(write_word, write32, uint32_t) From patchwork Thu Oct 24 18:02:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Miroshnichenko X-Patchwork-Id: 1183491 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46zc700KcZz9sCJ for ; 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Thu, 24 Oct 2019 21:03:08 +0300 (MSK) Received: from T-EXCH-02.corp.yadro.com (t-exch-02.corp.yadro.com [172.17.10.102]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by mta-01.yadro.com (Postfix) with ESMTPS id 67CB643611; Thu, 24 Oct 2019 21:03:07 +0300 (MSK) Received: from NB-148.yadro.com (172.17.15.136) by T-EXCH-02.corp.yadro.com (172.17.10.102) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.669.32; Thu, 24 Oct 2019 21:03:07 +0300 From: Sergey Miroshnichenko To: Date: Thu, 24 Oct 2019 21:02:58 +0300 Message-ID: <20191024180259.882169-5-s.miroshnichenko@yadro.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191024180259.882169-1-s.miroshnichenko@yadro.com> References: <20191024180259.882169-1-s.miroshnichenko@yadro.com> MIME-Version: 1.0 X-Originating-IP: [172.17.15.136] X-ClientProxiedBy: T-EXCH-01.corp.yadro.com (172.17.10.101) To T-EXCH-02.corp.yadro.com (172.17.10.102) Subject: [Skiboot] [PATCH RESEND v3 4/5] core/pci: Hook up the writes to PRIMARY/SECONDARY/SUBORDINATE_BUS registers X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux@yadro.com Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" When Linux kernel boots with the "pci=realloc" command line argument, it re-enumerates the PCIe topology first by dropping all the bridge's downstream port's bus numbers to zero, and then assigns the newly calculated bus numbers: pci_scan_bridge_extend() if (pcibios_assign_all_busses()) pci_write_config_dword(dev, PCI_PRIMARY_BUS, buses & ~0xffffff); ... buses = ... ... pci_write_config_dword(dev, PCI_PRIMARY_BUS, buses); But this leaves the corresponding struct pci_device entries in the skiboot de-synchronized with actual values in bridge's registers. This patch intercepts the write requests to the PCI_CFG_PRIMARY_BUS, PCI_CFG_SECONDARY_BUS and PCI_CFG_SUBORDINATE_BUS registers, updating the bdfn, primary_bus, secondary_bus and subordinate_bus fields. Signed-off-by: Sergey Miroshnichenko --- core/pci-opal.c | 78 ++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 77 insertions(+), 1 deletion(-) diff --git a/core/pci-opal.c b/core/pci-opal.c index a3f1b71d..09a3141e 100644 --- a/core/pci-opal.c +++ b/core/pci-opal.c @@ -49,6 +49,80 @@ static int64_t opal_pci_config_##op(uint64_t phb_id, \ return rc; \ } +static void pci_update_children_bdfns(struct pci_device *pd) +{ + struct pci_device *child; + + list_for_each(&pd->children, child, link) { + uint16_t new_bdfn = (child->bdfn & 0xff) | (pd->secondary_bus << 8); + + if (child->bdfn != new_bdfn || child->primary_bus != pd->secondary_bus) { + if (!list_empty(&child->pcrf) && child->primary_bus) + bitmap_clr_bit(*child->phb->filter_map, child->bdfn); + + child->bdfn = new_bdfn; + child->primary_bus = pd->secondary_bus; + + if (!list_empty(&child->pcrf) && child->primary_bus) + bitmap_set_bit(*child->phb->filter_map, child->bdfn); + + if (child->primary_bus && child->slot) + child->slot->id = PCI_SLOT_ID(child->phb, child->bdfn); + } + } +} + +static void opal_pci_config_write_hook(struct phb *phb, uint16_t bdfn, uint64_t offset, + uint32_t data, uint32_t size) +{ + struct pci_device *pd; + uint8_t old_sec; + + if (data == 0xffffffff) + return; + + pd = pci_find_dev_safe(phb, bdfn); + if (!pd) { + pd = pci_create_dn(phb, bdfn); + return; + } + + switch (offset) { + case PCI_CFG_PRIMARY_BUS: + case PCI_CFG_SECONDARY_BUS: + case PCI_CFG_SUBORDINATE_BUS: + break; + + default: + return; + } + + old_sec = pd->secondary_bus; + + switch (offset) { + case PCI_CFG_PRIMARY_BUS: + pd->primary_bus = data & 0xff; + + if (size == 4) { + pd->secondary_bus = (data >> 8) & 0xff; + pd->subordinate_bus = (data >> 16) & 0xff; + } + break; + + case PCI_CFG_SECONDARY_BUS: + pd->secondary_bus = data & 0xff; + break; + + case PCI_CFG_SUBORDINATE_BUS: + pd->subordinate_bus = data & 0xff; + break; + } + + if (pd->is_bridge && old_sec != pd->secondary_bus) { + pci_update_children_bdfns(pd); + } +} + #define OPAL_PCICFG_ACCESS_WRITE(op, cb, type) \ static int64_t opal_pci_config_##op(uint64_t phb_id, \ uint64_t bus_dev_func, \ @@ -59,8 +133,10 @@ static int64_t opal_pci_config_##op(uint64_t phb_id, \ \ if (!phb) \ return OPAL_PARAMETER; \ - phb_lock(phb); \ + phb_lock(phb); \ rc = phb->ops->cfg_##cb(phb, bus_dev_func, offset, data); \ + opal_pci_config_write_hook(phb, bus_dev_func, offset, data, \ + sizeof(type)); \ phb_unlock(phb); \ \ return rc; \ From patchwork Thu Oct 24 18:02:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Miroshnichenko X-Patchwork-Id: 1183507 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46zc801Htkz9sQw for ; Fri, 25 Oct 2019 06:02:56 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=yadro.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; 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Thu, 24 Oct 2019 21:03:07 +0300 (MSK) Received: from NB-148.yadro.com (172.17.15.136) by T-EXCH-02.corp.yadro.com (172.17.10.102) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.669.32; Thu, 24 Oct 2019 21:03:07 +0300 From: Sergey Miroshnichenko To: Date: Thu, 24 Oct 2019 21:02:59 +0300 Message-ID: <20191024180259.882169-6-s.miroshnichenko@yadro.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191024180259.882169-1-s.miroshnichenko@yadro.com> References: <20191024180259.882169-1-s.miroshnichenko@yadro.com> MIME-Version: 1.0 X-Originating-IP: [172.17.15.136] X-ClientProxiedBy: T-EXCH-01.corp.yadro.com (172.17.10.101) To T-EXCH-02.corp.yadro.com (172.17.10.102) Subject: [Skiboot] [PATCH RESEND v3 5/5] core/pci: Indicate support for PCI re-enumeration X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux@yadro.com Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" New PHB's property "ibm,supported-movable-bdfs" shows that skiboot now supports changing PCI bus numbers. Signed-off-by: Sergey Miroshnichenko --- core/pci.c | 1 + 1 file changed, 1 insertion(+) diff --git a/core/pci.c b/core/pci.c index 476a3825..9118c7e1 100644 --- a/core/pci.c +++ b/core/pci.c @@ -1068,6 +1068,7 @@ int64_t pci_register_phb(struct phb *phb, int opal_id) if (opal_id > last_phb_id) last_phb_id = opal_id; dt_add_property_cells(phb->dt_node, "ibm,opal-phbid", 0, phb->opal_id); + dt_add_property(phb->dt_node, "ibm,supported-movable-bdfs", NULL, 0); PCIDBG(phb, 0, "PCI: Registered PHB\n"); init_lock(&phb->lock);