From patchwork Thu Oct 24 09:30:46 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keerthy X-Patchwork-Id: 1182759 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="gBmEwWSY"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 46zMSZ3PlLz9sPh for ; Thu, 24 Oct 2019 20:31:26 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id F2DA2C21DD4; Thu, 24 Oct 2019 09:31:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 59370C21DAF; Thu, 24 Oct 2019 09:31:06 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 0AD54C21C3F; Thu, 24 Oct 2019 09:31:02 +0000 (UTC) Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lists.denx.de (Postfix) with ESMTPS id 514B4C21C3F for ; Thu, 24 Oct 2019 09:31:02 +0000 (UTC) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9O9UxZE109413; Thu, 24 Oct 2019 04:30:59 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1571909459; bh=XNqNWleJoMzOrPtTGvg8j5oK4n4E6JJEfvxEVvYGHA4=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=gBmEwWSYbirgzMW7I2RWdy/A3uACRF0lMCgwb8z/wXUohgSGKHdFdIV/cQ8KWDtCF aBIxYie+bWTTgVJF9cCEDBRKQiE5ltcwcdKxUWAdKEN5MTcXGhQ9EGG2MBdbIzmcvN QwF7vnNz+ShRDzh1buPhuSuiJ024Y6TkBDrJlKJU= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9O9UxUI012089 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 24 Oct 2019 04:30:59 -0500 Received: from DLEE106.ent.ti.com (157.170.170.36) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Thu, 24 Oct 2019 04:30:48 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Thu, 24 Oct 2019 04:30:59 -0500 Received: from a0393675ula.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9O9UrhL104197; Thu, 24 Oct 2019 04:30:56 -0500 From: Keerthy To: , , Date: Thu, 24 Oct 2019 15:00:46 +0530 Message-ID: <20191024093103.13220-2-j-keerthy@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191024093103.13220-1-j-keerthy@ti.com> References: <20191024093103.13220-1-j-keerthy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: t-kristo@ti.com, u-boot@lists.denx.de Subject: [U-Boot] [PATCH v3 01/18] misc: k3_avs: add driver for K3 Adaptive Voltage Scaling Class 0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Tero Kristo Adaptive Voltage Scaling is a technology used in TI SoCs to optimize the operating voltage based on characterization data written to efuse during production. Add a driver to support this feature for K3 line of SoCs, initially for AM65x. Signed-off-by: Tero Kristo Signed-off-by: Keerthy --- Changes in v3: * No change Changes in v2: * Moved under drivers/misc. drivers/misc/Kconfig | 9 ++ drivers/misc/Makefile | 1 + drivers/misc/k3_avs.c | 366 ++++++++++++++++++++++++++++++++++++++++++ include/k3-avs.h | 28 ++++ 4 files changed, 404 insertions(+) create mode 100644 drivers/misc/k3_avs.c create mode 100644 include/k3-avs.h diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index ba50893b43..f6147238a4 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -412,4 +412,13 @@ config IHS_FPGA by the devices. This driver supports both CON and CPU variants of the devices, depending on the device tree entry. +config K3_AVS0 + depends on ARCH_K3 && SPL_DM_REGULATOR + bool "AVS class 0 support for K3 devices" + help + K3 devices have the optimized voltage values for the main voltage + domains stored in efuse within the VTM IP. This driver reads the + optimized voltage from the efuse, so that it can be programmed + to the PMIC on board. + endmenu diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 0001d105ba..74d01ef392 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -65,3 +65,4 @@ obj-$(CONFIG_TWL4030_LED) += twl4030_led.o obj-$(CONFIG_VEXPRESS_CONFIG) += vexpress_config.o obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o obj-$(CONFIG_JZ4780_EFUSE) += jz4780_efuse.o +obj-$(CONFIG_K3_AVS0) += k3_avs.o diff --git a/drivers/misc/k3_avs.c b/drivers/misc/k3_avs.c new file mode 100644 index 0000000000..dd7fc3d585 --- /dev/null +++ b/drivers/misc/k3_avs.c @@ -0,0 +1,366 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Texas Instruments' K3 Clas 0 Adaptive Voltage Scaling driver + * + * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Tero Kristo + * + */ + +#include +#include +#include +#include +#include +#include +#include + +#define AM6_VTM_DEVINFO(i) (priv->base + 0x100 + 0x20 * (i)) +#define AM6_VTM_OPPVID_VD(i) (priv->base + 0x104 + 0x20 * (i)) + +#define AM6_VTM_AVS0_SUPPORTED BIT(12) + +#define AM6_VTM_OPP_SHIFT(opp) (8 * (opp)) +#define AM6_VTM_OPP_MASK 0xff + +#define VD_FLAG_INIT_DONE BIT(0) + +struct k3_avs_privdata { + void *base; + struct vd_config *vd_config; +}; + +struct opp { + u32 freq; + u32 volt; +}; + +struct vd_data { + int id; + u8 opp; + u8 flags; + int dev_id; + int clk_id; + struct opp opps[NUM_OPPS]; + struct udevice *supply; +}; + +struct vd_config { + struct vd_data *vds; + u32 (*efuse_xlate)(struct k3_avs_privdata *priv, int idx, int opp); +}; + +static struct k3_avs_privdata *k3_avs_priv; + +/** + * am6_efuse_voltage: read efuse voltage from VTM + * @priv: driver private data + * @idx: VD to read efuse for + * @opp: opp id to read + * + * Reads efuse value for the specified OPP, and converts the register + * value to a voltage. Returns the voltage in uV, or 0 if nominal voltage + * should be used. + * + * Efuse val to volt conversion logic: + * + * val > 171 volt increments in 20mV steps with base 171 => 1.66V + * val between 115 to 11 increments in 10mV steps with base 115 => 1.1V + * val between 15 to 115 increments in 5mV steps with base 15 => .6V + * val between 1 to 15 increments in 20mv steps with base 0 => .3V + * val 0 is invalid + */ +static u32 am6_efuse_xlate(struct k3_avs_privdata *priv, int idx, int opp) +{ + u32 val = readl(AM6_VTM_OPPVID_VD(idx)); + + val >>= AM6_VTM_OPP_SHIFT(opp); + val &= AM6_VTM_OPP_MASK; + + if (!val) + return 0; + + if (val > 171) + return 1660000 + 20000 * (val - 171); + + if (val > 115) + return 1100000 + 10000 * (val - 115); + + if (val > 15) + return 600000 + 5000 * (val - 15); + + return 300000 + 20000 * val; +} + +static int k3_avs_program_voltage(struct k3_avs_privdata *priv, + struct vd_data *vd, + int opp_id) +{ + u32 volt = vd->opps[opp_id].volt; + struct vd_data *vd2; + + if (!vd->supply) + return -ENODEV; + + vd->opp = opp_id; + vd->flags |= VD_FLAG_INIT_DONE; + + /* Take care of ganged rails and pick the Max amongst them*/ + for (vd2 = priv->vd_config->vds; vd2->id >= 0; vd2++) { + if (vd == vd2) + continue; + + if (vd2->supply != vd->supply) + continue; + + if (vd2->opps[vd2->opp].volt > volt) + volt = vd2->opps[vd2->opp].volt; + + vd2->flags |= VD_FLAG_INIT_DONE; + } + + return regulator_set_value(vd->supply, volt); +} + +static struct vd_data *get_vd(struct k3_avs_privdata *priv, int idx) +{ + struct vd_data *vd; + + for (vd = priv->vd_config->vds; vd->id >= 0 && vd->id != idx; vd++) + ; + + if (vd->id < 0) + return NULL; + + return vd; +} + +/** + * k3_avs_set_opp: Sets the voltage for an arbitrary VD rail + * @dev: AVS device + * @vdd_id: voltage domain ID + * @opp_id: OPP ID + * + * Programs the desired OPP value for the defined voltage rail. This + * should be called from board files if reconfiguration is desired. + * Returns 0 on success, negative error value on failure. + */ +int k3_avs_set_opp(struct udevice *dev, int vdd_id, int opp_id) +{ + struct k3_avs_privdata *priv = dev_get_priv(dev); + struct vd_data *vd; + + vd = get_vd(priv, vdd_id); + if (!vd) + return -EINVAL; + + return k3_avs_program_voltage(priv, vd, opp_id); +} + +static int match_opp(struct vd_data *vd, u32 freq) +{ + struct opp *opp; + int opp_id; + + for (opp_id = 0; opp_id < NUM_OPPS; opp_id++) { + opp = &vd->opps[opp_id]; + if (opp->freq == freq) + return opp_id; + } + + printf("No matching OPP found for freq %d.\n", freq); + + return -EINVAL; +} + +/** + * k3_avs_notify_freq: Notify clock rate change towards AVS subsystem + * @dev_id: Device ID for the clock to be changed + * @clk_id: Clock ID for the clock to be changed + * @freq: New frequency for clock + * + * Checks if the provided clock is the MPU clock or not, if not, return + * immediately. If MPU clock is provided, maps the provided MPU frequency + * towards an MPU OPP, and programs the voltage to the regulator. Return 0 + * on success, negative error value on failure. + */ +int k3_avs_notify_freq(int dev_id, int clk_id, u32 freq) +{ + int opp_id; + struct k3_avs_privdata *priv = k3_avs_priv; + struct vd_data *vd; + + for (vd = priv->vd_config->vds; vd->id >= 0; vd++) { + if (vd->dev_id != dev_id || vd->clk_id != clk_id) + continue; + + opp_id = match_opp(vd, freq); + if (opp_id < 0) + return opp_id; + + vd->opp = opp_id; + return k3_avs_program_voltage(priv, vd, opp_id); + } + + return -EINVAL; +} + +static int k3_avs_configure(struct udevice *dev, struct k3_avs_privdata *priv) +{ + struct vd_config *conf; + int ret; + char pname[20]; + struct vd_data *vd; + + conf = (void *)dev_get_driver_data(dev); + + priv->vd_config = conf; + + for (vd = conf->vds; vd->id >= 0; vd++) { + sprintf(pname, "vdd-supply-%d", vd->id); + ret = device_get_supply_regulator(dev, pname, &vd->supply); + if (ret) + dev_warn(dev, "supply not found for VD%d.\n", vd->id); + + sprintf(pname, "ti,default-opp-%d", vd->id); + ret = dev_read_u32_default(dev, pname, -1); + if (ret != -1) + vd->opp = ret; + } + + return 0; +} + +/** + * k3_avs_probe: parses VD info from VTM, and re-configures the OPP data + * + * Parses all VDs on a device calculating the AVS class-0 voltages for them, + * and updates the vd_data based on this. The vd_data itself shall be used + * to program the required OPPs later on. Returns 0 on success, negative + * error value on failure. + */ +static int k3_avs_probe(struct udevice *dev) +{ + int opp_id; + u32 volt; + struct opp *opp; + struct k3_avs_privdata *priv; + struct vd_data *vd; + int ret; + + priv = dev_get_priv(dev); + + k3_avs_priv = priv; + + ret = k3_avs_configure(dev, priv); + if (ret) + return ret; + + priv->base = dev_read_addr_ptr(dev); + if (!priv->base) + return -ENODEV; + + for (vd = priv->vd_config->vds; vd->id >= 0; vd++) { + if (!(readl(AM6_VTM_DEVINFO(vd->id)) & + AM6_VTM_AVS0_SUPPORTED)) { + dev_warn(dev, "AVS-class 0 not supported for VD%d\n", + vd->id); + continue; + } + + for (opp_id = 0; opp_id < NUM_OPPS; opp_id++) { + opp = &vd->opps[opp_id]; + + if (!opp->freq) + continue; + + volt = priv->vd_config->efuse_xlate(priv, vd->id, + opp_id); + if (volt) + opp->volt = volt; + } + } + + for (vd = priv->vd_config->vds; vd->id >= 0; vd++) { + if (vd->flags & VD_FLAG_INIT_DONE) + continue; + + k3_avs_program_voltage(priv, vd, vd->opp); + } + + return 0; +} + +static struct vd_data am654_vd_data[] = { + { + .id = AM6_VDD_CORE, + .dev_id = 82, /* AM6_DEV_CBASS0 */ + .clk_id = 0, /* main sysclk0 */ + .opp = AM6_OPP_NOM, + .opps = { + [AM6_OPP_NOM] = { + .volt = 1000000, + .freq = 250000000, /* CBASS0 */ + }, + }, + }, + { + .id = AM6_VDD_MPU0, + .dev_id = 202, /* AM6_DEV_COMPUTE_CLUSTER_A53_0 */ + .clk_id = 0, /* ARM clock */ + .opp = AM6_OPP_NOM, + .opps = { + [AM6_OPP_NOM] = { + .volt = 1000000, + .freq = 800000000, + }, + [AM6_OPP_OD] = { + .volt = 1100000, + .freq = 1000000000, + }, + [AM6_OPP_TURBO] = { + .volt = 1220000, + .freq = 1100000000, + }, + }, + }, + { + .id = AM6_VDD_MPU1, + .opp = AM6_OPP_NOM, + .dev_id = 204, /* AM6_DEV_COMPUTE_CLUSTER_A53_2 */ + .clk_id = 0, /* ARM clock */ + .opps = { + [AM6_OPP_NOM] = { + .volt = 1000000, + .freq = 800000000, + }, + [AM6_OPP_OD] = { + .volt = 1100000, + .freq = 1000000000, + }, + [AM6_OPP_TURBO] = { + .volt = 1220000, + .freq = 1100000000, + }, + }, + }, + { .id = -1 }, +}; + +static struct vd_config am654_vd_config = { + .efuse_xlate = am6_efuse_xlate, + .vds = am654_vd_data, +}; + +static const struct udevice_id k3_avs_ids[] = { + { .compatible = "ti,am654-avs", .data = (ulong)&am654_vd_config }, + {} +}; + +U_BOOT_DRIVER(k3_avs) = { + .name = "k3_avs", + .of_match = k3_avs_ids, + .id = UCLASS_MISC, + .probe = k3_avs_probe, + .priv_auto_alloc_size = sizeof(struct k3_avs_privdata), +}; diff --git a/include/k3-avs.h b/include/k3-avs.h new file mode 100644 index 0000000000..9867481617 --- /dev/null +++ b/include/k3-avs.h @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Texas Instruments' K3 Adaptive Voltage Scaling driver + * + * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Tero Kristo + * + */ + +#ifndef _K3_AVS0_ +#define _K3_AVS0_ + +#define AM6_VDD_WKUP 0 +#define AM6_VDD_MCU 1 +#define AM6_VDD_CORE 2 +#define AM6_VDD_MPU0 3 +#define AM6_VDD_MPU1 4 + +#define NUM_OPPS 4 + +#define AM6_OPP_NOM 1 +#define AM6_OPP_OD 2 +#define AM6_OPP_TURBO 3 + +int k3_avs_set_opp(struct udevice *dev, int vdd_id, int opp_id); +int k3_avs_notify_freq(int dev_id, int clk_id, u32 freq); + +#endif From patchwork Thu Oct 24 09:30:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keerthy X-Patchwork-Id: 1182762 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="ozkmqjf8"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 46zMTW45kXz9sPh for ; Thu, 24 Oct 2019 20:32:15 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 2C32DC21C6A; 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Thu, 24 Oct 2019 04:30:59 -0500 From: Keerthy To: , , Date: Thu, 24 Oct 2019 15:00:47 +0530 Message-ID: <20191024093103.13220-3-j-keerthy@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191024093103.13220-1-j-keerthy@ti.com> References: <20191024093103.13220-1-j-keerthy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: t-kristo@ti.com, u-boot@lists.denx.de Subject: [U-Boot] [PATCH v3 02/18] clk: clk-ti-sci: Notify AVS driver upon setting clock rate X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Notify AVS driver upon setting clock rate so that voltage is changed accordingly. Signed-off-by: Keerthy --- Changes in v3: * No change Changes in v2: * No change drivers/clk/clk-ti-sci.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/clk/clk-ti-sci.c b/drivers/clk/clk-ti-sci.c index c25415d410..478349f22f 100644 --- a/drivers/clk/clk-ti-sci.c +++ b/drivers/clk/clk-ti-sci.c @@ -13,6 +13,7 @@ #include #include #include +#include /** * struct ti_sci_clk_data - clock controller information structure @@ -101,6 +102,10 @@ static ulong ti_sci_clk_set_rate(struct clk *clk, ulong rate) debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate); +#ifdef CONFIG_K3_AVS0 + k3_avs_notify_freq(clk->id, clk->data, rate); +#endif + /* Ask for exact frequency by using same value for min/target/max */ ret = cops->set_freq(sci, clk->id, clk->data, rate, rate, rate); if (ret) From patchwork Thu Oct 24 09:30:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keerthy X-Patchwork-Id: 1182763 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="mA2a56mD"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 46zMV03GWjz9sPh for ; Thu, 24 Oct 2019 20:32:40 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id E33FAC21E31; Thu, 24 Oct 2019 09:32:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 5D755C21DED; Thu, 24 Oct 2019 09:31:31 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 1F9BAC21DB6; Thu, 24 Oct 2019 09:31:11 +0000 (UTC) Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lists.denx.de (Postfix) with ESMTPS id A78AFC21DC1 for ; Thu, 24 Oct 2019 09:31:07 +0000 (UTC) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9O9V5ci099952; Thu, 24 Oct 2019 04:31:05 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1571909465; bh=c40H3d95mFTWeGpmgvJMysNmaR3wi8ESk7ofqkm2UyY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=mA2a56mD6RHuRG0jXaQNzjZoAcFm8iT6XvXEphToVKBEtlNe5epoOG0Rg/X+8cFmE ptk0p6kUAxFqTcK1KVU52WhiNgv4zakyFSpGd2fuotS+O3gmNX3PVvHPTwMKT3zpmv /KPBpf9d8jMupa+yzvJ6F3AsD6nJYlUMv+d0ujJU= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9O9V5Ne012391 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 24 Oct 2019 04:31:05 -0500 Received: from DLEE101.ent.ti.com (157.170.170.31) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Thu, 24 Oct 2019 04:31:04 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Thu, 24 Oct 2019 04:30:54 -0500 Received: from a0393675ula.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9O9UrhN104197; Thu, 24 Oct 2019 04:31:02 -0500 From: Keerthy To: , , Date: Thu, 24 Oct 2019 15:00:48 +0530 Message-ID: <20191024093103.13220-4-j-keerthy@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191024093103.13220-1-j-keerthy@ti.com> References: <20191024093103.13220-1-j-keerthy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: t-kristo@ti.com, u-boot@lists.denx.de Subject: [U-Boot] [PATCH v3 03/18] power: regulator: tps6236x: add support for tps6236x regulators X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Tero Kristo TPS6236x is a family of step down DC-DC converters optimized for battery powered portable applications for a small solution size. Add a regulator driver for supporting these devices. Signed-off-by: Tero Kristo Signed-off-by: Keerthy --- Changes in v3: * No change Changes in v2: * No change drivers/power/regulator/Kconfig | 10 ++ drivers/power/regulator/Makefile | 1 + drivers/power/regulator/tps62360_regulator.c | 123 +++++++++++++++++++ 3 files changed, 134 insertions(+) create mode 100644 drivers/power/regulator/tps62360_regulator.c diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig index 9aa00fad42..56d68ee40e 100644 --- a/drivers/power/regulator/Kconfig +++ b/drivers/power/regulator/Kconfig @@ -273,6 +273,16 @@ config DM_REGULATOR_TPS65910 regulator types of the TPS65910 (BUCK, BOOST and LDO). It implements the get/set api for value and enable. +config DM_REGULATOR_TPS62360 + bool "Enable driver for TPS6236x Power Regulator" + depends on DM_REGULATOR + help + The TPS6236X DC/DC step down converter provides a single output + power line peaking at 3A current. This driver supports all four + variants of the chip (TPS62360, TPS62361, TPS62362, TPS62363). It + implements the get/set api for value only, as the power line is + always on. + config DM_REGULATOR_STPMIC1 bool "Enable driver for STPMIC1 regulators" depends on DM_REGULATOR && PMIC_STPMIC1 diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile index 6a3d4bbee4..9198841b4f 100644 --- a/drivers/power/regulator/Makefile +++ b/drivers/power/regulator/Makefile @@ -26,4 +26,5 @@ obj-$(CONFIG_$(SPL_)DM_REGULATOR_LP873X) += lp873x_regulator.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_LP87565) += lp87565_regulator.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_STM32_VREFBUF) += stm32-vrefbuf.o obj-$(CONFIG_DM_REGULATOR_TPS65910) += tps65910_regulator.o +obj-$(CONFIG_DM_REGULATOR_TPS62360) += tps62360_regulator.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_STPMIC1) += stpmic1.o diff --git a/drivers/power/regulator/tps62360_regulator.c b/drivers/power/regulator/tps62360_regulator.c new file mode 100644 index 0000000000..3b123f503c --- /dev/null +++ b/drivers/power/regulator/tps62360_regulator.c @@ -0,0 +1,123 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Tero Kristo + */ + +#include +#include +#include +#include + +#define TPS62360_REG_SET0 0 + +#define TPS62360_I2C_CHIP 0x60 + +#define TPS62360_VSEL_STEPSIZE 10000 /* In uV */ + +struct tps62360_regulator_config { + u32 vmin; + u32 vmax; +}; + +struct tps62360_regulator_pdata { + u8 vsel_offset; + struct udevice *i2c; + struct tps62360_regulator_config *config; +}; + +/* + * TPS62362/TPS62363 are just re-using these values for now, their preset + * voltage values are just different compared to TPS62360/TPS62361. + */ +static struct tps62360_regulator_config tps62360_data = { + .vmin = 770000, + .vmax = 1400000, +}; + +static struct tps62360_regulator_config tps62361_data = { + .vmin = 500000, + .vmax = 1770000, +}; + +static int tps62360_regulator_set_value(struct udevice *dev, int uV) +{ + struct tps62360_regulator_pdata *pdata = dev_get_platdata(dev); + u8 regval; + + if (uV < pdata->config->vmin || uV > pdata->config->vmax) + return -EINVAL; + + uV -= pdata->config->vmin; + + uV = DIV_ROUND_UP(uV, TPS62360_VSEL_STEPSIZE); + + if (uV > U8_MAX) + return -EINVAL; + + regval = (u8)uV; + + return dm_i2c_write(pdata->i2c, TPS62360_REG_SET0 + pdata->vsel_offset, + ®val, 1); +} + +static int tps62360_regulator_get_value(struct udevice *dev) +{ + u8 regval; + int ret; + struct tps62360_regulator_pdata *pdata = dev_get_platdata(dev); + + ret = dm_i2c_read(pdata->i2c, TPS62360_REG_SET0 + pdata->vsel_offset, + ®val, 1); + if (ret) { + dev_err(dev, "i2c read failed: %d\n", ret); + return ret; + } + + return (u32)regval * TPS62360_VSEL_STEPSIZE + pdata->config->vmin; +} + +static int tps62360_regulator_ofdata_to_platdata(struct udevice *dev) +{ + struct tps62360_regulator_pdata *pdata = dev_get_platdata(dev); + u8 vsel0; + u8 vsel1; + int ret; + + pdata->config = (void *)dev_get_driver_data(dev); + + vsel0 = dev_read_bool(dev, "ti,vsel0-state-high"); + vsel1 = dev_read_bool(dev, "ti,vsel1-state-high"); + + pdata->vsel_offset = vsel0 + vsel1 * 2; + + ret = i2c_get_chip(dev->parent, TPS62360_I2C_CHIP, 1, &pdata->i2c); + if (ret) { + dev_err(dev, "i2c dev get failed.\n"); + return ret; + } + + return 0; +} + +static const struct dm_regulator_ops tps62360_regulator_ops = { + .get_value = tps62360_regulator_get_value, + .set_value = tps62360_regulator_set_value, +}; + +static const struct udevice_id tps62360_regulator_ids[] = { + { .compatible = "ti,tps62360", .data = (ulong)&tps62360_data }, + { .compatible = "ti,tps62361", .data = (ulong)&tps62361_data }, + { .compatible = "ti,tps62362", .data = (ulong)&tps62360_data }, + { .compatible = "ti,tps62363", .data = (ulong)&tps62361_data }, + { }, +}; + +U_BOOT_DRIVER(tps62360_regulator) = { + .name = "tps62360_regulator", + .id = UCLASS_REGULATOR, + .ops = &tps62360_regulator_ops, + .of_match = tps62360_regulator_ids, + .platdata_auto_alloc_size = sizeof(struct tps62360_regulator_pdata), + .ofdata_to_platdata = tps62360_regulator_ofdata_to_platdata, +}; From patchwork Thu Oct 24 09:30:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keerthy X-Patchwork-Id: 1182771 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="dsFCr++w"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 46zMYZ1BgDz9sQv for ; Thu, 24 Oct 2019 20:35:46 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id BB087C21DB5; Thu, 24 Oct 2019 09:35:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 933C6C21E34; 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Thu, 24 Oct 2019 04:31:07 -0500 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Thu, 24 Oct 2019 04:30:57 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Thu, 24 Oct 2019 04:31:07 -0500 Received: from a0393675ula.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9O9UrhO104197; Thu, 24 Oct 2019 04:31:05 -0500 From: Keerthy To: , , Date: Thu, 24 Oct 2019 15:00:49 +0530 Message-ID: <20191024093103.13220-5-j-keerthy@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191024093103.13220-1-j-keerthy@ti.com> References: <20191024093103.13220-1-j-keerthy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: t-kristo@ti.com, u-boot@lists.denx.de Subject: [U-Boot] [PATCH v3 04/18] misc: k3_avs: Add j721e support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" j721e SoCs have different OPP tables. Add support for the same. Note: DM Still has lot of voltages TBD hence the correct values need to be programmed once they are published. Signed-off-by: Keerthy --- Changes in v3: * No change Changes in v2: * No change drivers/misc/k3_avs.c | 22 ++++++++++++++++++++++ include/k3-avs.h | 2 ++ 2 files changed, 24 insertions(+) diff --git a/drivers/misc/k3_avs.c b/drivers/misc/k3_avs.c index dd7fc3d585..c19c3c0646 100644 --- a/drivers/misc/k3_avs.c +++ b/drivers/misc/k3_avs.c @@ -347,6 +347,27 @@ static struct vd_data am654_vd_data[] = { { .id = -1 }, }; +static struct vd_data j721e_vd_data[] = { + { + .id = J721E_VDD_MPU, + .opp = AM6_OPP_NOM, + .dev_id = 202, /* J721E_DEV_A72SS0_CORE0 */ + .clk_id = 2, /* ARM clock */ + .opps = { + [AM6_OPP_NOM] = { + .volt = 880000, /* TBD in DM */ + .freq = 2000000000, + }, + }, + }, + { .id = -1 }, +}; + +static struct vd_config j721e_vd_config = { + .efuse_xlate = am6_efuse_xlate, + .vds = j721e_vd_data, +}; + static struct vd_config am654_vd_config = { .efuse_xlate = am6_efuse_xlate, .vds = am654_vd_data, @@ -354,6 +375,7 @@ static struct vd_config am654_vd_config = { static const struct udevice_id k3_avs_ids[] = { { .compatible = "ti,am654-avs", .data = (ulong)&am654_vd_config }, + { .compatible = "ti,j721e-avs", .data = (ulong)&j721e_vd_config }, {} }; diff --git a/include/k3-avs.h b/include/k3-avs.h index 9867481617..e3c3cafbb9 100644 --- a/include/k3-avs.h +++ b/include/k3-avs.h @@ -16,6 +16,8 @@ #define AM6_VDD_MPU0 3 #define AM6_VDD_MPU1 4 +#define J721E_VDD_MPU 2 + #define NUM_OPPS 4 #define AM6_OPP_NOM 1 From patchwork Thu Oct 24 09:30:50 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keerthy X-Patchwork-Id: 1182765 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="S5WF/geQ"; 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Thu, 24 Oct 2019 04:30:59 -0500 Received: from a0393675ula.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9O9UrhP104197; Thu, 24 Oct 2019 04:31:07 -0500 From: Keerthy To: , , Date: Thu, 24 Oct 2019 15:00:50 +0530 Message-ID: <20191024093103.13220-6-j-keerthy@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191024093103.13220-1-j-keerthy@ti.com> References: <20191024093103.13220-1-j-keerthy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: t-kristo@ti.com, u-boot@lists.denx.de Subject: [U-Boot] [PATCH v3 05/18] power: pmic: tps65941: Add support for tps65941 family of PMICs X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add support to bind the regulators/child nodes with the pmic. Signed-off-by: Keerthy --- Changes in v3: * No change Changes in v2: * No change drivers/power/pmic/Kconfig | 7 +++ drivers/power/pmic/Makefile | 1 + drivers/power/pmic/tps65941.c | 83 +++++++++++++++++++++++++++++++++++ include/power/tps65941.h | 26 +++++++++++ 4 files changed, 117 insertions(+) create mode 100644 drivers/power/pmic/tps65941.c create mode 100644 include/power/tps65941.h diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig index 586772fdec..9d3667a867 100644 --- a/drivers/power/pmic/Kconfig +++ b/drivers/power/pmic/Kconfig @@ -267,3 +267,10 @@ config SPL_PMIC_LP87565 help The LP87565 is a PMIC containing a bunch of SMPS. This driver binds the pmic children in SPL. + +config PMIC_TPS65941 + bool "Enable driver for Texas Instruments TPS65941 PMIC" + depends on DM_PMIC + help + The TPS65941 is a PMIC containing a bunch of SMPS & LDOs. + This driver binds the pmic children. diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile index 888dbb2857..ec64327805 100644 --- a/drivers/power/pmic/Makefile +++ b/drivers/power/pmic/Makefile @@ -39,3 +39,4 @@ obj-$(CONFIG_POWER_TPS65218) += pmic_tps65218.o obj-$(CONFIG_POWER_TPS65910) += pmic_tps65910.o obj-$(CONFIG_POWER_HI6553) += pmic_hi6553.o obj-$(CONFIG_POWER_MC34VR500) += pmic_mc34vr500.o +obj-$(CONFIG_PMIC_TPS65941) += tps65941.o diff --git a/drivers/power/pmic/tps65941.c b/drivers/power/pmic/tps65941.c new file mode 100644 index 0000000000..e8f3c950bd --- /dev/null +++ b/drivers/power/pmic/tps65941.c @@ -0,0 +1,83 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2019 Texas Instruments Incorporated, + * Keerthy + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static const struct pmic_child_info pmic_children_info[] = { + { .prefix = "ldo", .driver = TPS65941_LDO_DRIVER }, + { .prefix = "buck", .driver = TPS65941_BUCK_DRIVER }, + { }, +}; + +static int tps65941_write(struct udevice *dev, uint reg, const uint8_t *buff, + int len) +{ + if (dm_i2c_write(dev, reg, buff, len)) { + pr_err("write error to device: %p register: %#x!\n", dev, reg); + return -EIO; + } + + return 0; +} + +static int tps65941_read(struct udevice *dev, uint reg, uint8_t *buff, int len) +{ + if (dm_i2c_read(dev, reg, buff, len)) { + pr_err("read error from device: %p register: %#x!\n", dev, reg); + return -EIO; + } + + return 0; +} + +static int tps65941_bind(struct udevice *dev) +{ + ofnode regulators_node; + int children; + + regulators_node = dev_read_subnode(dev, "regulators"); + if (!ofnode_valid(regulators_node)) { + debug("%s: %s regulators subnode not found!\n", __func__, + dev->name); + return -ENXIO; + } + + debug("%s: '%s' - found regulators subnode\n", __func__, dev->name); + + children = pmic_bind_children(dev, regulators_node, pmic_children_info); + if (!children) + printf("%s: %s - no child found\n", __func__, dev->name); + + /* Always return success for this device */ + return 0; +} + +static struct dm_pmic_ops tps65941_ops = { + .read = tps65941_read, + .write = tps65941_write, +}; + +static const struct udevice_id tps65941_ids[] = { + { .compatible = "ti,tps659411", .data = TPS659411 }, + { .compatible = "ti,tps659413", .data = TPS659413 }, + { } +}; + +U_BOOT_DRIVER(pmic_tps65941) = { + .name = "tps65941_pmic", + .id = UCLASS_PMIC, + .of_match = tps65941_ids, + .bind = tps65941_bind, + .ops = &tps65941_ops, +}; diff --git a/include/power/tps65941.h b/include/power/tps65941.h new file mode 100644 index 0000000000..2d48b31ae3 --- /dev/null +++ b/include/power/tps65941.h @@ -0,0 +1,26 @@ +#define TPS659411 0x0 +#define TPS659412 0x1 +#define TPS659413 0x2 +#define TPS659414 0x3 + +/* I2C device address for pmic tps65941 */ +#define TPS65941_I2C_ADDR (0x12 >> 1) +#define TPS65941_LDO_NUM 4 +#define TPS65941_BUCK_NUM 5 + +/* Drivers name */ +#define TPS65941_LDO_DRIVER "tps65941_ldo" +#define TPS65941_BUCK_DRIVER "tps65941_buck" + +#define TPS65941_BUCK_VOLT_MASK 0xFF +#define TPS65941_BUCK_VOLT_MAX_HEX 0xFF +#define TPS65941_BUCK_VOLT_MAX 3340000 +#define TPS65941_BUCK_MODE_MASK 0x1 + +#define TPS65941_LDO_VOLT_MASK 0x3E +#define TPS65941_LDO_VOLT_MAX_HEX 0x3A +#define TPS65941_LDO_VOLT_MIN_HEX 0x4 +#define TPS65941_LDO_VOLT_MAX 3300000 +#define TPS65941_LDO_MODE_MASK 0x1 +#define TPS65941_LDO_BYPASS_EN 0x80 +#define TP65941_BUCK_CONF_SLEW_MASK 0x7 From patchwork Thu Oct 24 09:30:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keerthy X-Patchwork-Id: 1182768 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="JYImUOe4"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 46zMWs3ytjz9sQv for ; Thu, 24 Oct 2019 20:34:17 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 41332C21E74; Thu, 24 Oct 2019 09:32:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 81458C21DB3; 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Thu, 24 Oct 2019 04:31:02 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Thu, 24 Oct 2019 04:31:02 -0500 Received: from a0393675ula.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9O9UrhQ104197; Thu, 24 Oct 2019 04:31:10 -0500 From: Keerthy To: , , Date: Thu, 24 Oct 2019 15:00:51 +0530 Message-ID: <20191024093103.13220-7-j-keerthy@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191024093103.13220-1-j-keerthy@ti.com> References: <20191024093103.13220-1-j-keerthy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: t-kristo@ti.com, u-boot@lists.denx.de Subject: [U-Boot] [PATCH v3 06/18] power: regulator: tps65941: add regulator support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The driver provides regulator set/get voltage enable/disable functions for tps65941 family of PMICs. Signed-off-by: Keerthy --- Changes in v3: * No change Changes in v2: * No change drivers/power/regulator/Kconfig | 10 + drivers/power/regulator/Makefile | 1 + drivers/power/regulator/tps65941_regulator.c | 407 +++++++++++++++++++ 3 files changed, 418 insertions(+) create mode 100644 drivers/power/regulator/tps65941_regulator.c diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig index 56d68ee40e..25fc787a29 100644 --- a/drivers/power/regulator/Kconfig +++ b/drivers/power/regulator/Kconfig @@ -323,3 +323,13 @@ config SPL_DM_REGULATOR_LP873X This enables implementation of driver-model regulator uclass features for REGULATOR LP873X and the family of LP873X PMICs. The driver implements get/set api for: value and enable in SPL. + +config DM_REGULATOR_TPS65941 + bool "Enable driver for TPS65941 PMIC regulators" + depends on PMIC_TPS65941 + help + This enables implementation of driver-model regulator uclass + features for REGULATOR TPS65941 and the family of TPS65941 PMICs. + TPS65941 series of PMICs have 5 single phase BUCKs that can also + be configured in multi phase modes & 4 LDOs. The driver implements + get/set api for value and enable. diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile index 9198841b4f..b611c901ba 100644 --- a/drivers/power/regulator/Makefile +++ b/drivers/power/regulator/Makefile @@ -28,3 +28,4 @@ obj-$(CONFIG_$(SPL_)DM_REGULATOR_STM32_VREFBUF) += stm32-vrefbuf.o obj-$(CONFIG_DM_REGULATOR_TPS65910) += tps65910_regulator.o obj-$(CONFIG_DM_REGULATOR_TPS62360) += tps62360_regulator.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_STPMIC1) += stpmic1.o +obj-$(CONFIG_DM_REGULATOR_TPS65941) += tps65941_regulator.o diff --git a/drivers/power/regulator/tps65941_regulator.c b/drivers/power/regulator/tps65941_regulator.c new file mode 100644 index 0000000000..a00ef58129 --- /dev/null +++ b/drivers/power/regulator/tps65941_regulator.c @@ -0,0 +1,407 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2019 + * Texas Instruments Incorporated, + * + * Keerthy + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +static const char tps65941_buck_ctrl[TPS65941_BUCK_NUM] = {0x4, 0x6, 0x8, 0xA, + 0xC}; +static const char tps65941_buck_vout[TPS65941_BUCK_NUM] = {0xE, 0x10, 0x12, + 0x14, 0x16}; +static const char tps65941_ldo_ctrl[TPS65941_BUCK_NUM] = {0x1D, 0x1E, 0x1F, + 0x20}; +static const char tps65941_ldo_vout[TPS65941_BUCK_NUM] = {0x23, 0x24, 0x25, + 0x26}; + +static int tps65941_buck_enable(struct udevice *dev, int op, bool *enable) +{ + int ret; + unsigned int adr; + struct dm_regulator_uclass_platdata *uc_pdata; + + uc_pdata = dev_get_uclass_platdata(dev); + adr = uc_pdata->ctrl_reg; + + ret = pmic_reg_read(dev->parent, adr); + if (ret < 0) + return ret; + + if (op == PMIC_OP_GET) { + ret &= TPS65941_BUCK_MODE_MASK; + + if (ret) + *enable = true; + else + *enable = false; + + return 0; + } else if (op == PMIC_OP_SET) { + if (*enable) + ret |= TPS65941_BUCK_MODE_MASK; + else + ret &= ~TPS65941_BUCK_MODE_MASK; + ret = pmic_reg_write(dev->parent, adr, ret); + if (ret) + return ret; + } + + return 0; +} + +static int tps65941_buck_volt2val(int uV) +{ + if (uV > TPS65941_BUCK_VOLT_MAX) + return -EINVAL; + else if (uV > 1650000) + return (uV - 1660000) / 20000 + 0xAB; + else if (uV > 1110000) + return (uV - 1110000) / 10000 + 0x73; + else if (uV > 600000) + return (uV - 600000) / 5000 + 0x0F; + else if (uV >= 300000) + return (uV - 300000) / 20000 + 0x00; + else + return -EINVAL; +} + +static int tps65941_buck_val2volt(int val) +{ + if (val > TPS65941_BUCK_VOLT_MAX_HEX) + return -EINVAL; + else if (val > 0xAB) + return 1660000 + (val - 0xAB) * 20000; + else if (val > 0x73) + return 1100000 + (val - 0x73) * 10000; + else if (val > 0xF) + return 600000 + (val - 0xF) * 5000; + else if (val >= 0x0) + return 300000 + val * 5000; + else + return -EINVAL; +} + +int tps65941_lookup_slew(int id) +{ + switch (id) { + case 0: + return 33000; + case 1: + return 20000; + case 2: + return 10000; + case 3: + return 5000; + case 4: + return 2500; + case 5: + return 1300; + case 6: + return 630; + case 7: + return 310; + default: + return -1; + } +} + +static int tps65941_buck_val(struct udevice *dev, int op, int *uV) +{ + unsigned int hex, adr; + int ret, delta, uwait, slew; + struct dm_regulator_uclass_platdata *uc_pdata; + + uc_pdata = dev_get_uclass_platdata(dev); + + if (op == PMIC_OP_GET) + *uV = 0; + + adr = uc_pdata->volt_reg; + + ret = pmic_reg_read(dev->parent, adr); + if (ret < 0) + return ret; + + ret &= TPS65941_BUCK_VOLT_MASK; + ret = tps65941_buck_val2volt(ret); + if (ret < 0) + return ret; + + if (op == PMIC_OP_GET) { + *uV = ret; + return 0; + } + + /* + * Compute the delta voltage, find the slew rate and wait + * for the appropriate amount of time after voltage switch + */ + if (*uV > ret) + delta = *uV - ret; + else + delta = ret - *uV; + + slew = pmic_reg_read(dev->parent, uc_pdata->ctrl_reg + 1); + if (slew < 0) + return ret; + + slew &= TP65941_BUCK_CONF_SLEW_MASK; + slew = tps65941_lookup_slew(slew); + if (slew <= 0) + return ret; + + uwait = delta / slew; + + hex = tps65941_buck_volt2val(*uV); + if (hex < 0) + return hex; + + ret &= 0x0; + ret = hex; + + ret = pmic_reg_write(dev->parent, adr, ret); + + udelay(uwait); + + return ret; +} + +static int tps65941_ldo_enable(struct udevice *dev, int op, bool *enable) +{ + int ret; + unsigned int adr; + struct dm_regulator_uclass_platdata *uc_pdata; + + uc_pdata = dev_get_uclass_platdata(dev); + adr = uc_pdata->ctrl_reg; + + ret = pmic_reg_read(dev->parent, adr); + if (ret < 0) + return ret; + + if (op == PMIC_OP_GET) { + ret &= TPS65941_LDO_MODE_MASK; + + if (ret) + *enable = true; + else + *enable = false; + + return 0; + } else if (op == PMIC_OP_SET) { + if (*enable) + ret |= TPS65941_LDO_MODE_MASK; + else + ret &= ~TPS65941_LDO_MODE_MASK; + ret = pmic_reg_write(dev->parent, adr, ret); + if (ret) + return ret; + } + + return 0; +} + +static int tps65941_ldo_val2volt(int val) +{ + if (val > TPS65941_LDO_VOLT_MAX_HEX || val < TPS65941_LDO_VOLT_MIN_HEX) + return -EINVAL; + else if (val >= TPS65941_LDO_VOLT_MIN_HEX) + return 600000 + (val - TPS65941_LDO_VOLT_MIN_HEX) * 50000; + else + return -EINVAL; +} + +static int tps65941_ldo_val(struct udevice *dev, int op, int *uV) +{ + unsigned int hex, adr; + int ret; + struct dm_regulator_uclass_platdata *uc_pdata; + + uc_pdata = dev_get_uclass_platdata(dev); + + if (op == PMIC_OP_GET) + *uV = 0; + + adr = uc_pdata->volt_reg; + + ret = pmic_reg_read(dev->parent, adr); + if (ret < 0) + return ret; + + ret &= TPS65941_LDO_VOLT_MASK; + ret = tps65941_ldo_val2volt(ret); + if (ret < 0) + return ret; + + if (op == PMIC_OP_GET) { + *uV = ret; + return 0; + } + + hex = tps65941_buck_volt2val(*uV); + if (hex < 0) + return hex; + + ret &= 0x0; + ret = hex; + + ret = pmic_reg_write(dev->parent, adr, ret); + + return ret; +} + +static int tps65941_ldo_probe(struct udevice *dev) +{ + struct dm_regulator_uclass_platdata *uc_pdata; + int idx; + + uc_pdata = dev_get_uclass_platdata(dev); + uc_pdata->type = REGULATOR_TYPE_LDO; + + idx = dev->driver_data; + if (idx == 1 || idx == 2 || idx == 3 || idx == 4) { + debug("Single phase regulator\n"); + } else { + printf("Wrong ID for regulator\n"); + return -EINVAL; + } + + uc_pdata->ctrl_reg = tps65941_ldo_ctrl[idx - 1]; + uc_pdata->volt_reg = tps65941_ldo_vout[idx - 1]; + + return 0; +} + +static int tps65941_buck_probe(struct udevice *dev) +{ + struct dm_regulator_uclass_platdata *uc_pdata; + int idx; + + uc_pdata = dev_get_uclass_platdata(dev); + uc_pdata->type = REGULATOR_TYPE_BUCK; + + idx = dev->driver_data; + if (idx == 1 || idx == 2 || idx == 3 || idx == 4 || idx == 5) { + debug("Single phase regulator\n"); + } else if (idx == 12) { + idx = 1; + } else if (idx == 34) { + idx = 3; + } else if (idx == 1234) { + idx = 1; + } else { + printf("Wrong ID for regulator\n"); + return -EINVAL; + } + + uc_pdata->ctrl_reg = tps65941_buck_ctrl[idx - 1]; + uc_pdata->volt_reg = tps65941_buck_vout[idx - 1]; + + return 0; +} + +static int ldo_get_value(struct udevice *dev) +{ + int uV; + int ret; + + ret = tps65941_ldo_val(dev, PMIC_OP_GET, &uV); + if (ret) + return ret; + + return uV; +} + +static int ldo_set_value(struct udevice *dev, int uV) +{ + return tps65941_ldo_val(dev, PMIC_OP_SET, &uV); +} + +static int ldo_get_enable(struct udevice *dev) +{ + bool enable = false; + int ret; + + ret = tps65941_ldo_enable(dev, PMIC_OP_GET, &enable); + if (ret) + return ret; + + return enable; +} + +static int ldo_set_enable(struct udevice *dev, bool enable) +{ + return tps65941_ldo_enable(dev, PMIC_OP_SET, &enable); +} + +static int buck_get_value(struct udevice *dev) +{ + int uV; + int ret; + + ret = tps65941_buck_val(dev, PMIC_OP_GET, &uV); + if (ret) + return ret; + + return uV; +} + +static int buck_set_value(struct udevice *dev, int uV) +{ + return tps65941_buck_val(dev, PMIC_OP_SET, &uV); +} + +static int buck_get_enable(struct udevice *dev) +{ + bool enable = false; + int ret; + + ret = tps65941_buck_enable(dev, PMIC_OP_GET, &enable); + if (ret) + return ret; + + return enable; +} + +static int buck_set_enable(struct udevice *dev, bool enable) +{ + return tps65941_buck_enable(dev, PMIC_OP_SET, &enable); +} + +static const struct dm_regulator_ops tps65941_ldo_ops = { + .get_value = ldo_get_value, + .set_value = ldo_set_value, + .get_enable = ldo_get_enable, + .set_enable = ldo_set_enable, +}; + +U_BOOT_DRIVER(tps65941_ldo) = { + .name = TPS65941_LDO_DRIVER, + .id = UCLASS_REGULATOR, + .ops = &tps65941_ldo_ops, + .probe = tps65941_ldo_probe, +}; + +static const struct dm_regulator_ops tps65941_buck_ops = { + .get_value = buck_get_value, + .set_value = buck_set_value, + .get_enable = buck_get_enable, + .set_enable = buck_set_enable, +}; + +U_BOOT_DRIVER(tps65941_buck) = { + .name = TPS65941_BUCK_DRIVER, + .id = UCLASS_REGULATOR, + .ops = &tps65941_buck_ops, + .probe = tps65941_buck_probe, +}; From patchwork Thu Oct 24 09:30:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keerthy X-Patchwork-Id: 1182775 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="Jq0l1peb"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 46zMZx3x7vz9sPh for ; Thu, 24 Oct 2019 20:36:57 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 12AC8C21DF9; Thu, 24 Oct 2019 09:35:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 28551C21E42; Thu, 24 Oct 2019 09:31:50 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 109BCC21DFB; Thu, 24 Oct 2019 09:31:23 +0000 (UTC) Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lists.denx.de (Postfix) with ESMTPS id 15CD3C21E18 for ; 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Thu, 24 Oct 2019 04:31:05 -0500 Received: from a0393675ula.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9O9UrhR104197; Thu, 24 Oct 2019 04:31:13 -0500 From: Keerthy To: , , Date: Thu, 24 Oct 2019 15:00:52 +0530 Message-ID: <20191024093103.13220-8-j-keerthy@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191024093103.13220-1-j-keerthy@ti.com> References: <20191024093103.13220-1-j-keerthy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: t-kristo@ti.com, u-boot@lists.denx.de Subject: [U-Boot] [PATCH v3 07/18] arm: mach-k3: am6_init: Initialize AVS class 0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Initialize AVS class 0 so that mpu voltage rail is programmed to the AVS class 0 compensated value. Signed-off-by: Keerthy --- Changes in v3: * No change Changes in v2: * uclass_get_device_by_driver used in place getting the first uclass Instance. arch/arm/mach-k3/am6_init.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/mach-k3/am6_init.c b/arch/arm/mach-k3/am6_init.c index 0b564f7bd1..99edcd9a24 100644 --- a/arch/arm/mach-k3/am6_init.c +++ b/arch/arm/mach-k3/am6_init.c @@ -116,6 +116,13 @@ void board_init_f(ulong dummy) /* Perform EEPROM-based board detection */ do_board_detect(); +#if defined(CONFIG_CPU_V7R) && defined(CONFIG_K3_AVS0) + ret = uclass_get_device_by_driver(UCLASS_MISC, DM_GET_DRIVER(k3_avs), + &dev); + if (ret) + printf("AVS init failed: %d\n", ret); +#endif + #ifdef CONFIG_K3_AM654_DDRSS ret = uclass_get_device(UCLASS_RAM, 0, &dev); if (ret) From patchwork Thu Oct 24 09:30:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keerthy X-Patchwork-Id: 1182797 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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Thu, 24 Oct 2019 04:31:18 -0500 Received: from DLEE109.ent.ti.com (157.170.170.41) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Thu, 24 Oct 2019 04:31:07 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Thu, 24 Oct 2019 04:31:07 -0500 Received: from a0393675ula.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9O9UrhS104197; Thu, 24 Oct 2019 04:31:15 -0500 From: Keerthy To: , , Date: Thu, 24 Oct 2019 15:00:53 +0530 Message-ID: <20191024093103.13220-9-j-keerthy@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191024093103.13220-1-j-keerthy@ti.com> References: <20191024093103.13220-1-j-keerthy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: t-kristo@ti.com, u-boot@lists.denx.de Subject: [U-Boot] [PATCH v3 08/18] arm: mach-k3: j721e_init: Initialize avs class 0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Initialize avs class 0 Signed-off-by: Keerthy --- Changes in v3: * No change Changes in v2: * No change arch/arm/mach-k3/j721e_init.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c index 5e3813252b..d0bf86abeb 100644 --- a/arch/arm/mach-k3/j721e_init.c +++ b/arch/arm/mach-k3/j721e_init.c @@ -118,6 +118,13 @@ void board_init_f(ulong dummy) preloader_console_init(); #endif +#if defined(CONFIG_CPU_V7R) && defined(CONFIG_K3_AVS0) + ret = uclass_get_device_by_driver(UCLASS_MISC, DM_GET_DRIVER(k3_avs), + &dev); + if (ret) + printf("AVS init failed: %d\n", ret); +#endif + #if defined(CONFIG_K3_J721E_DDRSS) ret = uclass_get_device(UCLASS_RAM, 0, &dev); if (ret) From patchwork Thu Oct 24 09:30:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keerthy X-Patchwork-Id: 1182787 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="KzzZGOYd"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 46zMdg6Psmz9sR6 for ; Thu, 24 Oct 2019 20:39:19 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 56665C21E18; Thu, 24 Oct 2019 09:36:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 2CB3BC21E70; Thu, 24 Oct 2019 09:31:55 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 1309EC21E4E; Thu, 24 Oct 2019 09:31:28 +0000 (UTC) Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lists.denx.de (Postfix) with ESMTPS id E9C84C21DD7 for ; Thu, 24 Oct 2019 09:31:22 +0000 (UTC) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9O9VLC8100042; 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Thu, 24 Oct 2019 04:31:10 -0500 Received: from a0393675ula.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9O9UrhT104197; Thu, 24 Oct 2019 04:31:18 -0500 From: Keerthy To: , , Date: Thu, 24 Oct 2019 15:00:54 +0530 Message-ID: <20191024093103.13220-10-j-keerthy@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191024093103.13220-1-j-keerthy@ti.com> References: <20191024093103.13220-1-j-keerthy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: t-kristo@ti.com, u-boot@lists.denx.de Subject: [U-Boot] [PATCH v3 09/18] arm: dts: k3-am654-r5-base-board: Add VTM node X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add VTM node for voltage and thermal management. For u-boot, this is needed for supporting AVS class 0, as the efuse values for the OPPs are stored under the VTM. Signed-off-by: Tero Kristo Signed-off-by: Keerthy --- Changes in v3: * Moved from generic wakeup.dtsi to r5 board file. Changes in v2: * No change arch/arm/dts/k3-am654-r5-base-board.dts | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts b/arch/arm/dts/k3-am654-r5-base-board.dts index 174d202306..6ab0f4af10 100644 --- a/arch/arm/dts/k3-am654-r5-base-board.dts +++ b/arch/arm/dts/k3-am654-r5-base-board.dts @@ -97,6 +97,13 @@ u-boot,dm-spl; }; + wkup_vtm0: wkup_vtm@42050000 { + compatible = "ti,am654-vtm", "ti,am654-avs"; + reg = <0x42050000 0x25c>; + power-domains = <&k3_pds 80>; + #thermal-sensor-cells = <1>; + }; + clk_200mhz: dummy_clock { compatible = "fixed-clock"; #clock-cells = <0>; From patchwork Thu Oct 24 09:30:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keerthy X-Patchwork-Id: 1182785 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="DrUUZEZF"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 46zMdV39whz9sS6 for ; Thu, 24 Oct 2019 20:39:10 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 170B6C21E1D; Thu, 24 Oct 2019 09:36:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id C79CBC21C51; Thu, 24 Oct 2019 09:32:17 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 7DC13C21DED; Thu, 24 Oct 2019 09:31:31 +0000 (UTC) Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lists.denx.de (Postfix) with ESMTPS id BDC4CC21DB3 for ; Thu, 24 Oct 2019 09:31:25 +0000 (UTC) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9O9VNSv046996; Thu, 24 Oct 2019 04:31:23 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1571909483; bh=LWt99u3jkFZ7Qky7YfAv/sEYcBngwaz+XehNT5C2ID0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=DrUUZEZFOHTOTdOqJ3oq+S8VMsBnRTzJv7o67poDfmUIo7Zsx/7sFhcea/7NePw2/ PQPRnulOpmKf9qF1yUFrdvXTyYpPYqz/VKuj16/lnvAjGHFKE9Ox+GTOlUCQQhC1Zr eueZK+iuzHaq0DWQj5buHH5EPw8rGL4m9r9ClYQ0= Received: from DFLE105.ent.ti.com (dfle105.ent.ti.com [10.64.6.26]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9O9VNWV059056 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 24 Oct 2019 04:31:23 -0500 Received: from DFLE100.ent.ti.com (10.64.6.21) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Thu, 24 Oct 2019 04:31:13 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Thu, 24 Oct 2019 04:31:13 -0500 Received: from a0393675ula.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9O9UrhU104197; Thu, 24 Oct 2019 04:31:21 -0500 From: Keerthy To: , , Date: Thu, 24 Oct 2019 15:00:55 +0530 Message-ID: <20191024093103.13220-11-j-keerthy@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191024093103.13220-1-j-keerthy@ti.com> References: <20191024093103.13220-1-j-keerthy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: t-kristo@ti.com, u-boot@lists.denx.de Subject: [U-Boot] [PATCH v3 10/18] arm: dts: k3-am654-r5-base-board: enable wkup_i2c0 driver for spl X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Tero Kristo Enable wkup_i2c0 as this is needed for voltage control. Signed-off-by: Tero Kristo Signed-off-by: Keerthy --- Changes in v3: * No change Changes in v2: * No change arch/arm/dts/k3-am654-r5-base-board.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts b/arch/arm/dts/k3-am654-r5-base-board.dts index 6ab0f4af10..98868afd9c 100644 --- a/arch/arm/dts/k3-am654-r5-base-board.dts +++ b/arch/arm/dts/k3-am654-r5-base-board.dts @@ -218,4 +218,5 @@ pinctrl-names = "default"; pinctrl-0 = <&wkup_i2c0_pins_default>; clock-frequency = <400000>; + u-boot,dm-spl; }; From patchwork Thu Oct 24 09:30:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keerthy X-Patchwork-Id: 1182773 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="S+Dgu/p7"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 46zMZ45cg4z9sPh for ; Thu, 24 Oct 2019 20:36:12 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 614E0C21DFB; Thu, 24 Oct 2019 09:36:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 9A67FC21E30; Thu, 24 Oct 2019 09:31:52 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id BCA3BC21E44; Thu, 24 Oct 2019 09:31:34 +0000 (UTC) Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lists.denx.de (Postfix) with ESMTPS id 695E5C21E0F for ; Thu, 24 Oct 2019 09:31:28 +0000 (UTC) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9O9VQVq109565; Thu, 24 Oct 2019 04:31:26 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1571909486; bh=hvv1B8WbBx7UucCUa5vsYgLIaG9OzZhAQh38dkt6jp8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=S+Dgu/p7whqDRCCxByUHecO8MBtLpEfQ+McXTITtOGk8SxZkVaowiNBsIZ4iQK15Z 6EdOVzn7dRlDJC+nxeB0KkW24qijegJIhkwPKh5xJjtqcFc3eBYmmIj4gHCy6ZE8Je oBjrovIdhWaXLb+Wg0TNBRb8AvVrpcCHHkHI/KMA= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9O9VQ8K067558 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 24 Oct 2019 04:31:26 -0500 Received: from DLEE106.ent.ti.com (157.170.170.36) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Thu, 24 Oct 2019 04:31:15 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Thu, 24 Oct 2019 04:31:26 -0500 Received: from a0393675ula.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9O9UrhV104197; Thu, 24 Oct 2019 04:31:23 -0500 From: Keerthy To: , , Date: Thu, 24 Oct 2019 15:00:56 +0530 Message-ID: <20191024093103.13220-12-j-keerthy@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191024093103.13220-1-j-keerthy@ti.com> References: <20191024093103.13220-1-j-keerthy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: t-kristo@ti.com, u-boot@lists.denx.de Subject: [U-Boot] [PATCH v3 11/18] arm: dts: k3-am654-r5-base-board: add supply rail for MPU X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Tero Kristo MPU voltage on AM65x-evm is controlled via the TPS62363 chip attached to i2c0 bus. Add device node for this so that it can be controlled via a regulator driver. Signed-off-by: Tero Kristo Signed-off-by: Keerthy --- Changes in v3: * No change Changes in v2: * No change arch/arm/dts/k3-am654-r5-base-board.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts b/arch/arm/dts/k3-am654-r5-base-board.dts index 98868afd9c..baa3a2c9e7 100644 --- a/arch/arm/dts/k3-am654-r5-base-board.dts +++ b/arch/arm/dts/k3-am654-r5-base-board.dts @@ -219,4 +219,17 @@ pinctrl-0 = <&wkup_i2c0_pins_default>; clock-frequency = <400000>; u-boot,dm-spl; + + vdd_mpu: tps62363@60 { + compatible = "ti,tps62363"; + reg = <0x60>; + regulator-name = "VDD_MPU"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1770000>; + regulator-always-on; + regulator-boot-on; + ti,vsel0-state-high; + ti,vsel1-state-high; + u-boot,dm-spl; + }; }; From patchwork Thu Oct 24 09:30:57 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keerthy X-Patchwork-Id: 1182796 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="oa89jxMt"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 46zMhj5Dmfz9sPh for ; Thu, 24 Oct 2019 20:41:57 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id D10A7C21E56; Thu, 24 Oct 2019 09:36:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id E5B93C21E08; Thu, 24 Oct 2019 09:32:00 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 02611C21E74; Thu, 24 Oct 2019 09:31:37 +0000 (UTC) Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lists.denx.de (Postfix) with ESMTPS id 2D60CC21DA6 for ; Thu, 24 Oct 2019 09:31:31 +0000 (UTC) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9O9VTgZ047024; Thu, 24 Oct 2019 04:31:29 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1571909489; bh=Zfj8dsOtgIzueFHgAC5mPGZ9iCL6BRZHGgjB1BlxDpM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=oa89jxMt/M0dnmmJvkO5osDAeRbbOu0utioew7C64MahXiSBuorEi7pnorssY0sBP ANgKO7IRdu56nEXXjG+dtH5uALyXy0HDdFjhBMYSI8Btg7Ni/yBGJvRKXEFuGF4MUx KVjD0BtIV6zs/tGxXZOb82SxZBVSXf3qR2zHfv5M= Received: from DFLE107.ent.ti.com (dfle107.ent.ti.com [10.64.6.28]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9O9VTed059119 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 24 Oct 2019 04:31:29 -0500 Received: from DFLE100.ent.ti.com (10.64.6.21) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Thu, 24 Oct 2019 04:31:18 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Thu, 24 Oct 2019 04:31:18 -0500 Received: from a0393675ula.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9O9UrhW104197; Thu, 24 Oct 2019 04:31:26 -0500 From: Keerthy To: , , Date: Thu, 24 Oct 2019 15:00:57 +0530 Message-ID: <20191024093103.13220-13-j-keerthy@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191024093103.13220-1-j-keerthy@ti.com> References: <20191024093103.13220-1-j-keerthy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: t-kristo@ti.com, u-boot@lists.denx.de Subject: [U-Boot] [PATCH v3 12/18] arm: dts: k3-am654-r5-base-board: enable wkup_vtm0 node and link in supplies X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Tero Kristo Link the vdd-supplies for the voltage domains under the VTM node. Also, enable the node under SPL. This will enable the AVS class 0 support on am65x-evm board. Signed-off-by: Tero Kristo Signed-off-by: Keerthy --- Changes in v3: * No change Changes in v2: * No change arch/arm/dts/k3-am654-r5-base-board.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts b/arch/arm/dts/k3-am654-r5-base-board.dts index baa3a2c9e7..5c110ef9dd 100644 --- a/arch/arm/dts/k3-am654-r5-base-board.dts +++ b/arch/arm/dts/k3-am654-r5-base-board.dts @@ -138,6 +138,12 @@ power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>; }; +&wkup_vtm0 { + vdd-supply-3 = <&vdd_mpu>; + vdd-supply-4 = <&vdd_mpu>; + u-boot,dm-spl; +}; + &wkup_pmx0 { u-boot,dm-spl; wkup_uart0_pins_default: wkup_uart0_pins_default { From patchwork Thu Oct 24 09:30:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keerthy X-Patchwork-Id: 1182792 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="RX9i/pQY"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 46zMfh1Zy3z9sRs for ; Thu, 24 Oct 2019 20:40:12 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id C66EAC21E12; Thu, 24 Oct 2019 09:36:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 8194CC21E53; Thu, 24 Oct 2019 09:32:09 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 69D5AC21E0F; Thu, 24 Oct 2019 09:31:39 +0000 (UTC) Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lists.denx.de (Postfix) with ESMTPS id B10A7C21E12 for ; Thu, 24 Oct 2019 09:31:33 +0000 (UTC) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9O9VVDn047055; Thu, 24 Oct 2019 04:31:31 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1571909491; bh=if8hOPx73HjMWDDSEHOYZJH+C7stgNc0Cs0uCkDje00=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=RX9i/pQYG/rEzLKkd9yYR5bLMpvFIz3rQp6hBjt3BqeZ2HjSy+ZSwl/Kr3JAEJqsL GArKS1CPZFOSrkBroWkO2Kchn7SZL4FOrHBIhqPOqIE9AbL6uOZ0IWgm0uV3oZOn// lm39srxY6q4dWxZxErClBMwqxJnU87oMMiNmK5zc= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9O9VVTo059208 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 24 Oct 2019 04:31:31 -0500 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Thu, 24 Oct 2019 04:31:21 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Thu, 24 Oct 2019 04:31:21 -0500 Received: from a0393675ula.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9O9UrhX104197; Thu, 24 Oct 2019 04:31:29 -0500 From: Keerthy To: , , Date: Thu, 24 Oct 2019 15:00:58 +0530 Message-ID: <20191024093103.13220-14-j-keerthy@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191024093103.13220-1-j-keerthy@ti.com> References: <20191024093103.13220-1-j-keerthy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: t-kristo@ti.com, u-boot@lists.denx.de Subject: [U-Boot] [PATCH v3 13/18] arm: dts: k3-j721e-r5-common-proc-board: Add VTM node X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add VTM node for voltage and thermal management. For u-boot, this is needed for supporting AVS class 0, as the efuse values for the OPPs are stored under the VTM. Signed-off-by: Keerthy --- Changes in v3: * No change Changes in v2: * No change arch/arm/dts/k3-j721e-r5-common-proc-board.dts | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts index 54d7998d27..e569809fcb 100644 --- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts +++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts @@ -59,6 +59,13 @@ mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>; mbox-names = "tx", "rx"; }; + + wkup_vtm0: wkup_vtm@42040000 { + compatible = "ti,am654-vtm", "ti,j721e-avs"; + reg = <0x0 0x42040000 0x0 0x330>; + power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>; + #thermal-sensor-cells = <1>; + }; }; &dmsc { From patchwork Thu Oct 24 09:30:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keerthy X-Patchwork-Id: 1182780 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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Thu, 24 Oct 2019 04:31:34 -0500 Received: from DLEE112.ent.ti.com (157.170.170.23) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Thu, 24 Oct 2019 04:31:23 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Thu, 24 Oct 2019 04:31:23 -0500 Received: from a0393675ula.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9O9UrhY104197; Thu, 24 Oct 2019 04:31:32 -0500 From: Keerthy To: , , Date: Thu, 24 Oct 2019 15:00:59 +0530 Message-ID: <20191024093103.13220-15-j-keerthy@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191024093103.13220-1-j-keerthy@ti.com> References: <20191024093103.13220-1-j-keerthy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: t-kristo@ti.com, u-boot@lists.denx.de Subject: [U-Boot] [PATCH v3 14/18] arm: dts: k3-j721e-r5-common: Add tps65941 node and dependent wkup_i2c0 node X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add tps65941 node and dependent wkup_i2c0 node needed for AVS class 0 support Signed-off-by: Keerthy --- Changes in v3: * No change Changes in v2: * No change arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 11 +++++++ .../arm/dts/k3-j721e-r5-common-proc-board.dts | 32 +++++++++++++++++++ 2 files changed, 43 insertions(+) diff --git a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi index b958b5b3c1..0ed09e469f 100644 --- a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi @@ -57,6 +57,17 @@ clock-names = "fclk"; }; + wkup_i2c0: i2c@42120000 { + compatible = "ti,j721e-i2c", "ti,omap4-i2c"; + reg = <0x0 0x42120000 0x0 0x100>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clock-names = "fck"; + clocks = <&k3_clks 197 0>; + power-domains = <&k3_pds 197 TI_SCI_PD_EXCLUSIVE>; + }; + mcu_uart0: serial@40a00000 { compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x40a00000 0x00 0x100>; diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts index e569809fcb..165c38da4b 100644 --- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts +++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts @@ -93,6 +93,13 @@ J721E_WKUP_IOPAD(0xe0, PIN_OUTPUT, 0) /* (G29) WKUP_GPIO0_12.MCU_UART0_TXD */ >; }; + + wkup_i2c0_pins_default: wkup-i2c0-pins-default { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0xf8, PIN_INPUT_PULLUP, 0) /* (J25) WKUP_I2C0_SCL */ + J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */ + >; + }; }; &main_pmx0 { @@ -147,4 +154,29 @@ ti,driver-strength-ohm = <50>; }; +&wkup_i2c0 { + u-boot,dm-spl; + tps659413a: tps659413a@48 { + reg = <0x48>; + compatible = "ti,tps659413"; + u-boot,dm-spl; + pinctrl-names = "default"; + pinctrl-0 = <&wkup_i2c0_pins_default>; + clock-frequency = <400000>; + + regulators: regulators { + u-boot,dm-spl; + buck12_reg: buck12 { + /*VDD_MPU*/ + regulator-name = "buck12"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1250000>; + regulator-always-on; + regulator-boot-on; + u-boot,dm-spl; + }; + }; + }; +}; + #include "k3-j721e-common-proc-board-u-boot.dtsi" From patchwork Thu Oct 24 09:31:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keerthy X-Patchwork-Id: 1182782 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; 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Thu, 24 Oct 2019 04:31:26 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Thu, 24 Oct 2019 04:31:26 -0500 Received: from a0393675ula.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9O9UrhZ104197; Thu, 24 Oct 2019 04:31:34 -0500 From: Keerthy To: , , Date: Thu, 24 Oct 2019 15:01:00 +0530 Message-ID: <20191024093103.13220-16-j-keerthy@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191024093103.13220-1-j-keerthy@ti.com> References: <20191024093103.13220-1-j-keerthy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: t-kristo@ti.com, u-boot@lists.denx.de Subject: [U-Boot] [PATCH v3 15/18] arm: dts: k3-j721e-r5-common-proc-board: Hook buck12_reg to vtm supply X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Hook buck12_reg to vtm avs supply Signed-off-by: Keerthy --- Changes in v3: * No change Changes in v2: * No change arch/arm/dts/k3-j721e-r5-common-proc-board.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts index 165c38da4b..41af48214f 100644 --- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts +++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts @@ -179,4 +179,9 @@ }; }; +&wkup_vtm0 { + vdd-supply-2 = <&buck12_reg>; + u-boot,dm-spl; +}; + #include "k3-j721e-common-proc-board-u-boot.dtsi" From patchwork Thu Oct 24 09:31:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keerthy X-Patchwork-Id: 1182786 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="orbPEbqL"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 46zMdV4Hkdz9sS8 for ; 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Thu, 24 Oct 2019 04:31:37 -0500 From: Keerthy To: , , Date: Thu, 24 Oct 2019 15:01:01 +0530 Message-ID: <20191024093103.13220-17-j-keerthy@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191024093103.13220-1-j-keerthy@ti.com> References: <20191024093103.13220-1-j-keerthy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: t-kristo@ti.com, u-boot@lists.denx.de Subject: [U-Boot] [PATCH v3 16/18] configs: am65x_evm_r5_defconfig: Enable TPS62363 regulator support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Tero Kristo TPS62363 is used to control the MPU_VDD voltage, so enable the driver for this. Signed-off-by: Tero Kristo Signed-off-by: Keerthy --- Changes in v3: * No change Changes in v2: * No change configs/am65x_evm_r5_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig index d0619e9b7a..a721b24ba4 100644 --- a/configs/am65x_evm_r5_defconfig +++ b/configs/am65x_evm_r5_defconfig @@ -84,6 +84,7 @@ CONFIG_DM_REGULATOR=y CONFIG_SPL_DM_REGULATOR=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_SPL_DM_REGULATOR_GPIO=y +CONFIG_DM_REGULATOR_TPS62360=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_K3_SYSTEM_CONTROLLER=y From patchwork Thu Oct 24 09:31:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keerthy X-Patchwork-Id: 1182791 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="iMLrOwi3"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 46zMff5QQ3z9sRX for ; Thu, 24 Oct 2019 20:40:10 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 41E39C21E30; Thu, 24 Oct 2019 09:37:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 4C4D7C21E63; Thu, 24 Oct 2019 09:32:47 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id EF92DC21E31; Thu, 24 Oct 2019 09:32:03 +0000 (UTC) Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lists.denx.de (Postfix) with ESMTPS id D9D49C21E62 for ; Thu, 24 Oct 2019 09:31:44 +0000 (UTC) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9O9Vg0Y109656; Thu, 24 Oct 2019 04:31:42 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1571909502; bh=qr8JzyhEV1cRvRX8n42cQfPSS2B8gX6va8B8d460zco=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=iMLrOwi37E3yUVJ/IabHnuld6izcrXrv/7WFNAIIYiNZ4qd4nKlD2kNOegg2QlqTb F5sqxd3ni1VUe4h2cs1Rvov5VaCH59N1CmbaZY5FG+uRwC2WH65JqEprcqv5aLINOc 5/tldc4OkgHTiz5zkF6iq7l53F+7E25M3j5ApTgI= Received: from DLEE107.ent.ti.com (dlee107.ent.ti.com [157.170.170.37]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9O9Vg4S062485; Thu, 24 Oct 2019 04:31:42 -0500 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Thu, 24 Oct 2019 04:31:42 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Thu, 24 Oct 2019 04:31:32 -0500 Received: from a0393675ula.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9O9Urhb104197; Thu, 24 Oct 2019 04:31:40 -0500 From: Keerthy To: , , Date: Thu, 24 Oct 2019 15:01:02 +0530 Message-ID: <20191024093103.13220-18-j-keerthy@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191024093103.13220-1-j-keerthy@ti.com> References: <20191024093103.13220-1-j-keerthy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: t-kristo@ti.com, u-boot@lists.denx.de Subject: [U-Boot] [PATCH v3 17/18] configs: am65x_evm_r5_defconfig: Enable AVS class 0 support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Tero Kristo Enable AVS class 0 support for the R5 SPL bootloader. Signed-off-by: Tero Kristo Signed-off-by: Keerthy --- Changes in v3: * No change Changes in v2: * No change configs/am65x_evm_r5_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig index a721b24ba4..4f122808de 100644 --- a/configs/am65x_evm_r5_defconfig +++ b/configs/am65x_evm_r5_defconfig @@ -99,3 +99,4 @@ CONFIG_TIMER=y CONFIG_SPL_TIMER=y CONFIG_OMAP_TIMER=y CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 +CONFIG_K3_AVS0=y From patchwork Thu Oct 24 09:31:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keerthy X-Patchwork-Id: 1182790 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="Oq9H9QRU"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 46zMff5QMMz9sRN for ; Thu, 24 Oct 2019 20:40:10 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id C2DC5C21E31; Thu, 24 Oct 2019 09:37:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id F086BC21E3A; Thu, 24 Oct 2019 09:32:42 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id A3D98C21E1B; Thu, 24 Oct 2019 09:32:03 +0000 (UTC) Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lists.denx.de (Postfix) with ESMTPS id 65D2AC21E39 for ; Thu, 24 Oct 2019 09:31:47 +0000 (UTC) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9O9VjX1111257; Thu, 24 Oct 2019 04:31:45 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1571909505; bh=K6g6Ugml2QcbfrcCylHYdMvsPenwo0dqzWxqJvzVTC0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Oq9H9QRUX4FbALgy6pzeILnAMWvYKtPimkGTB1VUFcPqqqPiUBozG6CX5xTMlWQtv KxCHz6ToAQeSYZwAh6LrKcicVEvKg/TSt81h7MXYBJEg0A1IUsJQZV1G6a73bXHNyr MnACGMlbp3JtHLtQh6XWpG7wsFi9/DMH6c7Jh6Yk= Received: from DFLE107.ent.ti.com (dfle107.ent.ti.com [10.64.6.28]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9O9Vj4g062530; Thu, 24 Oct 2019 04:31:45 -0500 Received: from DFLE102.ent.ti.com (10.64.6.23) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Thu, 24 Oct 2019 04:31:34 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Thu, 24 Oct 2019 04:31:34 -0500 Received: from a0393675ula.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9O9Urhc104197; Thu, 24 Oct 2019 04:31:42 -0500 From: Keerthy To: , , Date: Thu, 24 Oct 2019 15:01:03 +0530 Message-ID: <20191024093103.13220-19-j-keerthy@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191024093103.13220-1-j-keerthy@ti.com> References: <20191024093103.13220-1-j-keerthy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: t-kristo@ti.com, u-boot@lists.denx.de Subject: [U-Boot] [PATCH v3 18/18] configs: j721e_evm_r5_defconfig: Enable AVS Class 0 & dependent configs X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Enable AVS Class 0 & dependent config options. Signed-off-by: Keerthy --- Changes in v3: * No change Changes in v2: * No change configs/j721e_evm_r5_defconfig | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index b7168eceb4..2b6dbf5a49 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -59,10 +59,14 @@ CONFIG_CLK_TI_SCI=y CONFIG_TI_SCI_PROTOCOL=y CONFIG_DM_GPIO=y CONFIG_DA8XX_GPIO=y +CONFIG_DM_I2C=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_SYS_I2C_OMAP24XX=y CONFIG_DM_MAILBOX=y CONFIG_K3_SEC_PROXY=y CONFIG_MISC=y CONFIG_FS_LOADER=y +CONFIG_K3_AVS0=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_AM654=y @@ -76,6 +80,11 @@ CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_SINGLE=y CONFIG_POWER_DOMAIN=y CONFIG_TI_SCI_POWER_DOMAIN=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_TPS65941=y +CONFIG_DM_REGULATOR=y +CONFIG_SPL_DM_REGULATOR=y +CONFIG_DM_REGULATOR_TPS65941=y CONFIG_K3_SYSTEM_CONTROLLER=y CONFIG_REMOTEPROC_TI_K3_ARM64=y CONFIG_DM_RESET=y