From patchwork Thu Sep 5 03:08:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1158183 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46P5JJ6Frqz9sDB for ; Thu, 5 Sep 2019 13:09:20 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="RixQhc+Z"; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 46P5JH6YnXzDql0 for ; Thu, 5 Sep 2019 13:09:19 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::542; helo=mail-pg1-x542.google.com; envelope-from=oohall@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="RixQhc+Z"; dkim-atps=neutral Received: from mail-pg1-x542.google.com (mail-pg1-x542.google.com [IPv6:2607:f8b0:4864:20::542]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 46P5Hw3spWzDqRm for ; Thu, 5 Sep 2019 13:09:00 +1000 (AEST) Received: by mail-pg1-x542.google.com with SMTP id d10so558078pgo.5 for ; Wed, 04 Sep 2019 20:08:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=vYnoH4pT5QtzftyCXDstJ93IkrrzZ82w3/oY/Reppy8=; b=RixQhc+ZUJ6CfjpghX8pz+vPb4tshchLtq2Gwgsj5MUqTb9z/xvtzXUQYdIZ9ao7X8 38uyfIvB88w66YTVLGwmlmI90DvPCh1FpqwOvA5nOcJIlDoT9brz8Y4rlwawoAVmvoGw muHomWg+/BNJD7G2JBVJG2qkrdn8KwYQ9Fs5wk1a9t3eawtzVRH8e22sv+DDpNgRfSr5 JdylPO8LRG7mAsCE9Ec9pPVmbaf4ehUaipHvfe8xYB859wVQkNLKYWIT2Ftk7ojb+g44 VqteFGlUHtz8lM6Wk6vQupAJJ94IUhAtu5clymmJ5SqXtaxrNqckgktygMpKPT2JrxsI TT/A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=vYnoH4pT5QtzftyCXDstJ93IkrrzZ82w3/oY/Reppy8=; b=s9g6IYl/qWHo9M/doZHlTaylbyOxhmJEzGZaQTMnY9hSaupuQiyzfuiYQo0qRyN5rI 9mwKXMwgx95JFOE9Fnw7W9ATVMzjbwBV/IYUyn4386Z5jT3qWoG67RUA7Y6ByGu/ct1F +wPGDl4F3lEqSfBSL31bAJAjdBanx1ZjBk99PZLPg/wucu/m8uiQcMvHwdSmlkzcioAb Z/NgVgaFHTaHXgQEPTs+c3rx3GgadNXA5/KzcO4AwQuL+gEk+t3tmzhVpbWZaWzEN+TX IM/rfZAf7Keb/lEIjJQ2blNPYZvTRgUx9BMQ+YbHLYov2HexYmfGlMa4Kz8MHKzSWbun RgyA== X-Gm-Message-State: APjAAAVY5Vu60D1lpK4lEz6M4oWIqI4U3z/9G2qunzsyKcIF7XwRIiLL VScjQz1vHVHC7AlKiKuc00LVSuGK X-Google-Smtp-Source: APXvYqzGXfmT0OUKXWgrIqrJTKn8gm6/QB3snMGZwvItevM21nir6N4I+15KQcOleo9vFM8APbxy6g== X-Received: by 2002:a65:64ce:: with SMTP id t14mr1118015pgv.137.1567652936290; Wed, 04 Sep 2019 20:08:56 -0700 (PDT) Received: from wafer.ozlabs.ibm.com.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id p189sm545844pfp.163.2019.09.04.20.08.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 Sep 2019 20:08:55 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Thu, 5 Sep 2019 13:08:41 +1000 Message-Id: <20190905030845.15540-1-oohall@gmail.com> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 Subject: [Skiboot] [PATCH v2 1/5] xive, interrupts: Add a mask() source op X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" We want to be able to mask LSIs from inside of skiboot. For P9 most of the actual interrupt wrangling is internal to the XIVE driver, so we need to provide a way for XIVE based interrupt sources to mask and interrupt. Do this by adding a mask() function to the interrupt source ops structure. Signed-off-by: Oliver O'Halloran --- v2: patch added in v2 --- hw/xive.c | 18 ++++++++++++++++++ include/interrupts.h | 1 + include/xive.h | 1 + 3 files changed, 20 insertions(+) diff --git a/hw/xive.c b/hw/xive.c index 76b41a9ee95f..ea970de7898e 100644 --- a/hw/xive.c +++ b/hw/xive.c @@ -2705,6 +2705,23 @@ static void xive_source_eoi(struct irq_source *is, uint32_t isn) __xive_source_eoi(is, isn); } +void __xive_source_mask(struct irq_source *is, uint32_t isn) +{ + struct xive_src *s = container_of(is, struct xive_src, is); + + xive_update_irq_mask(s, isn - s->esb_base, true); +} + +static void xive_source_mask(struct irq_source *is, uint32_t isn) +{ + struct xive_src *s = container_of(is, struct xive_src, is); + + if (s->orig_ops && s->orig_ops->eoi) + s->orig_ops->mask(is, isn); + else + __xive_source_mask(is, isn); +} + static void xive_source_interrupt(struct irq_source *is, uint32_t isn) { struct xive_src *s = container_of(is, struct xive_src, is); @@ -2739,6 +2756,7 @@ static const struct irq_source_ops xive_irq_source_ops = { .interrupt = xive_source_interrupt, .attributes = xive_source_attributes, .name = xive_source_name, + .mask = xive_source_mask, }; static void __xive_register_source(struct xive *x, struct xive_src *s, diff --git a/include/interrupts.h b/include/interrupts.h index d1ee5c4c112b..a8c44be2217b 100644 --- a/include/interrupts.h +++ b/include/interrupts.h @@ -153,6 +153,7 @@ struct irq_source_ops { void (*interrupt)(struct irq_source *is, uint32_t isn); void (*eoi)(struct irq_source *is, uint32_t isn); char *(*name)(struct irq_source *is, uint32_t isn); + void (*mask)(struct irq_source *is, uint32_t isn); }; struct irq_source { diff --git a/include/xive.h b/include/xive.h index 4100e7127784..b1f4b82ee041 100644 --- a/include/xive.h +++ b/include/xive.h @@ -511,5 +511,6 @@ void *xive_get_trigger_port(uint32_t girq); /* To be used by special EOI override in PSI */ struct irq_source; void __xive_source_eoi(struct irq_source *is, uint32_t isn); +void __xive_source_mask(struct irq_source *is, uint32_t isn); #endif /* __XIVE_H__ */ From patchwork Thu Sep 5 03:08:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1158184 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46P5Jj6f6Rz9sDB for ; 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Wed, 04 Sep 2019 20:08:58 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Thu, 5 Sep 2019 13:08:42 +1000 Message-Id: <20190905030845.15540-2-oohall@gmail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190905030845.15540-1-oohall@gmail.com> References: <20190905030845.15540-1-oohall@gmail.com> MIME-Version: 1.0 Subject: [Skiboot] [PATCH v2 2/5] hw/psi-p9: Make interrupt name array global X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" The array is currently a static constant inside psi_p9_irq_name() which returns a malloc()ed pointer due to the API required by the interrupt source ops interface. Make the name array a static global and move it further up in the file so we can use it in other functions. Signed-off-by: Oliver O'Halloran Reviewed-by: Cédric Le Goater --- hw/psi.c | 54 +++++++++++++++++++++++++++--------------------------- 1 file changed, 27 insertions(+), 27 deletions(-) diff --git a/hw/psi.c b/hw/psi.c index a74c105ff0ec..99ec06ac488a 100644 --- a/hw/psi.c +++ b/hw/psi.c @@ -509,6 +509,33 @@ static const struct irq_source_ops psi_p8_irq_ops = { .name = psi_p8_irq_name, }; +static const char *p9_psi_int_names[P9_PSI_NUM_IRQS] = { + "psi:fsp", + "psi:occ", + "psi:fsi", + "psi:lpchc", + "psi:local_err", + "psi:global_err", + "psi:external", + "psi:lpc_serirq_mux0", /* Have a callback to get name ? */ + "psi:lpc_serirq_mux1", /* Have a callback to get name ? */ + "psi:lpc_serirq_mux2", /* Have a callback to get name ? */ + "psi:lpc_serirq_mux3", /* Have a callback to get name ? */ + "psi:i2c", + "psi:dio", + "psi:psu" +}; + +static char *psi_p9_irq_name(struct irq_source *is, uint32_t isn) +{ + struct psi *psi = is->data; + uint32_t idx = isn - psi->interrupt; + + if (idx >= ARRAY_SIZE(p9_psi_int_names)) + return NULL; + return strdup(p9_psi_int_names[idx]); +} + static void psihb_p9_interrupt(struct irq_source *is, uint32_t isn) { struct psi *psi = is->data; @@ -583,33 +610,6 @@ static uint64_t psi_p9_irq_attributes(struct irq_source *is __unused, return IRQ_ATTR_TARGET_OPAL | IRQ_ATTR_TYPE_LSI; } -static char *psi_p9_irq_name(struct irq_source *is, uint32_t isn) -{ - struct psi *psi = is->data; - uint32_t idx = isn - psi->interrupt; - - static const char *names[P9_PSI_NUM_IRQS] = { - "psi:fsp", - "psi:occ", - "psi:fsi", - "psi:lpchc", - "psi:local_err", - "psi:global_err", - "psi:external", - "psi:lpc_serirq_mux0", /* Have a callback to get name ? */ - "psi:lpc_serirq_mux1", /* Have a callback to get name ? */ - "psi:lpc_serirq_mux2", /* Have a callback to get name ? */ - "psi:lpc_serirq_mux3", /* Have a callback to get name ? */ - "psi:i2c", - "psi:dio", - "psi:psu" - }; - - if (idx >= P9_PSI_NUM_IRQS) - return NULL; - return strdup(names[idx]); -} - static const struct irq_source_ops psi_p9_irq_ops = { .interrupt = psihb_p9_interrupt, .attributes = psi_p9_irq_attributes, From patchwork Thu Sep 5 03:08:43 2019 Content-Type: text/plain; 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Wed, 04 Sep 2019 20:09:00 -0700 (PDT) Received: from wafer.ozlabs.ibm.com.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id p189sm545844pfp.163.2019.09.04.20.08.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 Sep 2019 20:09:00 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Thu, 5 Sep 2019 13:08:43 +1000 Message-Id: <20190905030845.15540-3-oohall@gmail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190905030845.15540-1-oohall@gmail.com> References: <20190905030845.15540-1-oohall@gmail.com> MIME-Version: 1.0 Subject: [Skiboot] [PATCH v2 3/5] hw/psi-p9: Mask OPAL-owned LSIs without handlers X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Some versions of Swift have the TPM interrupt line of the second chip pulled up instead of down. This causes the PSI's external (TPM) interrupt to constantly re-fire since it's an LSI and the interrupt signal is constantly active. There's nothing that can be done to clear the underlying interrupt condition so we to ensure that it's masked. The problem isn't really specific to the external interrupt and will occur for any of the PSI interrupts that don't have an actual handler (FSP, global error, and sometimes the external). When one of these is delivered to OPAL we should log that it happened and mask it to prevent re-firing. Cc: Cédric Le Goater Signed-off-by: Oliver O'Halloran Reviewed-by: Cédric Le Goater --- v2: Use __xive_source_mask() to mask the interrupt rather than opencoding the ESB manipulation in the PSI driver. look up the interrupt name from the name array rather than using the name callback. --- hw/psi.c | 35 +++++++++++++++++++++++++++++------ 1 file changed, 29 insertions(+), 6 deletions(-) diff --git a/hw/psi.c b/hw/psi.c index 99ec06ac488a..6c28eb0447ad 100644 --- a/hw/psi.c +++ b/hw/psi.c @@ -536,6 +536,29 @@ static char *psi_p9_irq_name(struct irq_source *is, uint32_t isn) return strdup(p9_psi_int_names[idx]); } +static void psi_p9_mask_unhandled_irq(struct irq_source *is, uint32_t isn) +{ + int idx = isn - psi->interrupt; + struct psi *psi = is->data; + const char *name; + + if (idx < ARRAY_SIZE(p9_psi_int_names)) + name = p9_psi_int_names[idx]; + else + name = "unknown irq"; + + prerror("PSI: Masking unhandled LSI %s (idx: %d)!\n", name, idx); + + /* + * All the PSI interrupts are LSIs and will be constantly re-fired + * unless the underlying interrupt condition is cleared. If we don't + * have a handler for the interrupt then it needs to be masked to + * prevent the IRQ from locking up the thread which handles it. + */ + __xive_source_mask(is, isn); + +} + static void psihb_p9_interrupt(struct irq_source *is, uint32_t isn) { struct psi *psi = is->data; @@ -548,21 +571,17 @@ static void psihb_p9_interrupt(struct irq_source *is, uint32_t isn) case P9_PSI_IRQ_OCC: occ_p9_interrupt(psi->chip_id); break; - case P9_PSI_IRQ_FSI: - printf("PSI: FSI irq received\n"); - break; case P9_PSI_IRQ_LPCHC: lpc_interrupt(psi->chip_id); break; case P9_PSI_IRQ_LOCAL_ERR: prd_psi_interrupt(psi->chip_id); break; - case P9_PSI_IRQ_GLOBAL_ERR: - printf("PSI: Global error irq received\n"); - break; case P9_PSI_IRQ_EXTERNAL: if (platform.external_irq) platform.external_irq(psi->chip_id); + else + psi_p9_mask_unhandled_irq(is, isn); break; case P9_PSI_IRQ_LPC_SIRQ0: case P9_PSI_IRQ_LPC_SIRQ1: @@ -580,6 +599,9 @@ static void psihb_p9_interrupt(struct irq_source *is, uint32_t isn) case P9_PSI_IRQ_PSU: p9_sbe_interrupt(psi->chip_id); break; + + default: + psi_p9_mask_unhandled_irq(is, isn); } } @@ -614,6 +636,7 @@ static const struct irq_source_ops psi_p9_irq_ops = { .interrupt = psihb_p9_interrupt, .attributes = psi_p9_irq_attributes, .name = psi_p9_irq_name, + .mask = psi_p9_mask_unhandled_irq, }; void psi_set_external_irq_policy(bool policy) From patchwork Thu Sep 5 03:08:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1158186 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46P5KK55D7z9s3Z for ; Thu, 5 Sep 2019 13:10:13 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; 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Wed, 04 Sep 2019 20:09:03 -0700 (PDT) Received: from wafer.ozlabs.ibm.com.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id p189sm545844pfp.163.2019.09.04.20.09.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 Sep 2019 20:09:02 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Thu, 5 Sep 2019 13:08:44 +1000 Message-Id: <20190905030845.15540-4-oohall@gmail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190905030845.15540-1-oohall@gmail.com> References: <20190905030845.15540-1-oohall@gmail.com> MIME-Version: 1.0 Subject: [Skiboot] [PATCH v2 4/5] hw/psi-p9: Follow the external IRQ policy X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" The P8 PSI support follows the external IRQ policy and the P9 PSI doesn't. There are no P9 platforms which define an .external_irq() in the platform structure so this should not cause any functional changes. Linux is smart enough to mask LSIs without a registered handler so directing them at the OS should be safe. Cc: Cédric Le Goater Signed-off-by: Oliver O'Halloran Reviewed-by: Cédric Le Goater --- hw/psi.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/psi.c b/hw/psi.c index 6c28eb0447ad..ba05be8403d9 100644 --- a/hw/psi.c +++ b/hw/psi.c @@ -629,6 +629,10 @@ static uint64_t psi_p9_irq_attributes(struct irq_source *is __unused, if (is_lpc_serirq) return lpc_get_irq_policy(psi->chip_id, idx - P9_PSI_IRQ_LPC_SIRQ0); + if (idx == P9_PSI_IRQ_EXTERNAL) + if (psi_ext_irq_policy == EXTERNAL_IRQ_POLICY_LINUX) + return IRQ_ATTR_TARGET_LINUX | IRQ_ATTR_TYPE_LSI; + return IRQ_ATTR_TARGET_OPAL | IRQ_ATTR_TYPE_LSI; } From patchwork Thu Sep 5 03:08:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1158187 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46P5Kc47pLz9s3Z for ; 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Wed, 04 Sep 2019 20:09:04 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Thu, 5 Sep 2019 13:08:45 +1000 Message-Id: <20190905030845.15540-5-oohall@gmail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190905030845.15540-1-oohall@gmail.com> References: <20190905030845.15540-1-oohall@gmail.com> MIME-Version: 1.0 Subject: [Skiboot] [PATCH v2 5/5] platform/astbmc: Only send external IRQs to OPAL if there is a handler X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" If the platform hasn't defined an external IRQ handler then we should leave it directed at the OS. The OS can mask it if it wants to. Signed-off-by: Oliver O'Halloran Reviewed-by: Cédric Le Goater --- platforms/astbmc/common.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/platforms/astbmc/common.c b/platforms/astbmc/common.c index 85043f3b91e7..1f8a3f82c358 100644 --- a/platforms/astbmc/common.c +++ b/platforms/astbmc/common.c @@ -465,8 +465,9 @@ void astbmc_early_init(void) /* Hostboot forgets to populate the PSI BAR */ astbmc_fixup_psi_bar(); - /* Send external interrupts to me */ - psi_set_external_irq_policy(EXTERNAL_IRQ_POLICY_SKIBOOT); + /* Send external interrupts to me if the platform can handle them */ + if (platform.external_irq) + psi_set_external_irq_policy(EXTERNAL_IRQ_POLICY_SKIBOOT); if (ast_sio_init()) { if (ast_io_init()) {