From patchwork Thu Aug 1 14:44:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcelo Henrique Cerri X-Patchwork-Id: 1140522 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=canonical.com Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45ztNX0VChz9sN4; Fri, 2 Aug 2019 00:44:27 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1htCJY-0006p5-VP; Thu, 01 Aug 2019 14:44:20 +0000 Received: from youngberry.canonical.com ([91.189.89.112]) by huckleberry.canonical.com with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:128) (Exim 4.86_2) (envelope-from ) id 1htCJX-0006om-7c for kernel-team@lists.ubuntu.com; Thu, 01 Aug 2019 14:44:19 +0000 Received: from mail-qt1-f197.google.com ([209.85.160.197]) by youngberry.canonical.com with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.76) (envelope-from ) id 1htCJW-0005D7-OG for kernel-team@lists.ubuntu.com; Thu, 01 Aug 2019 14:44:18 +0000 Received: by mail-qt1-f197.google.com with SMTP id r58so64898581qtb.5 for ; Thu, 01 Aug 2019 07:44:18 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=dKF260tBEqN7ZuxrhKF2dLPUTrUlulj3yJiTHGVEnvM=; b=fKu8ykExQDPbl6rF3tU8thE/PyOx2OE9eMcysi32zZvYjOcU6Ilc15gQkmLgC0Hllv MrsP7D9gXGAPQeTlOzCgHaU56kbDdiPjwMIWVFFYXazrUzU7UDawtIM6TaBgpQsLE6SJ TSYL52enoCz6AW7wRQU33xVYnQSwFYFgIitF+qlpzFF3BrVziPDTfxAzF2QqPBt4yGam PEzoHMyH8IBhIzUc1+WRfZge+5dOExpSgkSYKz3cTC+UW/YsEPEqqAAeJGoxvaWHnWN8 u02KMsOi2H/uP7tex0G90BC9O1q0j5Ek/TNfRoRngbKIIUHJ+K+uqZwz/u1TUPZVhY+u 4qHA== X-Gm-Message-State: APjAAAXGA9xG73R5DaX13HKDZfGRR6A67ffwuhTUCAvCDcExF8V5ZFEJ i+k2RuS3YHMWNSwsdLACW3/Oo5fdFjoKa0pqa+mJ92rfGk4kODUe4Etxtr9HdwxzizFE2VgW/sO iW2eAB4ABGcmwuNDr66sG9VXaoL0JvviiOx9irgfS X-Received: by 2002:ac8:394b:: with SMTP id t11mr89117377qtb.286.1564670657371; Thu, 01 Aug 2019 07:44:17 -0700 (PDT) X-Google-Smtp-Source: APXvYqz0aSlCA7o+se05McfhIzTp1g2f3n1yG7lujUMk9LF41QVM4Ny8j8gywweU4TnTjBMatTpPpg== X-Received: by 2002:ac8:394b:: with SMTP id t11mr89117357qtb.286.1564670657090; Thu, 01 Aug 2019 07:44:17 -0700 (PDT) Received: from gallifrey.lan ([2804:14c:4e3:5580:95b:d92c:6741:356e]) by smtp.gmail.com with ESMTPSA id m44sm38273763qtm.54.2019.08.01.07.44.15 for (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Thu, 01 Aug 2019 07:44:16 -0700 (PDT) From: Marcelo Henrique Cerri To: kernel-team@lists.ubuntu.com Subject: [d/azure][PATCH 1/5] x86/Hyper-V: Set x2apic destination mode to physical when x2apic is available Date: Thu, 1 Aug 2019 11:44:05 -0300 Message-Id: <20190801144409.10744-2-marcelo.cerri@canonical.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190801144409.10744-1-marcelo.cerri@canonical.com> References: <20190801144409.10744-1-marcelo.cerri@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Lan Tianyu BugLink: https://bugs.launchpad.net/bugs/1826447 Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic, set x2apic destination mode to physcial mode when x2apic is available and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs have 8-bit APIC id. Reviewed-by: Thomas Gleixner Reviewed-by: Michael Kelley Signed-off-by: Lan Tianyu Signed-off-by: Joerg Roedel (cherry picked from commit 84fdfafab849036b5aefa52824b5cb42e887ef0e) Signed-off-by: Marcelo Henrique Cerri --- arch/x86/kernel/cpu/mshyperv.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c index e81a2db42df7..3fa238a137d2 100644 --- a/arch/x86/kernel/cpu/mshyperv.c +++ b/arch/x86/kernel/cpu/mshyperv.c @@ -328,6 +328,18 @@ static void __init ms_hyperv_init_platform(void) # ifdef CONFIG_SMP smp_ops.smp_prepare_boot_cpu = hv_smp_prepare_boot_cpu; # endif + + /* + * Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic, + * set x2apic destination mode to physcial mode when x2apic is available + * and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs + * have 8-bit APIC id. + */ +# ifdef CONFIG_X86_X2APIC + if (x2apic_supported()) + x2apic_phys = 1; +# endif + #endif } From patchwork Thu Aug 1 14:44:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcelo Henrique Cerri X-Patchwork-Id: 1140523 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=canonical.com Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45ztNX2q9Tz9sNf; Fri, 2 Aug 2019 00:44:27 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1htCJb-0006qk-3J; Thu, 01 Aug 2019 14:44:23 +0000 Received: from youngberry.canonical.com ([91.189.89.112]) by huckleberry.canonical.com with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:128) (Exim 4.86_2) (envelope-from ) id 1htCJZ-0006pK-Im for kernel-team@lists.ubuntu.com; Thu, 01 Aug 2019 14:44:21 +0000 Received: from mail-qk1-f199.google.com ([209.85.222.199]) by youngberry.canonical.com with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.76) (envelope-from ) id 1htCJZ-0005DP-2T for kernel-team@lists.ubuntu.com; Thu, 01 Aug 2019 14:44:21 +0000 Received: by mail-qk1-f199.google.com with SMTP id l14so61330919qke.16 for ; Thu, 01 Aug 2019 07:44:21 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=XibX7eAAfjvdfzhIy3p193CoMjTsCwcADt2EH+6QBys=; b=GUbRHv43A08iGS2lxQAyCaR5D4moDw7QVwJYtzZpszUxotlWPkFWi0fNoHFg7rgspm tnBIAgFUyKsbg/S31LgCl/BJlYdees9oBnCIpjDNV9Ca0IY431SO8o7O62U7+T8V0PE5 uDsrFmNCKOdND5k7fDcZa9JWmBJXludSYwiu8Palz9A9+4qqpuJAiz/f545vwTiI9USr lAZ0XKtVevdvzb9oexXsg14MfAXLmESAHXt5bAIkx0Vsm5pR0KfQc3SVTF26JVnHOLlt nor4KHOgvSuoDtLgVLpFmmcopgVqoQ0DbW3pbjQ5M0UOohQF+CKMgaCIjyAFASDhHzV5 66aw== X-Gm-Message-State: APjAAAV37QPYOfctwb1Z7rK2T9wAlmvGHUzqWEorMpUHozz+yssflXYl 69Ipis9sSqLee11/lgsS4S/6n/pHbFNOLeGsZMWAYTa4x6/5Bxph1XCENsvtqk9Wt8yM1fQClI6 ZfWed/keyhsFc+J2yg8NyY+EBVyeLCjuzkmEBt37F X-Received: by 2002:ac8:18f0:: with SMTP id o45mr89836718qtk.273.1564670659649; Thu, 01 Aug 2019 07:44:19 -0700 (PDT) X-Google-Smtp-Source: APXvYqymeMMojg1Jo26+WzZEBrXLCfWsKv2Cd1uFyiAD27r/FiJwhd2Qw4b4tU3Bf5xy2VMqIxZIgQ== X-Received: by 2002:ac8:18f0:: with SMTP id o45mr89836693qtk.273.1564670659308; Thu, 01 Aug 2019 07:44:19 -0700 (PDT) Received: from gallifrey.lan ([2804:14c:4e3:5580:95b:d92c:6741:356e]) by smtp.gmail.com with ESMTPSA id m44sm38273763qtm.54.2019.08.01.07.44.17 for (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Thu, 01 Aug 2019 07:44:18 -0700 (PDT) From: Marcelo Henrique Cerri To: kernel-team@lists.ubuntu.com Subject: [d/azure][PATCH 2/5] iommu/hyper-v: Add Hyper-V stub IOMMU driver Date: Thu, 1 Aug 2019 11:44:06 -0300 Message-Id: <20190801144409.10744-3-marcelo.cerri@canonical.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190801144409.10744-1-marcelo.cerri@canonical.com> References: <20190801144409.10744-1-marcelo.cerri@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Lan Tianyu BugLink: https://bugs.launchpad.net/bugs/1826447 On the bare metal, enabling X2APIC mode requires interrupt remapping function which helps to deliver irq to cpu with 32-bit APIC ID. Hyper-V doesn't provide interrupt remapping function so far and Hyper-V MSI protocol already supports to deliver interrupt to the CPU whose virtual processor index is more than 255. IO-APIC interrupt still has 8-bit APIC ID limitation. This patch is to add Hyper-V stub IOMMU driver in order to enable X2APIC mode successfully in Hyper-V Linux guest. The driver returns X2APIC interrupt remapping capability when X2APIC mode is available. Otherwise, it creates a Hyper-V irq domain to limit IO-APIC interrupts' affinity and make sure cpus assigned with IO-APIC interrupt have 8-bit APIC ID. Define 24 IO-APIC remapping entries because Hyper-V only expose one single IO-APIC and one IO-APIC has 24 pins according IO-APIC spec( https://pdos.csail.mit.edu/6.828/2016/readings/ia32/ioapic.pdf). Reviewed-by: Michael Kelley Signed-off-by: Lan Tianyu Signed-off-by: Joerg Roedel (cherry picked from commit 29217a4746835fef35279abbd12c1a1efe83bfca) Signed-off-by: Marcelo Henrique Cerri --- drivers/iommu/Kconfig | 9 ++ drivers/iommu/Makefile | 1 + drivers/iommu/hyperv-iommu.c | 196 ++++++++++++++++++++++++++++++++++ drivers/iommu/irq_remapping.c | 3 + drivers/iommu/irq_remapping.h | 1 + 5 files changed, 210 insertions(+) create mode 100644 drivers/iommu/hyperv-iommu.c diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig index d9a25715650e..34b066541491 100644 --- a/drivers/iommu/Kconfig +++ b/drivers/iommu/Kconfig @@ -435,4 +435,13 @@ config QCOM_IOMMU help Support for IOMMU on certain Qualcomm SoCs. +config HYPERV_IOMMU + bool "Hyper-V x2APIC IRQ Handling" + depends on HYPERV + select IOMMU_API + default HYPERV + help + Stub IOMMU driver to handle IRQs as to allow Hyper-V Linux + guests to run with x2APIC mode enabled. + endif # IOMMU_SUPPORT diff --git a/drivers/iommu/Makefile b/drivers/iommu/Makefile index a158a68c8ea8..8c71a15e986b 100644 --- a/drivers/iommu/Makefile +++ b/drivers/iommu/Makefile @@ -32,3 +32,4 @@ obj-$(CONFIG_EXYNOS_IOMMU) += exynos-iommu.o obj-$(CONFIG_FSL_PAMU) += fsl_pamu.o fsl_pamu_domain.o obj-$(CONFIG_S390_IOMMU) += s390-iommu.o obj-$(CONFIG_QCOM_IOMMU) += qcom_iommu.o +obj-$(CONFIG_HYPERV_IOMMU) += hyperv-iommu.o diff --git a/drivers/iommu/hyperv-iommu.c b/drivers/iommu/hyperv-iommu.c new file mode 100644 index 000000000000..a386b83e0e34 --- /dev/null +++ b/drivers/iommu/hyperv-iommu.c @@ -0,0 +1,196 @@ +// SPDX-License-Identifier: GPL-2.0 + +/* + * Hyper-V stub IOMMU driver. + * + * Copyright (C) 2019, Microsoft, Inc. + * + * Author : Lan Tianyu + */ + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include "irq_remapping.h" + +#ifdef CONFIG_IRQ_REMAP + +/* + * According 82093AA IO-APIC spec , IO APIC has a 24-entry Interrupt + * Redirection Table. Hyper-V exposes one single IO-APIC and so define + * 24 IO APIC remmapping entries. + */ +#define IOAPIC_REMAPPING_ENTRY 24 + +static cpumask_t ioapic_max_cpumask = { CPU_BITS_NONE }; +static struct irq_domain *ioapic_ir_domain; + +static int hyperv_ir_set_affinity(struct irq_data *data, + const struct cpumask *mask, bool force) +{ + struct irq_data *parent = data->parent_data; + struct irq_cfg *cfg = irqd_cfg(data); + struct IO_APIC_route_entry *entry; + int ret; + + /* Return error If new irq affinity is out of ioapic_max_cpumask. */ + if (!cpumask_subset(mask, &ioapic_max_cpumask)) + return -EINVAL; + + ret = parent->chip->irq_set_affinity(parent, mask, force); + if (ret < 0 || ret == IRQ_SET_MASK_OK_DONE) + return ret; + + entry = data->chip_data; + entry->dest = cfg->dest_apicid; + entry->vector = cfg->vector; + send_cleanup_vector(cfg); + + return 0; +} + +static struct irq_chip hyperv_ir_chip = { + .name = "HYPERV-IR", + .irq_ack = apic_ack_irq, + .irq_set_affinity = hyperv_ir_set_affinity, +}; + +static int hyperv_irq_remapping_alloc(struct irq_domain *domain, + unsigned int virq, unsigned int nr_irqs, + void *arg) +{ + struct irq_alloc_info *info = arg; + struct irq_data *irq_data; + struct irq_desc *desc; + int ret = 0; + + if (!info || info->type != X86_IRQ_ALLOC_TYPE_IOAPIC || nr_irqs > 1) + return -EINVAL; + + ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg); + if (ret < 0) + return ret; + + irq_data = irq_domain_get_irq_data(domain, virq); + if (!irq_data) { + irq_domain_free_irqs_common(domain, virq, nr_irqs); + return -EINVAL; + } + + irq_data->chip = &hyperv_ir_chip; + + /* + * If there is interrupt remapping function of IOMMU, setting irq + * affinity only needs to change IRTE of IOMMU. But Hyper-V doesn't + * support interrupt remapping function, setting irq affinity of IO-APIC + * interrupts still needs to change IO-APIC registers. But ioapic_ + * configure_entry() will ignore value of cfg->vector and cfg-> + * dest_apicid when IO-APIC's parent irq domain is not the vector + * domain.(See ioapic_configure_entry()) In order to setting vector + * and dest_apicid to IO-APIC register, IO-APIC entry pointer is saved + * in the chip_data and hyperv_irq_remapping_activate()/hyperv_ir_set_ + * affinity() set vector and dest_apicid directly into IO-APIC entry. + */ + irq_data->chip_data = info->ioapic_entry; + + /* + * Hypver-V IO APIC irq affinity should be in the scope of + * ioapic_max_cpumask because no irq remapping support. + */ + desc = irq_data_to_desc(irq_data); + cpumask_copy(desc->irq_common_data.affinity, &ioapic_max_cpumask); + + return 0; +} + +static void hyperv_irq_remapping_free(struct irq_domain *domain, + unsigned int virq, unsigned int nr_irqs) +{ + irq_domain_free_irqs_common(domain, virq, nr_irqs); +} + +static int hyperv_irq_remapping_activate(struct irq_domain *domain, + struct irq_data *irq_data, bool reserve) +{ + struct irq_cfg *cfg = irqd_cfg(irq_data); + struct IO_APIC_route_entry *entry = irq_data->chip_data; + + entry->dest = cfg->dest_apicid; + entry->vector = cfg->vector; + + return 0; +} + +static struct irq_domain_ops hyperv_ir_domain_ops = { + .alloc = hyperv_irq_remapping_alloc, + .free = hyperv_irq_remapping_free, + .activate = hyperv_irq_remapping_activate, +}; + +static int __init hyperv_prepare_irq_remapping(void) +{ + struct fwnode_handle *fn; + int i; + + if (!hypervisor_is_type(X86_HYPER_MS_HYPERV) || + !x2apic_supported()) + return -ENODEV; + + fn = irq_domain_alloc_named_id_fwnode("HYPERV-IR", 0); + if (!fn) + return -ENOMEM; + + ioapic_ir_domain = + irq_domain_create_hierarchy(arch_get_ir_parent_domain(), + 0, IOAPIC_REMAPPING_ENTRY, fn, + &hyperv_ir_domain_ops, NULL); + + irq_domain_free_fwnode(fn); + + /* + * Hyper-V doesn't provide irq remapping function for + * IO-APIC and so IO-APIC only accepts 8-bit APIC ID. + * Cpu's APIC ID is read from ACPI MADT table and APIC IDs + * in the MADT table on Hyper-v are sorted monotonic increasingly. + * APIC ID reflects cpu topology. There maybe some APIC ID + * gaps when cpu number in a socket is not power of two. Prepare + * max cpu affinity for IOAPIC irqs. Scan cpu 0-255 and set cpu + * into ioapic_max_cpumask if its APIC ID is less than 256. + */ + for (i = min_t(unsigned int, num_possible_cpus() - 1, 255); i >= 0; i--) + if (cpu_physical_id(i) < 256) + cpumask_set_cpu(i, &ioapic_max_cpumask); + + return 0; +} + +static int __init hyperv_enable_irq_remapping(void) +{ + return IRQ_REMAP_X2APIC_MODE; +} + +static struct irq_domain *hyperv_get_ir_irq_domain(struct irq_alloc_info *info) +{ + if (info->type == X86_IRQ_ALLOC_TYPE_IOAPIC) + return ioapic_ir_domain; + else + return NULL; +} + +struct irq_remap_ops hyperv_irq_remap_ops = { + .prepare = hyperv_prepare_irq_remapping, + .enable = hyperv_enable_irq_remapping, + .get_ir_irq_domain = hyperv_get_ir_irq_domain, +}; + +#endif diff --git a/drivers/iommu/irq_remapping.c b/drivers/iommu/irq_remapping.c index b94ebd42edd8..81cf2908c531 100644 --- a/drivers/iommu/irq_remapping.c +++ b/drivers/iommu/irq_remapping.c @@ -103,6 +103,9 @@ int __init irq_remapping_prepare(void) else if (IS_ENABLED(CONFIG_AMD_IOMMU) && amd_iommu_irq_ops.prepare() == 0) remap_ops = &amd_iommu_irq_ops; + else if (IS_ENABLED(CONFIG_HYPERV_IOMMU) && + hyperv_irq_remap_ops.prepare() == 0) + remap_ops = &hyperv_irq_remap_ops; else return -ENOSYS; diff --git a/drivers/iommu/irq_remapping.h b/drivers/iommu/irq_remapping.h index 0afef6e43be4..f8609e9f1f5d 100644 --- a/drivers/iommu/irq_remapping.h +++ b/drivers/iommu/irq_remapping.h @@ -64,6 +64,7 @@ struct irq_remap_ops { extern struct irq_remap_ops intel_irq_remap_ops; extern struct irq_remap_ops amd_iommu_irq_ops; +extern struct irq_remap_ops hyperv_irq_remap_ops; #else /* CONFIG_IRQ_REMAP */ From patchwork Thu Aug 1 14:44:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcelo Henrique Cerri X-Patchwork-Id: 1140524 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; 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Thu, 01 Aug 2019 07:44:21 -0700 (PDT) X-Google-Smtp-Source: APXvYqzwmbdI+TlQskZricIKmHm2rn6+lL7QJCQnEoRxr7wWMoSGIHn2ESrx4CzPylZp8IkJebrfdQ== X-Received: by 2002:ac8:25e7:: with SMTP id f36mr90770004qtf.139.1564670661131; Thu, 01 Aug 2019 07:44:21 -0700 (PDT) Received: from gallifrey.lan ([2804:14c:4e3:5580:95b:d92c:6741:356e]) by smtp.gmail.com with ESMTPSA id m44sm38273763qtm.54.2019.08.01.07.44.19 for (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Thu, 01 Aug 2019 07:44:20 -0700 (PDT) From: Marcelo Henrique Cerri To: kernel-team@lists.ubuntu.com Subject: [d/azure][PATCH 3/5] PCI: hv: Replace hv_vp_set with hv_vpset Date: Thu, 1 Aug 2019 11:44:07 -0300 Message-Id: <20190801144409.10744-4-marcelo.cerri@canonical.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190801144409.10744-1-marcelo.cerri@canonical.com> References: <20190801144409.10744-1-marcelo.cerri@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Maya Nakamura BugLink: https://bugs.launchpad.net/bugs/1826447 Remove a duplicate definition of VP set (hv_vp_set) and use the common definition (hv_vpset) that is used in other places. Change the order of the members in struct hv_pcibus_device so that the declaration of retarget_msi_interrupt_params is the last member. Struct hv_vpset, which contains a flexible array, is nested two levels deep in struct hv_pcibus_device via retarget_msi_interrupt_params. Add a comment that retarget_msi_interrupt_params should be the last member of struct hv_pcibus_device. Signed-off-by: Maya Nakamura Signed-off-by: Lorenzo Pieralisi Reviewed-by: Michael Kelley Reviewed-by: Vitaly Kuznetsov Tested-by: Vitaly Kuznetsov (cherry picked from commit 9bc1174280ddf7693e8c29a8f1743809e987ac37) Signed-off-by: Marcelo Henrique Cerri --- drivers/pci/controller/pci-hyperv.c | 25 ++++++++++++------------- 1 file changed, 12 insertions(+), 13 deletions(-) diff --git a/drivers/pci/controller/pci-hyperv.c b/drivers/pci/controller/pci-hyperv.c index e5031266dd3a..b06b4f957ad2 100644 --- a/drivers/pci/controller/pci-hyperv.c +++ b/drivers/pci/controller/pci-hyperv.c @@ -393,12 +393,6 @@ struct hv_interrupt_entry { #define HV_VP_SET_BANK_COUNT_MAX 5 /* current implementation limit */ -struct hv_vp_set { - u64 format; /* 0 (HvGenericSetSparse4k) */ - u64 valid_banks; - u64 masks[HV_VP_SET_BANK_COUNT_MAX]; -}; - /* * flags for hv_device_interrupt_target.flags */ @@ -410,7 +404,7 @@ struct hv_device_interrupt_target { u32 flags; union { u64 vp_mask; - struct hv_vp_set vp_set; + struct hv_vpset vp_set; }; }; @@ -460,12 +454,16 @@ struct hv_pcibus_device { struct msi_controller msi_chip; struct irq_domain *irq_domain; - /* hypercall arg, must not cross page boundary */ - struct retarget_msi_interrupt retarget_msi_interrupt_params; - spinlock_t retarget_msi_interrupt_lock; struct workqueue_struct *wq; + + /* hypercall arg, must not cross page boundary */ + struct retarget_msi_interrupt retarget_msi_interrupt_params; + + /* + * Don't put anything here: retarget_msi_interrupt_params must be last + */ }; /* @@ -955,12 +953,13 @@ static void hv_irq_unmask(struct irq_data *data) */ params->int_target.flags |= HV_DEVICE_INTERRUPT_TARGET_PROCESSOR_SET; - params->int_target.vp_set.valid_banks = + params->int_target.vp_set.valid_bank_mask = (1ull << HV_VP_SET_BANK_COUNT_MAX) - 1; /* * var-sized hypercall, var-size starts after vp_mask (thus - * vp_set.format does not count, but vp_set.valid_banks does). + * vp_set.format does not count, but vp_set.valid_bank_mask + * does). */ var_size = 1 + HV_VP_SET_BANK_COUNT_MAX; @@ -974,7 +973,7 @@ static void hv_irq_unmask(struct irq_data *data) goto exit_unlock; } - params->int_target.vp_set.masks[cpu_vmbus / 64] |= + params->int_target.vp_set.bank_contents[cpu_vmbus / 64] |= (1ULL << (cpu_vmbus & 63)); } } else { From patchwork Thu Aug 1 14:44:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcelo Henrique Cerri X-Patchwork-Id: 1140525 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=canonical.com Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45ztNc44bjz9sBF; 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Thu, 01 Aug 2019 07:44:22 -0700 (PDT) From: Marcelo Henrique Cerri To: kernel-team@lists.ubuntu.com Subject: [d/azure][PATCH 4/5] PCI: hv: Refactor hv_irq_unmask() to use cpumask_to_vpset() Date: Thu, 1 Aug 2019 11:44:08 -0300 Message-Id: <20190801144409.10744-5-marcelo.cerri@canonical.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190801144409.10744-1-marcelo.cerri@canonical.com> References: <20190801144409.10744-1-marcelo.cerri@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Maya Nakamura BugLink: https://bugs.launchpad.net/bugs/1826447 Remove the duplicate implementation of cpumask_to_vpset() and use the shared implementation. Export hv_max_vp_index, which is required by cpumask_to_vpset(). Signed-off-by: Maya Nakamura Signed-off-by: Lorenzo Pieralisi Reviewed-by: Michael Kelley Reviewed-by: Vitaly Kuznetsov Tested-by: Vitaly Kuznetsov (cherry picked from commit c8ccf7599ddac5fa48e06104c44b24709e21eed5) Signed-off-by: Marcelo Henrique Cerri --- arch/x86/hyperv/hv_init.c | 1 + drivers/pci/controller/pci-hyperv.c | 38 +++++++++++++---------------- 2 files changed, 18 insertions(+), 21 deletions(-) diff --git a/arch/x86/hyperv/hv_init.c b/arch/x86/hyperv/hv_init.c index 0d7af42948e1..c9bd1b395a70 100644 --- a/arch/x86/hyperv/hv_init.c +++ b/arch/x86/hyperv/hv_init.c @@ -104,6 +104,7 @@ void __percpu **hyperv_pcpu_input_arg; EXPORT_SYMBOL_GPL(hyperv_pcpu_input_arg); u32 hv_max_vp_index; +EXPORT_SYMBOL_GPL(hv_max_vp_index); static int hv_cpu_init(unsigned int cpu) { diff --git a/drivers/pci/controller/pci-hyperv.c b/drivers/pci/controller/pci-hyperv.c index b06b4f957ad2..42af7f6a7c4c 100644 --- a/drivers/pci/controller/pci-hyperv.c +++ b/drivers/pci/controller/pci-hyperv.c @@ -391,8 +391,6 @@ struct hv_interrupt_entry { u32 data; }; -#define HV_VP_SET_BANK_COUNT_MAX 5 /* current implementation limit */ - /* * flags for hv_device_interrupt_target.flags */ @@ -908,12 +906,12 @@ static void hv_irq_unmask(struct irq_data *data) struct retarget_msi_interrupt *params; struct hv_pcibus_device *hbus; struct cpumask *dest; + cpumask_var_t tmp; struct pci_bus *pbus; struct pci_dev *pdev; unsigned long flags; u32 var_size = 0; - int cpu_vmbus; - int cpu; + int cpu, nr_bank; u64 res; dest = irq_data_get_effective_affinity_mask(data); @@ -953,29 +951,27 @@ static void hv_irq_unmask(struct irq_data *data) */ params->int_target.flags |= HV_DEVICE_INTERRUPT_TARGET_PROCESSOR_SET; - params->int_target.vp_set.valid_bank_mask = - (1ull << HV_VP_SET_BANK_COUNT_MAX) - 1; + + if (!alloc_cpumask_var(&tmp, GFP_ATOMIC)) { + res = 1; + goto exit_unlock; + } + + cpumask_and(tmp, dest, cpu_online_mask); + nr_bank = cpumask_to_vpset(¶ms->int_target.vp_set, tmp); + free_cpumask_var(tmp); + + if (nr_bank <= 0) { + res = 1; + goto exit_unlock; + } /* * var-sized hypercall, var-size starts after vp_mask (thus * vp_set.format does not count, but vp_set.valid_bank_mask * does). */ - var_size = 1 + HV_VP_SET_BANK_COUNT_MAX; - - for_each_cpu_and(cpu, dest, cpu_online_mask) { - cpu_vmbus = hv_cpu_number_to_vp_number(cpu); - - if (cpu_vmbus >= HV_VP_SET_BANK_COUNT_MAX * 64) { - dev_err(&hbus->hdev->device, - "too high CPU %d", cpu_vmbus); - res = 1; - goto exit_unlock; - } - - params->int_target.vp_set.bank_contents[cpu_vmbus / 64] |= - (1ULL << (cpu_vmbus & 63)); - } + var_size = 1 + nr_bank; } else { for_each_cpu_and(cpu, dest, cpu_online_mask) { params->int_target.vp_mask |= From patchwork Thu Aug 1 14:44:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcelo Henrique Cerri X-Patchwork-Id: 1140526 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; 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Thu, 01 Aug 2019 07:44:25 -0700 (PDT) X-Google-Smtp-Source: APXvYqwJcqmtZpoRiM64dHxVyF0fOu2n3QY/0OUfDig1U5GD7PZlyjQuJEGZ70MTVShp3U154Z1kqw== X-Received: by 2002:ad4:4423:: with SMTP id e3mr79634286qvt.145.1564670665482; Thu, 01 Aug 2019 07:44:25 -0700 (PDT) Received: from gallifrey.lan ([2804:14c:4e3:5580:95b:d92c:6741:356e]) by smtp.gmail.com with ESMTPSA id m44sm38273763qtm.54.2019.08.01.07.44.23 for (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Thu, 01 Aug 2019 07:44:24 -0700 (PDT) From: Marcelo Henrique Cerri To: kernel-team@lists.ubuntu.com Subject: [d/azure][PATCH 5/5] UBUNTU: [Config] linux-azure: CONFIG_HYPERV_IOMMU=y Date: Thu, 1 Aug 2019 11:44:09 -0300 Message-Id: <20190801144409.10744-6-marcelo.cerri@canonical.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190801144409.10744-1-marcelo.cerri@canonical.com> References: <20190801144409.10744-1-marcelo.cerri@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" BugLink: https://bugs.launchpad.net/bugs/1826447 Signed-off-by: Marcelo Henrique Cerri --- debian.azure/config/annotations | 3 +++ debian.azure/config/config.common.ubuntu | 1 + 2 files changed, 4 insertions(+) diff --git a/debian.azure/config/annotations b/debian.azure/config/annotations index 2a5a46b22adf..adb833d1024e 100644 --- a/debian.azure/config/annotations +++ b/debian.azure/config/annotations @@ -171,6 +171,9 @@ CONFIG_SATA_VITESSE mark note CONFIG_SATA_ZPODD mark note +CONFIG_HYPERV_IOMMU policy<{'amd64': 'y'}> +CONFIG_HYPERV_IOMMU mark note + # Changes made to the generic kernel that are not necessary in the Azure kernel CONFIG_REGULATOR_TWL4030 policy<{'amd64': '-'}> diff --git a/debian.azure/config/config.common.ubuntu b/debian.azure/config/config.common.ubuntu index 9991583a67ed..bba608e52d41 100644 --- a/debian.azure/config/config.common.ubuntu +++ b/debian.azure/config/config.common.ubuntu @@ -1874,6 +1874,7 @@ CONFIG_HYPERV=y CONFIG_HYPERVISOR_GUEST=y CONFIG_HYPERV_BALLOON=m CONFIG_HYPERV_INFINIBAND_ND=m +CONFIG_HYPERV_IOMMU=y CONFIG_HYPERV_KEYBOARD=m CONFIG_HYPERV_NET=m CONFIG_HYPERV_STORAGE=y