From patchwork Wed Jul 31 15:47:46 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Saenz Julienne X-Patchwork-Id: 1139820 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=suse.de Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45zHs35ryMz9sQv for ; Thu, 1 Aug 2019 01:48:39 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730249AbfGaPsK (ORCPT ); Wed, 31 Jul 2019 11:48:10 -0400 Received: from mx2.suse.de ([195.135.220.15]:50094 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1730240AbfGaPsG (ORCPT ); Wed, 31 Jul 2019 11:48:06 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 01F74AFE4; Wed, 31 Jul 2019 15:48:04 +0000 (UTC) From: Nicolas Saenz Julienne To: catalin.marinas@arm.com, hch@lst.de, wahrenst@gmx.net, marc.zyngier@arm.com, Robin Murphy , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, iommu@lists.linux-foundation.org, linux-mm@kvack.org, Rob Herring , Frank Rowand Cc: phill@raspberryi.org, f.fainelli@gmail.com, will@kernel.org, linux-kernel@vger.kernel.org, eric@anholt.net, mbrugger@suse.com, nsaenzjulienne@suse.de, akpm@linux-foundation.org, m.szyprowski@samsung.com, linux-rpi-kernel@lists.infradead.org Subject: [PATCH 3/8] of/fdt: add function to get the SoC wide DMA addressable memory size Date: Wed, 31 Jul 2019 17:47:46 +0200 Message-Id: <20190731154752.16557-4-nsaenzjulienne@suse.de> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190731154752.16557-1-nsaenzjulienne@suse.de> References: <20190731154752.16557-1-nsaenzjulienne@suse.de> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Some SoCs might have multiple interconnects each with their own DMA addressing limitations. This function parses the 'dma-ranges' on each of them and tries to guess the maximum SoC wide DMA addressable memory size. This is specially useful for arch code in order to properly setup CMA and memory zones. Signed-off-by: Nicolas Saenz Julienne --- drivers/of/fdt.c | 72 ++++++++++++++++++++++++++++++++++++++++++ include/linux/of_fdt.h | 2 ++ 2 files changed, 74 insertions(+) diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c index 9cdf14b9aaab..f2444c61a136 100644 --- a/drivers/of/fdt.c +++ b/drivers/of/fdt.c @@ -953,6 +953,78 @@ int __init early_init_dt_scan_chosen_stdout(void) } #endif +/** + * early_init_dt_dma_zone_size - Look at all 'dma-ranges' and provide the + * maximum common dmable memory size. + * + * Some devices might have multiple interconnects each with their own DMA + * addressing limitations. For example the Raspberry Pi 4 has the following: + * + * soc { + * dma-ranges = <0xc0000000 0x0 0x00000000 0x3c000000>; + * [...] + * } + * + * v3dbus { + * dma-ranges = <0x00000000 0x0 0x00000000 0x3c000000>; + * [...] + * } + * + * scb { + * dma-ranges = <0x0 0x00000000 0x0 0x00000000 0xfc000000>; + * [...] + * } + * + * Here the area addressable by all devices is [0x00000000-0x3bffffff]. Hence + * the function will write in 'data' a size of 0x3c000000. + * + * Note that the implementation assumes all interconnects have the same physical + * memory view and that the mapping always start at the beginning of RAM. + */ +int __init early_init_dt_dma_zone_size(unsigned long node, const char *uname, + int depth, void *data) +{ + const char *type = of_get_flat_dt_prop(node, "device_type", NULL); + u64 phys_addr, dma_addr, size; + u64 *dma_zone_size = data; + int dma_addr_cells; + const __be32 *reg; + const void *prop; + int len; + + if (depth == 0) + *dma_zone_size = 0; + + /* + * We avoid pci host controllers as they have their own way of using + * 'dma-ranges'. + */ + if (type && !strcmp(type, "pci")) + return 0; + + reg = of_get_flat_dt_prop(node, "dma-ranges", &len); + if (!reg) + return 0; + + prop = of_get_flat_dt_prop(node, "#address-cells", NULL); + if (prop) + dma_addr_cells = be32_to_cpup(prop); + else + dma_addr_cells = 1; /* arm64's default addr_cell size */ + + if (len < (dma_addr_cells + dt_root_addr_cells + dt_root_size_cells)) + return 0; + + dma_addr = dt_mem_next_cell(dma_addr_cells, ®); + phys_addr = dt_mem_next_cell(dt_root_addr_cells, ®); + size = dt_mem_next_cell(dt_root_size_cells, ®); + + if (!*dma_zone_size || *dma_zone_size > size) + *dma_zone_size = size; + + return 0; +} + /** * early_init_dt_scan_root - fetch the top level address and size cells */ diff --git a/include/linux/of_fdt.h b/include/linux/of_fdt.h index acf820e88952..2ad36b7bd4fa 100644 --- a/include/linux/of_fdt.h +++ b/include/linux/of_fdt.h @@ -72,6 +72,8 @@ extern int early_init_dt_reserve_memory_arch(phys_addr_t base, phys_addr_t size, bool no_map); extern u64 dt_mem_next_cell(int s, const __be32 **cellp); +extern int early_init_dt_dma_zone_size(unsigned long node, const char *uname, + int depth, void *data); /* Early flat tree scan hooks */ extern int early_init_dt_scan_root(unsigned long node, const char *uname, int depth, void *data);