From patchwork Mon Jul 29 15:31:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Kyrill Tkachov X-Patchwork-Id: 1138494 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-505768-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=foss.arm.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="VeIinoBz"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45y3ZF4YXKz9s7T for ; Tue, 30 Jul 2019 01:31:31 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to :from:subject:message-id:date:mime-version:content-type; q=dns; s=default; b=U1Abf3CvKMh1ic2zlsSqqvBTUBoR2DcsObTTmJfN9Qp6OsvUEn xIsR7as0sdfSdK00BB6uU/SYkFSv719EfkXQsxjAsXNQgIJcQma3WzVpohCCynuN NVqgvjlfHUV78rP85y9FNOYKhH24T8uXLC903xswlSeceAMsuzEGSiFe4= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to :from:subject:message-id:date:mime-version:content-type; s= default; bh=n8xGp+G71LWL/v2WripK1ILQ9zU=; b=VeIinoBzOZDkWm91XGlv +ixrJuJU4QCl47ZQc+vc9Hr4+bavirAbSa2WAxFVadAP/dLAsPxxqMIMaaef5w6U ua+0tKSvhMq98xZA/V4Q2XL6RZpZbTsWZtD7nT2qWLdb4jZWy0NEWZyvV6zhs+5H P7Es/nP8xCJgBblGcxaXHEc= Received: (qmail 59108 invoked by alias); 29 Jul 2019 15:31:25 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 59100 invoked by uid 89); 29 Jul 2019 15:31:24 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-16.7 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3 autolearn=ham version=3.3.1 spammy= X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.110.172) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 29 Jul 2019 15:31:22 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7983A337 for ; Mon, 29 Jul 2019 08:31:20 -0700 (PDT) Received: from [10.2.206.47] (e120808-lin.cambridge.arm.com [10.2.206.47]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3D8BB3F694 for ; Mon, 29 Jul 2019 08:31:20 -0700 (PDT) To: "gcc-patches@gcc.gnu.org" From: Kyrill Tkachov Subject: [PATCH][arm][committed] Make ACLE builtins use arm_* namespace for expanders Message-ID: <3e2fdf85-dd8b-7c52-4820-3a87d8474097@foss.arm.com> Date: Mon, 29 Jul 2019 16:31:19 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.7.1 MIME-Version: 1.0 Hi all, The builtins from use fairly general expander names such as "crc", "mcr" etc. These run the risk of being reserved by the midend in the future. Let's namespace them to arm_* as is convention. Bootstrapped and tested on arm-none-linux-gnueabihf. Committing to trunk. Thanks, Kyrill 2019-07-29  Kyrylo Tkachov      * config/arm/arm-builtins.c (acle_builtin_data): Expand VAR1 to     CODE_FOR_arm_##.     * config/arm/arm.md (): Rename to...     (arm_): ... This.     (): Rename to...     (arm_): ... This.     (): Rename to...     (arm_): ... This.     (): Rename to...     (arm_): ... This.     (): Rename to...     (arm_): ... This.     (): Rename to...     (arm_): ... This.     (): Rename to...     (arm_): ... This.     (): Rename to...     (arm_): ... This. diff --git a/gcc/config/arm/arm-builtins.c b/gcc/config/arm/arm-builtins.c index 8f2c93743792bbf8ee9a421c408501b3a3051b2b..07da55e10a36fd50adbac9b69eb9c77c6513465f 100644 --- a/gcc/config/arm/arm-builtins.c +++ b/gcc/config/arm/arm-builtins.c @@ -376,7 +376,7 @@ static arm_builtin_datum neon_builtin_data[] = #undef CF #undef VAR1 #define VAR1(T, N, A) \ - {#N, UP (A), CODE_FOR_##N, 0, T##_QUALIFIERS}, + {#N, UP (A), CODE_FOR_arm_##N, 0, T##_QUALIFIERS}, static arm_builtin_datum acle_builtin_data[] = { diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index f11745ba855957da4acec197f2df9c931708062a..0cc1f6e46c5ff703391403f8919279d6f71143ba 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -12081,7 +12081,7 @@ (set_attr "predicable" "yes")]) ;; ARMv8 CRC32 instructions. -(define_insn "" +(define_insn "arm_" [(set (match_operand:SI 0 "s_register_operand" "=r") (unspec:SI [(match_operand:SI 1 "s_register_operand" "r") (match_operand: 2 "s_register_operand" "r")] @@ -12197,7 +12197,7 @@ DONE; }) -(define_insn "" +(define_insn "arm_" [(unspec_volatile [(match_operand:SI 0 "immediate_operand" "n") (match_operand:SI 1 "immediate_operand" "n") (match_operand:SI 2 "immediate_operand" "n") @@ -12243,19 +12243,19 @@ [(set_attr "length" "4") (set_attr "type" "coproc")]) -(define_expand "" +(define_expand "arm_" [(unspec_volatile [(match_operand:SI 0 "immediate_operand") (match_operand:SI 1 "immediate_operand") (mem:SI (match_operand:SI 2 "s_register_operand"))] LDCI)] "arm_coproc_builtin_available (VUNSPEC_)") -(define_expand "" +(define_expand "arm_" [(unspec_volatile [(match_operand:SI 0 "immediate_operand") (match_operand:SI 1 "immediate_operand") (mem:SI (match_operand:SI 2 "s_register_operand"))] STCI)] "arm_coproc_builtin_available (VUNSPEC_)") -(define_insn "" +(define_insn "arm_" [(unspec_volatile [(match_operand:SI 0 "immediate_operand" "n") (match_operand:SI 1 "immediate_operand" "n") (match_operand:SI 2 "s_register_operand" "r") @@ -12275,7 +12275,7 @@ [(set_attr "length" "4") (set_attr "type" "coproc")]) -(define_insn "" +(define_insn "arm_" [(set (match_operand:SI 0 "s_register_operand" "=r") (unspec_volatile:SI [(match_operand:SI 1 "immediate_operand" "n") (match_operand:SI 2 "immediate_operand" "n") @@ -12294,7 +12294,7 @@ [(set_attr "length" "4") (set_attr "type" "coproc")]) -(define_insn "" +(define_insn "arm_" [(unspec_volatile [(match_operand:SI 0 "immediate_operand" "n") (match_operand:SI 1 "immediate_operand" "n") (match_operand:DI 2 "s_register_operand" "r") @@ -12310,7 +12310,7 @@ [(set_attr "length" "4") (set_attr "type" "coproc")]) -(define_insn "" +(define_insn "arm_" [(set (match_operand:DI 0 "s_register_operand" "=r") (unspec_volatile:DI [(match_operand:SI 1 "immediate_operand" "n") (match_operand:SI 2 "immediate_operand" "n")