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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Sun, 21 Jul 2019 10:06:33 +0100 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp23032.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x6L96WAO50528734 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Sun, 21 Jul 2019 09:06:32 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D7992AC05E; Sun, 21 Jul 2019 09:06:32 +0000 (GMT) Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A34C8AC059; Sun, 21 Jul 2019 09:06:32 +0000 (GMT) Received: from oc3272150783.ibm.com (unknown [9.85.180.122]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTPS; Sun, 21 Jul 2019 09:06:32 +0000 (GMT) To: gcc-patches@gcc.gnu.org, Segher Boessenkool From: Paul Clarke Subject: [rs6000] Add documentation for __builtin_mtfsf Date: Sun, 21 Jul 2019 04:06:32 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.7.2 MIME-Version: 1.0 x-cbid: 19072109-2213-0000-0000-000003B3926D X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00011468; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000287; SDB=6.01235278; UDB=6.00650970; IPR=6.01016617; MB=3.00027827; MTD=3.00000008; XFM=3.00000015; UTC=2019-07-21 09:06:34 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19072109-2214-0000-0000-00005F5416F5 Message-Id: <1dc0a981-b005-60fb-6df3-ab775d7142fd@us.ibm.com> 2019-07-21 Paul A. Clarke [gcc] * doc/extend.texi: Add documentation for __builtin_mtfsf. --- PC Index: gcc/doc/extend.texi =================================================================== --- gcc/doc/extend.texi (revision 273615) +++ gcc/doc/extend.texi (working copy) @@ -16848,6 +16848,7 @@ unsigned long __builtin_ppc_mftb (); double __builtin_unpack_ibm128 (__ibm128, int); __ibm128 __builtin_pack_ibm128 (double, double); double __builtin_mffs (void); +double __builtin_mtfsf (const int, double); void __builtin_mtfsb0 (const int); void __builtin_mtfsb1 (const int); void __builtin_set_fpscr_rn (int); @@ -16864,6 +16865,10 @@ return the value of the FPSCR register. Note, ISA @code{__builtin_mffsl()} which permits software to read the control and non-sticky status bits in the FSPCR without the higher latency associated with accessing the sticky status bits. The +@code{__builtin_mtfsf} takes a constant 8-bit integer field mask and a +representation of the new value of the FPSCR and generates the @code{mtfsf} +instruction to copy the supplied value into the FPSCR, subject to the field +mask, each bit of which represents a nibble of the FPSCR. The @code{__builtin_mtfsb0} and @code{__builtin_mtfsb1} take the bit to change as an argument. The valid bit range is between 0 and 31. The builtins map to the @code{mtfsb0} and @code{mtfsb1} instructions which take the argument and