From patchwork Mon Jun 17 11:45:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudarsana Reddy Kalluru X-Patchwork-Id: 1116957 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=marvell.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=marvell.com header.i=@marvell.com header.b="EllgMjl8"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45S8YT1KdBz9sN4 for ; Mon, 17 Jun 2019 21:46:05 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726514AbfFQLqE (ORCPT ); Mon, 17 Jun 2019 07:46:04 -0400 Received: from mx0a-0016f401.pphosted.com ([67.231.148.174]:44004 "EHLO mx0b-0016f401.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725763AbfFQLqE (ORCPT ); Mon, 17 Jun 2019 07:46:04 -0400 Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x5HBihKs027792; Mon, 17 Jun 2019 04:46:00 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0818; bh=cTc1rA6ozewh9fGy71dQ6chbieKop+eVPXH+yA7/QOY=; b=EllgMjl8TgyZARHbCtuLPsgd2pkzbwbN9W1k7Ijd84HPMjHEGvZ4MzaYeq9IO4FIy0Fb 4fxQ+P5ZK5QR2wdhm1FkgtKgik+wa+ZN4yI2BUzI/yroAtZAfsmz7vXpQtv1loK5zekE 29pogbX4HfL+ssr0TvCBXy7/OhfQjrHW+7T3G0gclAzQcAFdrjk0S7F40112LDeVgBIp vO8Df8oMKuiE/BBDAXb8d2NwGLvkvNG6dnE3/p3SUgvrhfqyTZe6ybQP2yvviHqaowup 5krloDkDkeTS6CXRG6I4Cy3Xw13mEYqBgIJpbb7pLV6rzg/P3az//EmAyzZ41qXL1yXX 0A== Received: from sc-exch04.marvell.com ([199.233.58.184]) by mx0a-0016f401.pphosted.com with ESMTP id 2t68rp8ahw-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 17 Jun 2019 04:46:00 -0700 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH04.marvell.com (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Mon, 17 Jun 2019 04:45:59 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Mon, 17 Jun 2019 04:45:59 -0700 Received: from dut1171.mv.qlogic.com (unknown [10.112.88.18]) by maili.marvell.com (Postfix) with ESMTP id 289CF3F703F; Mon, 17 Jun 2019 04:45:59 -0700 (PDT) Received: from dut1171.mv.qlogic.com (localhost [127.0.0.1]) by dut1171.mv.qlogic.com (8.14.7/8.14.7) with ESMTP id x5HBjxx0017135; Mon, 17 Jun 2019 04:45:59 -0700 Received: (from root@localhost) by dut1171.mv.qlogic.com (8.14.7/8.14.7/Submit) id x5HBjwu5017134; Mon, 17 Jun 2019 04:45:58 -0700 From: Sudarsana Reddy Kalluru To: CC: , , Subject: [PATCH net-next 1/4] qed: Add APIs for device attributes configuration. Date: Mon, 17 Jun 2019 04:45:25 -0700 Message-ID: <20190617114528.17086-2-skalluru@marvell.com> X-Mailer: git-send-email 2.12.0 In-Reply-To: <20190617114528.17086-1-skalluru@marvell.com> References: <20190617114528.17086-1-skalluru@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-17_06:, , signatures=0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The patch adds APIs for reading/configuring the device attributes using mailbox interfaces. Signed-off-by: Sudarsana Reddy Kalluru Signed-off-by: Ariel Elior --- drivers/net/ethernet/qlogic/qed/qed_hsi.h | 20 ++++++++++ drivers/net/ethernet/qlogic/qed/qed_mcp.c | 64 +++++++++++++++++++++++++++++++ drivers/net/ethernet/qlogic/qed/qed_mcp.h | 14 +++++++ 3 files changed, 98 insertions(+) diff --git a/drivers/net/ethernet/qlogic/qed/qed_hsi.h b/drivers/net/ethernet/qlogic/qed/qed_hsi.h index e054f6c..5091f5b1 100644 --- a/drivers/net/ethernet/qlogic/qed/qed_hsi.h +++ b/drivers/net/ethernet/qlogic/qed/qed_hsi.h @@ -12580,6 +12580,8 @@ struct public_drv_mb { #define DRV_MSG_CODE_BW_UPDATE_ACK 0x32000000 #define DRV_MSG_CODE_NIG_DRAIN 0x30000000 #define DRV_MSG_CODE_S_TAG_UPDATE_ACK 0x3b000000 +#define DRV_MSG_CODE_GET_NVM_CFG_OPTION 0x003e0000 +#define DRV_MSG_CODE_SET_NVM_CFG_OPTION 0x003f0000 #define DRV_MSG_CODE_INITIATE_PF_FLR 0x02010000 #define DRV_MSG_CODE_VF_DISABLED_DONE 0xc0000000 #define DRV_MSG_CODE_CFG_VF_MSIX 0xc0010000 @@ -12748,6 +12750,21 @@ struct public_drv_mb { #define DRV_MB_PARAM_FEATURE_SUPPORT_PORT_EEE 0x00000002 #define DRV_MB_PARAM_FEATURE_SUPPORT_FUNC_VLINK 0x00010000 +#define DRV_MB_PARAM_NVM_CFG_OPTION_ID_SHIFT 0 +#define DRV_MB_PARAM_NVM_CFG_OPTION_ID_MASK 0x0000FFFF +#define DRV_MB_PARAM_NVM_CFG_OPTION_ALL_SHIFT 16 +#define DRV_MB_PARAM_NVM_CFG_OPTION_ALL_MASK 0x00010000 +#define DRV_MB_PARAM_NVM_CFG_OPTION_INIT_SHIFT 17 +#define DRV_MB_PARAM_NVM_CFG_OPTION_INIT_MASK 0x00020000 +#define DRV_MB_PARAM_NVM_CFG_OPTION_COMMIT_SHIFT 18 +#define DRV_MB_PARAM_NVM_CFG_OPTION_COMMIT_MASK 0x00040000 +#define DRV_MB_PARAM_NVM_CFG_OPTION_FREE_SHIFT 19 +#define DRV_MB_PARAM_NVM_CFG_OPTION_FREE_MASK 0x00080000 +#define DRV_MB_PARAM_NVM_CFG_OPTION_ENTITY_SEL_SHIFT 20 +#define DRV_MB_PARAM_NVM_CFG_OPTION_ENTITY_SEL_MASK 0x00100000 +#define DRV_MB_PARAM_NVM_CFG_OPTION_ENTITY_ID_SHIFT 24 +#define DRV_MB_PARAM_NVM_CFG_OPTION_ENTITY_ID_MASK 0x0f000000 + u32 fw_mb_header; #define FW_MSG_CODE_MASK 0xffff0000 #define FW_MSG_CODE_UNSUPPORTED 0x00000000 @@ -13319,6 +13336,9 @@ enum spad_sections { SPAD_SECTION_MAX }; +#define NVM_CFG_ID_MAC_ADDRESS 1 +#define NVM_CFG_ID_MF_MODE 9 + #define MCP_TRACE_SIZE 2048 /* 2kb */ /* This section is located at a fixed location in the beginning of the diff --git a/drivers/net/ethernet/qlogic/qed/qed_mcp.c b/drivers/net/ethernet/qlogic/qed/qed_mcp.c index 758702c..573911a 100644 --- a/drivers/net/ethernet/qlogic/qed/qed_mcp.c +++ b/drivers/net/ethernet/qlogic/qed/qed_mcp.c @@ -3750,3 +3750,67 @@ int qed_mcp_get_ppfid_bitmap(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) return 0; } + +int qed_mcp_nvm_get_cfg(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, + u16 option_id, u8 entity_id, u16 flags, u8 *p_buf, + u32 *p_len) +{ + u32 mb_param = 0, resp, param; + int rc; + + QED_MFW_SET_FIELD(mb_param, DRV_MB_PARAM_NVM_CFG_OPTION_ID, option_id); + if (flags & QED_NVM_CFG_OPTION_INIT) + QED_MFW_SET_FIELD(mb_param, + DRV_MB_PARAM_NVM_CFG_OPTION_INIT, 1); + if (flags & QED_NVM_CFG_OPTION_FREE) + QED_MFW_SET_FIELD(mb_param, + DRV_MB_PARAM_NVM_CFG_OPTION_FREE, 1); + if (flags & QED_NVM_CFG_OPTION_ENTITY_SEL) { + QED_MFW_SET_FIELD(mb_param, + DRV_MB_PARAM_NVM_CFG_OPTION_ENTITY_SEL, 1); + QED_MFW_SET_FIELD(mb_param, + DRV_MB_PARAM_NVM_CFG_OPTION_ENTITY_ID, + entity_id); + } + + rc = qed_mcp_nvm_rd_cmd(p_hwfn, p_ptt, + DRV_MSG_CODE_GET_NVM_CFG_OPTION, + mb_param, &resp, ¶m, p_len, (u32 *)p_buf); + + return rc; +} + +int qed_mcp_nvm_set_cfg(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, + u16 option_id, u8 entity_id, u16 flags, u8 *p_buf, + u32 len) +{ + u32 mb_param = 0, resp, param; + int rc; + + QED_MFW_SET_FIELD(mb_param, DRV_MB_PARAM_NVM_CFG_OPTION_ID, option_id); + if (flags & QED_NVM_CFG_OPTION_ALL) + QED_MFW_SET_FIELD(mb_param, + DRV_MB_PARAM_NVM_CFG_OPTION_ALL, 1); + if (flags & QED_NVM_CFG_OPTION_INIT) + QED_MFW_SET_FIELD(mb_param, + DRV_MB_PARAM_NVM_CFG_OPTION_INIT, 1); + if (flags & QED_NVM_CFG_OPTION_COMMIT) + QED_MFW_SET_FIELD(mb_param, + DRV_MB_PARAM_NVM_CFG_OPTION_COMMIT, 1); + if (flags & QED_NVM_CFG_OPTION_FREE) + QED_MFW_SET_FIELD(mb_param, + DRV_MB_PARAM_NVM_CFG_OPTION_FREE, 1); + if (flags & QED_NVM_CFG_OPTION_ENTITY_SEL) { + QED_MFW_SET_FIELD(mb_param, + DRV_MB_PARAM_NVM_CFG_OPTION_ENTITY_SEL, 1); + QED_MFW_SET_FIELD(mb_param, + DRV_MB_PARAM_NVM_CFG_OPTION_ENTITY_ID, + entity_id); + } + + rc = qed_mcp_nvm_wr_cmd(p_hwfn, p_ptt, + DRV_MSG_CODE_SET_NVM_CFG_OPTION, + mb_param, &resp, ¶m, len, (u32 *)p_buf); + + return rc; +} diff --git a/drivers/net/ethernet/qlogic/qed/qed_mcp.h b/drivers/net/ethernet/qlogic/qed/qed_mcp.h index e4f8fe4..550b4dd 100644 --- a/drivers/net/ethernet/qlogic/qed/qed_mcp.h +++ b/drivers/net/ethernet/qlogic/qed/qed_mcp.h @@ -251,6 +251,12 @@ struct qed_mfw_tlv_generic { struct qed_mfw_tlv_iscsi iscsi; }; +#define QED_NVM_CFG_OPTION_ALL BIT(0) +#define QED_NVM_CFG_OPTION_INIT BIT(1) +#define QED_NVM_CFG_OPTION_COMMIT BIT(2) +#define QED_NVM_CFG_OPTION_FREE BIT(3) +#define QED_NVM_CFG_OPTION_ENTITY_SEL BIT(4) + /** * @brief - returns the link params of the hw function * @@ -1202,4 +1208,12 @@ void qed_mcp_resc_lock_default_init(struct qed_resc_lock_params *p_lock, */ int qed_mcp_get_ppfid_bitmap(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); +int qed_mcp_nvm_get_cfg(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, + u16 option_id, u8 entity_id, u16 flags, u8 *p_buf, + u32 *p_len); + +int qed_mcp_nvm_set_cfg(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, + u16 option_id, u8 entity_id, u16 flags, u8 *p_buf, + u32 len); + #endif From patchwork Mon Jun 17 11:45:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudarsana Reddy Kalluru X-Patchwork-Id: 1116958 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=marvell.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=marvell.com header.i=@marvell.com header.b="QlB5V8ov"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45S8YZ2RNPz9sN4 for ; Mon, 17 Jun 2019 21:46:10 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726759AbfFQLqJ (ORCPT ); Mon, 17 Jun 2019 07:46:09 -0400 Received: from mx0b-0016f401.pphosted.com ([67.231.156.173]:41042 "EHLO mx0b-0016f401.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725763AbfFQLqJ (ORCPT ); Mon, 17 Jun 2019 07:46:09 -0400 Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x5HBk71Y000500; Mon, 17 Jun 2019 04:46:07 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0818; bh=u6LYQ9NBiVbUao/MH9k4OE+YXNOMLKhQak073Le/PxY=; b=QlB5V8ovajKe5XXhxHmtEnmwF2uz5yzKb86g7su2HvFuFVNNQFclOCGkcTrBbZDT/08I a3dn0e5gyASslVUPukdP6PWQs2wVry6tcGq4F2j++QoL7xyHMSOVxYsSX0kucDw7eABI Bk1gI3PLj49U/56OLWT6O8fNmWu/qNoVmID/fXtuc2p0sRRyiNjynIHaSbJPqI89gfSF 0FwyTI01OTv3tPXvCRgRQwDvq7BLc/7pHQw+XAZ0jcqpinjpCvvHlNJhqR1+glbY8eBB TTjdATwbPtsrgASUsUQYaEdLp8lOZ53GApsWpPbz5IWvKFSjVSgB2G5/RcDbTxL9T8f1 Ng== Received: from sc-exch04.marvell.com ([199.233.58.184]) by mx0b-0016f401.pphosted.com with ESMTP id 2t506hxdr7-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 17 Jun 2019 04:46:06 -0700 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH04.marvell.com (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Mon, 17 Jun 2019 04:46:02 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Mon, 17 Jun 2019 04:46:02 -0700 Received: from dut1171.mv.qlogic.com (unknown [10.112.88.18]) by maili.marvell.com (Postfix) with ESMTP id 5470C3F703F; Mon, 17 Jun 2019 04:46:02 -0700 (PDT) Received: from dut1171.mv.qlogic.com (localhost [127.0.0.1]) by dut1171.mv.qlogic.com (8.14.7/8.14.7) with ESMTP id x5HBk2sr017139; Mon, 17 Jun 2019 04:46:02 -0700 Received: (from root@localhost) by dut1171.mv.qlogic.com (8.14.7/8.14.7/Submit) id x5HBk2Mx017138; Mon, 17 Jun 2019 04:46:02 -0700 From: Sudarsana Reddy Kalluru To: CC: , , Subject: [PATCH net-next 2/4] qed: Perform devlink registration after the hardware init. Date: Mon, 17 Jun 2019 04:45:26 -0700 Message-ID: <20190617114528.17086-3-skalluru@marvell.com> X-Mailer: git-send-email 2.12.0 In-Reply-To: <20190617114528.17086-1-skalluru@marvell.com> References: <20190617114528.17086-1-skalluru@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-17_06:, , signatures=0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Devlink callbacks need access to device resources such as ptt lock, hence performing the devlink registration after the device initialization. Signed-off-by: Sudarsana Reddy Kalluru Signed-off-by: Ariel Elior --- drivers/net/ethernet/qlogic/qed/qed_main.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/net/ethernet/qlogic/qed/qed_main.c b/drivers/net/ethernet/qlogic/qed/qed_main.c index 829dd60..fdd84f5 100644 --- a/drivers/net/ethernet/qlogic/qed/qed_main.c +++ b/drivers/net/ethernet/qlogic/qed/qed_main.c @@ -472,22 +472,24 @@ static struct qed_dev *qed_probe(struct pci_dev *pdev, } DP_INFO(cdev, "PCI init completed successfully\n"); - rc = qed_devlink_register(cdev); + rc = qed_hw_prepare(cdev, QED_PCI_DEFAULT); if (rc) { - DP_INFO(cdev, "Failed to register devlink.\n"); + DP_ERR(cdev, "hw prepare failed\n"); goto err2; } - rc = qed_hw_prepare(cdev, QED_PCI_DEFAULT); + rc = qed_devlink_register(cdev); if (rc) { - DP_ERR(cdev, "hw prepare failed\n"); - goto err2; + DP_INFO(cdev, "Failed to register devlink.\n"); + goto err3; } DP_INFO(cdev, "qed_probe completed successfully\n"); return cdev; +err3: + qed_hw_remove(cdev); err2: qed_free_pci(cdev); err1: @@ -501,14 +503,14 @@ static void qed_remove(struct qed_dev *cdev) if (!cdev) return; + qed_devlink_unregister(cdev); + qed_hw_remove(cdev); qed_free_pci(cdev); qed_set_power_state(cdev, PCI_D3hot); - qed_devlink_unregister(cdev); - qed_free_cdev(cdev); } From patchwork Mon Jun 17 11:45:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudarsana Reddy Kalluru X-Patchwork-Id: 1116959 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=marvell.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=marvell.com header.i=@marvell.com header.b="h6sPkEg5"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45S8Yb1FL5z9sND for ; Mon, 17 Jun 2019 21:46:11 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726809AbfFQLqK (ORCPT ); Mon, 17 Jun 2019 07:46:10 -0400 Received: from mx0b-0016f401.pphosted.com ([67.231.156.173]:41044 "EHLO mx0b-0016f401.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726599AbfFQLqJ (ORCPT ); Mon, 17 Jun 2019 07:46:09 -0400 Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x5HBk6DT000474; Mon, 17 Jun 2019 04:46:07 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0818; bh=O7wx8IuykDT9a2Gl8vZjczajcpF0qh52XQTlnMnVAss=; b=h6sPkEg5uaR/ESVtPXayztxYuthfWYpidXUtEuvq5Mby/XI1Xvv8lZHzJLovfTwHKHyw R6wNAr+bMVIq+cr8nNFWIotvrWntP5a7TZqYfCYKVa95jZR6xHJWpOoSZ2tB/HD8VfRT Kp8KDug9vGv1YVly5cOe4wdznnNElbEzZQ+QKukwkR7wP12A4NlL2tAcnnnDIXNZzntB cdTT1m/IpUrmBP1bgjEuSLxC57s7Hohvun/kjo48G4tW8Sv0QICpD0fgJP4Kmk8Czpva lTBAgro8RucXLH/sVBcV63+YHOc5tsHSMPbVh8kGRXR33yRM1jP7UQR5eLsN073lXlsx kQ== Received: from sc-exch03.marvell.com ([199.233.58.183]) by mx0b-0016f401.pphosted.com with ESMTP id 2t506hxdr9-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 17 Jun 2019 04:46:07 -0700 Received: from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Mon, 17 Jun 2019 04:46:05 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Mon, 17 Jun 2019 04:46:05 -0700 Received: from dut1171.mv.qlogic.com (unknown [10.112.88.18]) by maili.marvell.com (Postfix) with ESMTP id 8C1943F703F; Mon, 17 Jun 2019 04:46:05 -0700 (PDT) Received: from dut1171.mv.qlogic.com (localhost [127.0.0.1]) by dut1171.mv.qlogic.com (8.14.7/8.14.7) with ESMTP id x5HBk5Mr017143; Mon, 17 Jun 2019 04:46:05 -0700 Received: (from root@localhost) by dut1171.mv.qlogic.com (8.14.7/8.14.7/Submit) id x5HBk5gD017142; Mon, 17 Jun 2019 04:46:05 -0700 From: Sudarsana Reddy Kalluru To: CC: , , Subject: [PATCH net-next 3/4] qed: Add new file for devlink implementation. Date: Mon, 17 Jun 2019 04:45:27 -0700 Message-ID: <20190617114528.17086-4-skalluru@marvell.com> X-Mailer: git-send-email 2.12.0 In-Reply-To: <20190617114528.17086-1-skalluru@marvell.com> References: <20190617114528.17086-1-skalluru@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-17_06:, , signatures=0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The patch introduces new files for qed devlink implementation. Signed-off-by: Sudarsana Reddy Kalluru Signed-off-by: Ariel Elior --- drivers/net/ethernet/qlogic/qed/Makefile | 3 +- drivers/net/ethernet/qlogic/qed/qed_devlink.c | 97 ++++++++++++++++++++++++ drivers/net/ethernet/qlogic/qed/qed_devlink.h | 18 +++++ drivers/net/ethernet/qlogic/qed/qed_main.c | 102 +------------------------- 4 files changed, 118 insertions(+), 102 deletions(-) create mode 100644 drivers/net/ethernet/qlogic/qed/qed_devlink.c create mode 100644 drivers/net/ethernet/qlogic/qed/qed_devlink.h diff --git a/drivers/net/ethernet/qlogic/qed/Makefile b/drivers/net/ethernet/qlogic/qed/Makefile index a0acb94..2e9f3cc 100644 --- a/drivers/net/ethernet/qlogic/qed/Makefile +++ b/drivers/net/ethernet/qlogic/qed/Makefile @@ -3,7 +3,8 @@ obj-$(CONFIG_QED) := qed.o qed-y := qed_cxt.o qed_dev.o qed_hw.o qed_init_fw_funcs.o qed_init_ops.o \ qed_int.o qed_main.o qed_mcp.o qed_sp_commands.o qed_spq.o qed_l2.o \ - qed_selftest.o qed_dcbx.o qed_debug.o qed_ptp.o qed_mng_tlv.o + qed_selftest.o qed_dcbx.o qed_debug.o qed_ptp.o qed_mng_tlv.o \ + qed_devlink.o qed-$(CONFIG_QED_SRIOV) += qed_sriov.o qed_vf.o qed-$(CONFIG_QED_LL2) += qed_ll2.o qed-$(CONFIG_QED_RDMA) += qed_roce.o qed_rdma.o qed_iwarp.o diff --git a/drivers/net/ethernet/qlogic/qed/qed_devlink.c b/drivers/net/ethernet/qlogic/qed/qed_devlink.c new file mode 100644 index 0000000..acb6c87 --- /dev/null +++ b/drivers/net/ethernet/qlogic/qed/qed_devlink.c @@ -0,0 +1,97 @@ +// SPDX-License-Identifier: GPL-2.0 +#include +#include "qed.h" +#include "qed_devlink.h" +#include "qed_mcp.h" + +static int qed_dl_param_get(struct devlink *dl, u32 id, + struct devlink_param_gset_ctx *ctx) +{ + struct qed_devlink *qed_dl; + struct qed_dev *cdev; + + qed_dl = devlink_priv(dl); + cdev = qed_dl->cdev; + ctx->val.vbool = cdev->iwarp_cmt; + + return 0; +} + +static int qed_dl_param_set(struct devlink *dl, u32 id, + struct devlink_param_gset_ctx *ctx) +{ + struct qed_devlink *qed_dl; + struct qed_dev *cdev; + + qed_dl = devlink_priv(dl); + cdev = qed_dl->cdev; + cdev->iwarp_cmt = ctx->val.vbool; + + return 0; +} + +static const struct devlink_param qed_devlink_params[] = { + DEVLINK_PARAM_DRIVER(QED_DEVLINK_PARAM_ID_IWARP_CMT, + "iwarp_cmt", DEVLINK_PARAM_TYPE_BOOL, + BIT(DEVLINK_PARAM_CMODE_RUNTIME), + qed_dl_param_get, qed_dl_param_set, NULL), +}; + +static const struct devlink_ops qed_dl_ops; + +int qed_devlink_register(struct qed_dev *cdev) +{ + union devlink_param_value value; + struct qed_devlink *qed_dl; + struct devlink *dl; + int rc; + + dl = devlink_alloc(&qed_dl_ops, sizeof(*qed_dl)); + if (!dl) + return -ENOMEM; + + qed_dl = devlink_priv(dl); + + cdev->dl = dl; + qed_dl->cdev = cdev; + + rc = devlink_register(dl, &cdev->pdev->dev); + if (rc) + goto err_free; + + rc = devlink_params_register(dl, qed_devlink_params, + ARRAY_SIZE(qed_devlink_params)); + if (rc) + goto err_unregister; + + value.vbool = false; + devlink_param_driverinit_value_set(dl, + QED_DEVLINK_PARAM_ID_IWARP_CMT, + value); + + devlink_params_publish(dl); + cdev->iwarp_cmt = false; + + return 0; + +err_unregister: + devlink_unregister(dl); + +err_free: + cdev->dl = NULL; + devlink_free(dl); + + return rc; +} + +void qed_devlink_unregister(struct qed_dev *cdev) +{ + if (!cdev->dl) + return; + + devlink_params_unregister(cdev->dl, qed_devlink_params, + ARRAY_SIZE(qed_devlink_params)); + + devlink_unregister(cdev->dl); + devlink_free(cdev->dl); +} diff --git a/drivers/net/ethernet/qlogic/qed/qed_devlink.h b/drivers/net/ethernet/qlogic/qed/qed_devlink.h new file mode 100644 index 0000000..86e1caa --- /dev/null +++ b/drivers/net/ethernet/qlogic/qed/qed_devlink.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _QED_DEVLINK_H +#define _QED_DEVLINK_H +#include "qed.h" + +struct qed_devlink { + struct qed_dev *cdev; +}; + +enum qed_devlink_param_id { + QED_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX, + QED_DEVLINK_PARAM_ID_IWARP_CMT, +}; + +int qed_devlink_register(struct qed_dev *cdev); +void qed_devlink_unregister(struct qed_dev *cdev); + +#endif diff --git a/drivers/net/ethernet/qlogic/qed/qed_main.c b/drivers/net/ethernet/qlogic/qed/qed_main.c index fdd84f5..e3a8754 100644 --- a/drivers/net/ethernet/qlogic/qed/qed_main.c +++ b/drivers/net/ethernet/qlogic/qed/qed_main.c @@ -63,6 +63,7 @@ #include "qed_hw.h" #include "qed_selftest.h" #include "qed_debug.h" +#include "qed_devlink.h" #define QED_ROCE_QPS (8192) #define QED_ROCE_DPIS (8) @@ -343,107 +344,6 @@ static int qed_set_power_state(struct qed_dev *cdev, pci_power_t state) return 0; } -struct qed_devlink { - struct qed_dev *cdev; -}; - -enum qed_devlink_param_id { - QED_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX, - QED_DEVLINK_PARAM_ID_IWARP_CMT, -}; - -static int qed_dl_param_get(struct devlink *dl, u32 id, - struct devlink_param_gset_ctx *ctx) -{ - struct qed_devlink *qed_dl; - struct qed_dev *cdev; - - qed_dl = devlink_priv(dl); - cdev = qed_dl->cdev; - ctx->val.vbool = cdev->iwarp_cmt; - - return 0; -} - -static int qed_dl_param_set(struct devlink *dl, u32 id, - struct devlink_param_gset_ctx *ctx) -{ - struct qed_devlink *qed_dl; - struct qed_dev *cdev; - - qed_dl = devlink_priv(dl); - cdev = qed_dl->cdev; - cdev->iwarp_cmt = ctx->val.vbool; - - return 0; -} - -static const struct devlink_param qed_devlink_params[] = { - DEVLINK_PARAM_DRIVER(QED_DEVLINK_PARAM_ID_IWARP_CMT, - "iwarp_cmt", DEVLINK_PARAM_TYPE_BOOL, - BIT(DEVLINK_PARAM_CMODE_RUNTIME), - qed_dl_param_get, qed_dl_param_set, NULL), -}; - -static const struct devlink_ops qed_dl_ops; - -static int qed_devlink_register(struct qed_dev *cdev) -{ - union devlink_param_value value; - struct qed_devlink *qed_dl; - struct devlink *dl; - int rc; - - dl = devlink_alloc(&qed_dl_ops, sizeof(*qed_dl)); - if (!dl) - return -ENOMEM; - - qed_dl = devlink_priv(dl); - - cdev->dl = dl; - qed_dl->cdev = cdev; - - rc = devlink_register(dl, &cdev->pdev->dev); - if (rc) - goto err_free; - - rc = devlink_params_register(dl, qed_devlink_params, - ARRAY_SIZE(qed_devlink_params)); - if (rc) - goto err_unregister; - - value.vbool = false; - devlink_param_driverinit_value_set(dl, - QED_DEVLINK_PARAM_ID_IWARP_CMT, - value); - - devlink_params_publish(dl); - cdev->iwarp_cmt = false; - - return 0; - -err_unregister: - devlink_unregister(dl); - -err_free: - cdev->dl = NULL; - devlink_free(dl); - - return rc; -} - -static void qed_devlink_unregister(struct qed_dev *cdev) -{ - if (!cdev->dl) - return; - - devlink_params_unregister(cdev->dl, qed_devlink_params, - ARRAY_SIZE(qed_devlink_params)); - - devlink_unregister(cdev->dl); - devlink_free(cdev->dl); -} - /* probing */ static struct qed_dev *qed_probe(struct pci_dev *pdev, struct qed_probe_params *params) From patchwork Mon Jun 17 11:45:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudarsana Reddy Kalluru X-Patchwork-Id: 1116960 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=marvell.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=marvell.com header.i=@marvell.com header.b="NCSwjTkb"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45S8Yh2yWWz9sN4 for ; Mon, 17 Jun 2019 21:46:16 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726599AbfFQLqP (ORCPT ); Mon, 17 Jun 2019 07:46:15 -0400 Received: from mx0a-0016f401.pphosted.com ([67.231.148.174]:44032 "EHLO mx0b-0016f401.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725973AbfFQLqP (ORCPT ); Mon, 17 Jun 2019 07:46:15 -0400 Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x5HBjJar028449; Mon, 17 Jun 2019 04:46:13 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0818; bh=u6ht7QRzfPEQw9bGNG/SxsSJesHteM4RlWM5AFFKhK0=; b=NCSwjTkbzZPhUXPfWhRo4dxy0D5j1usSJhz7Mr+0nMOrUMgWgKHC/HFg0xIvhsIKBhEY 7/A+f2XvMldXmLeeFX8vtYP9cWVcWnFPLz4NeKQM7uo6SU3KmgxySRT8ZID9G8ceZPdh 49pJ5DFalQe6jo3NJ31AXahlJZy+kx6QW0tOY1hQCdtZltIz3K5NWLGF2VkdFChzReUT v030ZhY0AxT9In8Tle6VB6VFTTi06PORJFC9zPXq7t4XJWhoWBsFts/rwsEmt1vNG7lG G+Ac+GHhT3cM9gSYepiEeY5Wqe2RoJX8/KctqvXWo3VIR2NtOnOrY8i5BJxor6vb795B nw== Received: from sc-exch04.marvell.com ([199.233.58.184]) by mx0a-0016f401.pphosted.com with ESMTP id 2t68rp8aje-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 17 Jun 2019 04:46:13 -0700 Received: from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH04.marvell.com (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Mon, 17 Jun 2019 04:46:11 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Mon, 17 Jun 2019 04:46:12 -0700 Received: from dut1171.mv.qlogic.com (unknown [10.112.88.18]) by maili.marvell.com (Postfix) with ESMTP id C1BD13F703F; Mon, 17 Jun 2019 04:46:11 -0700 (PDT) Received: from dut1171.mv.qlogic.com (localhost [127.0.0.1]) by dut1171.mv.qlogic.com (8.14.7/8.14.7) with ESMTP id x5HBkB9q017147; Mon, 17 Jun 2019 04:46:11 -0700 Received: (from root@localhost) by dut1171.mv.qlogic.com (8.14.7/8.14.7/Submit) id x5HBkBcS017146; Mon, 17 Jun 2019 04:46:11 -0700 From: Sudarsana Reddy Kalluru To: CC: , , Subject: [PATCH net-next 4/4] qed: Add devlink support for configuration attributes. Date: Mon, 17 Jun 2019 04:45:28 -0700 Message-ID: <20190617114528.17086-5-skalluru@marvell.com> X-Mailer: git-send-email 2.12.0 In-Reply-To: <20190617114528.17086-1-skalluru@marvell.com> References: <20190617114528.17086-1-skalluru@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-17_06:, , signatures=0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This patch adds implementation for devlink callbacks for reading/ configuring the device attributes. Signed-off-by: Sudarsana Reddy Kalluru Signed-off-by: Ariel Elior --- drivers/net/ethernet/qlogic/qed/qed.h | 1 + drivers/net/ethernet/qlogic/qed/qed_devlink.c | 184 ++++++++++++++++++++++++++ drivers/net/ethernet/qlogic/qed/qed_devlink.h | 23 ++++ drivers/net/ethernet/qlogic/qed/qed_hsi.h | 11 ++ 4 files changed, 219 insertions(+) diff --git a/drivers/net/ethernet/qlogic/qed/qed.h b/drivers/net/ethernet/qlogic/qed/qed.h index 89fe091..2afd5c7 100644 --- a/drivers/net/ethernet/qlogic/qed/qed.h +++ b/drivers/net/ethernet/qlogic/qed/qed.h @@ -866,6 +866,7 @@ struct qed_dev { struct devlink *dl; bool iwarp_cmt; + u8 cfg_entity_id; }; #define NUM_OF_VFS(dev) (QED_IS_BB(dev) ? MAX_NUM_VFS_BB \ diff --git a/drivers/net/ethernet/qlogic/qed/qed_devlink.c b/drivers/net/ethernet/qlogic/qed/qed_devlink.c index acb6c87..232a8c4 100644 --- a/drivers/net/ethernet/qlogic/qed/qed_devlink.c +++ b/drivers/net/ethernet/qlogic/qed/qed_devlink.c @@ -4,6 +4,30 @@ #include "qed_devlink.h" #include "qed_mcp.h" +static const struct qed_devlink_cfg_param cfg_params[] = { + {DEVLINK_PARAM_GENERIC_ID_ENABLE_SRIOV, NVM_CFG_ID_ENABLE_SRIOV, + DEVLINK_PARAM_TYPE_BOOL}, + {QED_DEVLINK_ENTITY_ID, 0, DEVLINK_PARAM_TYPE_U8}, + {QED_DEVLINK_DEVICE_CAPABILITIES, NVM_CFG_ID_DEVICE_CAPABILITIES, + DEVLINK_PARAM_TYPE_U8}, + {QED_DEVLINK_MF_MODE, NVM_CFG_ID_MF_MODE, DEVLINK_PARAM_TYPE_U8}, + {QED_DEVLINK_DCBX_MODE, NVM_CFG_ID_DCBX_MODE, DEVLINK_PARAM_TYPE_U8}, + {QED_DEVLINK_PREBOOT_OPROM, NVM_CFG_ID_PREBOOT_OPROM, + DEVLINK_PARAM_TYPE_BOOL}, + {QED_DEVLINK_PREBOOT_BOOT_PROTOCOL, NVM_CFG_ID_PREBOOT_BOOT_PROTOCOL, + DEVLINK_PARAM_TYPE_U8}, + {QED_DEVLINK_PREBOOT_VLAN, NVM_CFG_ID_PREBOOT_VLAN, + DEVLINK_PARAM_TYPE_U16}, + {QED_DEVLINK_PREBOOT_VLAN_VALUE, NVM_CFG_ID_PREBOOT_VLAN_VALUE, + DEVLINK_PARAM_TYPE_U16}, + {QED_DEVLINK_MBA_DELAY_TIME, NVM_CFG_ID_MBA_DELAY_TIME, + DEVLINK_PARAM_TYPE_U8}, + {QED_DEVLINK_MBA_SETUP_HOT_KEY, NVM_CFG_ID_MBA_SETUP_HOT_KEY, + DEVLINK_PARAM_TYPE_U8}, + {QED_DEVLINK_MBA_HIDE_SETUP_PROMPT, NVM_CFG_ID_MBA_HIDE_SETUP_PROMPT, + DEVLINK_PARAM_TYPE_BOOL}, +}; + static int qed_dl_param_get(struct devlink *dl, u32 id, struct devlink_param_gset_ctx *ctx) { @@ -30,11 +54,171 @@ static int qed_dl_param_set(struct devlink *dl, u32 id, return 0; } +static int qed_dl_get_perm_cfg(struct devlink *dl, u32 id, + struct devlink_param_gset_ctx *ctx) +{ + u8 buf[QED_DL_PARAM_BUF_LEN]; + struct qed_devlink *qed_dl; + int rc, cfg_idx, len = 0; + struct qed_hwfn *hwfn; + struct qed_dev *cdev; + struct qed_ptt *ptt; + u32 flags; + + qed_dl = devlink_priv(dl); + cdev = qed_dl->cdev; + hwfn = QED_LEADING_HWFN(cdev); + + if (id == QED_DEVLINK_ENTITY_ID) { + ctx->val.vu8 = cdev->cfg_entity_id; + return 0; + } + + for (cfg_idx = 0; cfg_idx < ARRAY_SIZE(cfg_params); cfg_idx++) + if (cfg_params[cfg_idx].id == id) + break; + + if (cfg_idx == ARRAY_SIZE(cfg_params)) { + DP_ERR(cdev, "Invalid command id %d\n", id); + return -EINVAL; + } + + ptt = qed_ptt_acquire(hwfn); + if (!ptt) + return -EAGAIN; + + memset(buf, 0, QED_DL_PARAM_BUF_LEN); + flags = cdev->cfg_entity_id ? QED_DL_PARAM_PF_GET_FLAGS : + QED_DL_PARAM_GET_FLAGS; + rc = qed_mcp_nvm_get_cfg(hwfn, ptt, cfg_params[cfg_idx].cmd, + cdev->cfg_entity_id, flags, buf, &len); + if (rc) + DP_ERR(cdev, "Error = %d\n", rc); + else + memcpy(&ctx->val, buf, len); + + qed_ptt_release(hwfn, ptt); + + return rc; +} + +static int qed_dl_set_perm_cfg(struct devlink *dl, u32 id, + struct devlink_param_gset_ctx *ctx) +{ + u8 buf[QED_DL_PARAM_BUF_LEN]; + struct qed_devlink *qed_dl; + int rc, cfg_idx, len = 0; + struct qed_hwfn *hwfn; + struct qed_dev *cdev; + struct qed_ptt *ptt; + u32 flags; + + qed_dl = devlink_priv(dl); + cdev = qed_dl->cdev; + hwfn = QED_LEADING_HWFN(cdev); + + if (id == QED_DEVLINK_ENTITY_ID) { + cdev->cfg_entity_id = ctx->val.vu8; + return 0; + } + + for (cfg_idx = 0; cfg_idx < ARRAY_SIZE(cfg_params); cfg_idx++) + if (cfg_params[cfg_idx].id == id) + break; + + if (cfg_idx == ARRAY_SIZE(cfg_params)) { + DP_ERR(cdev, "Invalid command id %d\n", id); + return -EINVAL; + } + + memset(buf, 0, QED_DL_PARAM_BUF_LEN); + switch (cfg_params[cfg_idx].type) { + case DEVLINK_PARAM_TYPE_BOOL: + len = 1; + break; + case DEVLINK_PARAM_TYPE_U8: + len = 1; + break; + case DEVLINK_PARAM_TYPE_U16: + len = 2; + break; + case DEVLINK_PARAM_TYPE_U32: + len = 4; + break; + case DEVLINK_PARAM_TYPE_STRING: + len = strlen(ctx->val.vstr); + break; + } + + memcpy(buf, &ctx->val, len); + flags = cdev->cfg_entity_id ? QED_DL_PARAM_PF_SET_FLAGS : + QED_DL_PARAM_SET_FLAGS; + + ptt = qed_ptt_acquire(hwfn); + if (!ptt) + return -EAGAIN; + + rc = qed_mcp_nvm_set_cfg(hwfn, ptt, cfg_params[cfg_idx].cmd, + cdev->cfg_entity_id, flags, buf, len); + if (rc) + DP_ERR(cdev, "Error = %d\n", rc); + + qed_ptt_release(hwfn, ptt); + + return rc; +} + static const struct devlink_param qed_devlink_params[] = { + DEVLINK_PARAM_GENERIC(ENABLE_SRIOV, BIT(DEVLINK_PARAM_CMODE_PERMANENT), + qed_dl_get_perm_cfg, qed_dl_set_perm_cfg, NULL), DEVLINK_PARAM_DRIVER(QED_DEVLINK_PARAM_ID_IWARP_CMT, "iwarp_cmt", DEVLINK_PARAM_TYPE_BOOL, BIT(DEVLINK_PARAM_CMODE_RUNTIME), qed_dl_param_get, qed_dl_param_set, NULL), + DEVLINK_PARAM_DRIVER(QED_DEVLINK_ENTITY_ID, + "entity_id", DEVLINK_PARAM_TYPE_U8, + BIT(DEVLINK_PARAM_CMODE_RUNTIME), + qed_dl_get_perm_cfg, qed_dl_set_perm_cfg, NULL), + DEVLINK_PARAM_DRIVER(QED_DEVLINK_DEVICE_CAPABILITIES, + "device_capabilities", DEVLINK_PARAM_TYPE_U8, + BIT(DEVLINK_PARAM_CMODE_PERMANENT), + qed_dl_get_perm_cfg, qed_dl_set_perm_cfg, NULL), + DEVLINK_PARAM_DRIVER(QED_DEVLINK_MF_MODE, + "mf_mode", DEVLINK_PARAM_TYPE_U8, + BIT(DEVLINK_PARAM_CMODE_PERMANENT), + qed_dl_get_perm_cfg, qed_dl_set_perm_cfg, NULL), + DEVLINK_PARAM_DRIVER(QED_DEVLINK_DCBX_MODE, + "dcbx_mode", DEVLINK_PARAM_TYPE_U8, + BIT(DEVLINK_PARAM_CMODE_PERMANENT), + qed_dl_get_perm_cfg, qed_dl_set_perm_cfg, NULL), + DEVLINK_PARAM_DRIVER(QED_DEVLINK_PREBOOT_OPROM, + "preboot_oprom", DEVLINK_PARAM_TYPE_BOOL, + BIT(DEVLINK_PARAM_CMODE_PERMANENT), + qed_dl_get_perm_cfg, qed_dl_set_perm_cfg, NULL), + DEVLINK_PARAM_DRIVER(QED_DEVLINK_PREBOOT_BOOT_PROTOCOL, + "preboot_boot_protocol", DEVLINK_PARAM_TYPE_U8, + BIT(DEVLINK_PARAM_CMODE_PERMANENT), + qed_dl_get_perm_cfg, qed_dl_set_perm_cfg, NULL), + DEVLINK_PARAM_DRIVER(QED_DEVLINK_PREBOOT_VLAN, + "preboot_vlan", DEVLINK_PARAM_TYPE_U16, + BIT(DEVLINK_PARAM_CMODE_PERMANENT), + qed_dl_get_perm_cfg, qed_dl_set_perm_cfg, NULL), + DEVLINK_PARAM_DRIVER(QED_DEVLINK_PREBOOT_VLAN_VALUE, + "preboot_vlan_value", DEVLINK_PARAM_TYPE_U16, + BIT(DEVLINK_PARAM_CMODE_PERMANENT), + qed_dl_get_perm_cfg, qed_dl_set_perm_cfg, NULL), + DEVLINK_PARAM_DRIVER(QED_DEVLINK_MBA_DELAY_TIME, + "mba_delay_time", DEVLINK_PARAM_TYPE_U8, + BIT(DEVLINK_PARAM_CMODE_PERMANENT), + qed_dl_get_perm_cfg, qed_dl_set_perm_cfg, NULL), + DEVLINK_PARAM_DRIVER(QED_DEVLINK_MBA_SETUP_HOT_KEY, + "mba_setup_hot_key", DEVLINK_PARAM_TYPE_U8, + BIT(DEVLINK_PARAM_CMODE_PERMANENT), + qed_dl_get_perm_cfg, qed_dl_set_perm_cfg, NULL), + DEVLINK_PARAM_DRIVER(QED_DEVLINK_MBA_HIDE_SETUP_PROMPT, + "mba_hide_setup_prompt", DEVLINK_PARAM_TYPE_BOOL, + BIT(DEVLINK_PARAM_CMODE_PERMANENT), + qed_dl_get_perm_cfg, qed_dl_set_perm_cfg, NULL), }; static const struct devlink_ops qed_dl_ops; diff --git a/drivers/net/ethernet/qlogic/qed/qed_devlink.h b/drivers/net/ethernet/qlogic/qed/qed_devlink.h index 86e1caa..ca52a3f 100644 --- a/drivers/net/ethernet/qlogic/qed/qed_devlink.h +++ b/drivers/net/ethernet/qlogic/qed/qed_devlink.h @@ -3,6 +3,12 @@ #define _QED_DEVLINK_H #include "qed.h" +#define QED_DL_PARAM_GET_FLAGS 0xA +#define QED_DL_PARAM_SET_FLAGS 0xE +#define QED_DL_PARAM_PF_GET_FLAGS 0x1A +#define QED_DL_PARAM_PF_SET_FLAGS 0x1E +#define QED_DL_PARAM_BUF_LEN 32 + struct qed_devlink { struct qed_dev *cdev; }; @@ -10,6 +16,23 @@ struct qed_devlink { enum qed_devlink_param_id { QED_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX, QED_DEVLINK_PARAM_ID_IWARP_CMT, + QED_DEVLINK_ENTITY_ID, + QED_DEVLINK_DEVICE_CAPABILITIES, + QED_DEVLINK_MF_MODE, + QED_DEVLINK_DCBX_MODE, + QED_DEVLINK_PREBOOT_OPROM, + QED_DEVLINK_PREBOOT_BOOT_PROTOCOL, + QED_DEVLINK_PREBOOT_VLAN, + QED_DEVLINK_PREBOOT_VLAN_VALUE, + QED_DEVLINK_MBA_DELAY_TIME, + QED_DEVLINK_MBA_SETUP_HOT_KEY, + QED_DEVLINK_MBA_HIDE_SETUP_PROMPT, +}; + +struct qed_devlink_cfg_param { + u16 id; + u16 cmd; + enum devlink_param_type type; }; int qed_devlink_register(struct qed_dev *cdev); diff --git a/drivers/net/ethernet/qlogic/qed/qed_hsi.h b/drivers/net/ethernet/qlogic/qed/qed_hsi.h index 5091f5b1..49b6a6e 100644 --- a/drivers/net/ethernet/qlogic/qed/qed_hsi.h +++ b/drivers/net/ethernet/qlogic/qed/qed_hsi.h @@ -13338,6 +13338,17 @@ enum spad_sections { #define NVM_CFG_ID_MAC_ADDRESS 1 #define NVM_CFG_ID_MF_MODE 9 +#define NVM_CFG_ID_DCBX_MODE 26 +#define NVM_CFG_ID_PREBOOT_OPROM 59 +#define NVM_CFG_ID_MBA_DELAY_TIME 61 +#define NVM_CFG_ID_MBA_SETUP_HOT_KEY 62 +#define NVM_CFG_ID_MBA_HIDE_SETUP_PROMPT 63 +#define NVM_CFG_ID_PREBOOT_BOOT_PROTOCOL 69 +#define NVM_CFG_ID_ENABLE_SRIOV 70 +#define NVM_CFG_ID_DEVICE_CAPABILITIES 117 +#define NVM_CFG_ID_PREBOOT_VLAN 133 +#define NVM_CFG_ID_PREBOOT_VLAN_VALUE 132 + #define MCP_TRACE_SIZE 2048 /* 2kb */