From patchwork Fri Jun 7 17:34:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeff Lane X-Patchwork-Id: 1112891 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=canonical.com Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45Mmbt5g47z9sN4; Mon, 10 Jun 2019 18:32:58 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1haFjY-0003OY-Sj; Mon, 10 Jun 2019 08:32:52 +0000 Received: from youngberry.canonical.com ([91.189.89.112]) by huckleberry.canonical.com with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:128) (Exim 4.86_2) (envelope-from ) id 1hZIlJ-0006Cd-Qx for kernel-team@lists.ubuntu.com; Fri, 07 Jun 2019 17:34:45 +0000 Received: from mail-yw1-f70.google.com ([209.85.161.70]) by youngberry.canonical.com with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.76) (envelope-from ) id 1hZIlJ-0003fD-Cy for kernel-team@lists.ubuntu.com; Fri, 07 Jun 2019 17:34:45 +0000 Received: by mail-yw1-f70.google.com with SMTP id k142so2693454ywa.9 for ; Fri, 07 Jun 2019 10:34:45 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=McgoVB5BDWsc1vs2jOpbui+RY1GETXkAhql2ndBwVv0=; b=jUmzpwcOVABAIRL/Vv/0volUB5cYXyP5ZR9JBeJD5+uPokURqUkmZYEdyL53SM/sIo gMy5AWAzIloJ8N7nyBd6hL2bPYyQXgdqT/812UIBngBdVgLNB5tZiNfy5lGRmfg+sT0V a+cw+RtFx1qIJtcVRXQPaE3zJPkYQhqli+7C9VfmDeN4sMR9OCnv9jfn/FeYq5L4A+cE Xarr4OQiLapSqpKx/cApKmC0fulTkCN6iqYN0BX8+LVsrlOVk9jTu8ahZKKi7Id1mNiP h/zTIwg+FPIWgYZa3Xd3asyRGfroYm3Enx72YYleqcFg1rhdxay0PPGdOGCVbEij4AJC KEhg== X-Gm-Message-State: APjAAAU+KK+9jiXFVqgywZSxPjgntnw1OoQ5sFaKmhcO5vH7vQv2Vzvs lMbEFpdpCxa0g6snEQ3eIDsgmbuwezDOWUiQVzHggzjZELQSQehLFQOBkaTDgsKVEy3nrdf3Gwg e+RiUzhYZ0yQzmVDKivtHKW0K1AP4PeO9vUB+CsjEHg== X-Received: by 2002:a25:9805:: with SMTP id a5mr25859344ybo.56.1559928883803; Fri, 07 Jun 2019 10:34:43 -0700 (PDT) X-Google-Smtp-Source: APXvYqzdXuA/zmlTcAAvO6tQVRmEJ63zlCTTel+HSZBM22BBNck7eYj8ZFfqg7qG65gnP+8M+eguwg== X-Received: by 2002:a25:9805:: with SMTP id a5mr25859320ybo.56.1559928883445; Fri, 07 Jun 2019 10:34:43 -0700 (PDT) Received: from galactica.lanes ([174.24.193.243]) by smtp.gmail.com with ESMTPSA id f3sm602429ywb.53.2019.06.07.10.34.42 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 07 Jun 2019 10:34:42 -0700 (PDT) From: Jeff Lane To: kernel-team@lists.ubuntu.com Subject: [SRU][COSMIC][PATCH 1/2] iommu/amd: Reserve exclusion range in iova-domain Date: Fri, 7 Jun 2019 13:34:31 -0400 Message-Id: <20190607173433.32695-4-jeffrey.lane@canonical.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190607173433.32695-1-jeffrey.lane@canonical.com> References: <20190607173433.32695-1-jeffrey.lane@canonical.com> X-Mailman-Approved-At: Mon, 10 Jun 2019 08:32:51 +0000 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Joerg Roedel BugLink: https://bugs.launchpad.net/bugs/1823037 If a device has an exclusion range specified in the IVRS table, this region needs to be reserved in the iova-domain of that device. This hasn't happened until now and can cause data corruption on data transfered with these devices. Treat exclusion ranges as reserved regions in the iommu-core to fix the problem. Fixes: be2a022c0dd0 ('x86, AMD IOMMU: add functions to parse IOMMU memory mapping requirements for devices') Signed-off-by: Joerg Roedel Reviewed-by: Gary R Hook (cherry picked from commit 8aafaaf2212192012f5bae305bb31cdf7681d777 5.2-rc1) Signed-off-by: Jeffrey Lane --- drivers/iommu/amd_iommu.c | 9 ++++++--- drivers/iommu/amd_iommu_init.c | 7 ++++--- drivers/iommu/amd_iommu_types.h | 2 ++ 3 files changed, 12 insertions(+), 6 deletions(-) diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c index f6521f376563..a4f0ea738488 100644 --- a/drivers/iommu/amd_iommu.c +++ b/drivers/iommu/amd_iommu.c @@ -3114,21 +3114,24 @@ static void amd_iommu_get_resv_regions(struct device *dev, return; list_for_each_entry(entry, &amd_iommu_unity_map, list) { + int type, prot = 0; size_t length; - int prot = 0; if (devid < entry->devid_start || devid > entry->devid_end) continue; + type = IOMMU_RESV_DIRECT; length = entry->address_end - entry->address_start; if (entry->prot & IOMMU_PROT_IR) prot |= IOMMU_READ; if (entry->prot & IOMMU_PROT_IW) prot |= IOMMU_WRITE; + if (entry->prot & IOMMU_UNITY_MAP_FLAG_EXCL_RANGE) + /* Exclusion range */ + type = IOMMU_RESV_RESERVED; region = iommu_alloc_resv_region(entry->address_start, - length, prot, - IOMMU_RESV_DIRECT); + length, prot, type); if (!region) { pr_err("Out of memory allocating dm-regions for %s\n", dev_name(dev)); diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c index f6dd63fed21e..75c6d5b654e6 100644 --- a/drivers/iommu/amd_iommu_init.c +++ b/drivers/iommu/amd_iommu_init.c @@ -2000,6 +2000,9 @@ static int __init init_unity_map_range(struct ivmd_header *m) if (e == NULL) return -ENOMEM; + if (m->flags & IVMD_FLAG_EXCL_RANGE) + init_exclusion_range(m); + switch (m->type) { default: kfree(e); @@ -2046,9 +2049,7 @@ static int __init init_memory_definitions(struct acpi_table_header *table) while (p < end) { m = (struct ivmd_header *)p; - if (m->flags & IVMD_FLAG_EXCL_RANGE) - init_exclusion_range(m); - else if (m->flags & IVMD_FLAG_UNITY_MAP) + if (m->flags & (IVMD_FLAG_UNITY_MAP | IVMD_FLAG_EXCL_RANGE)) init_unity_map_range(m); p += m->length; diff --git a/drivers/iommu/amd_iommu_types.h b/drivers/iommu/amd_iommu_types.h index aa892fdbd158..d5f48db946c0 100644 --- a/drivers/iommu/amd_iommu_types.h +++ b/drivers/iommu/amd_iommu_types.h @@ -373,6 +373,8 @@ #define IOMMU_PROT_IR 0x01 #define IOMMU_PROT_IW 0x02 +#define IOMMU_UNITY_MAP_FLAG_EXCL_RANGE (1 << 2) + /* IOMMU capabilities */ #define IOMMU_CAP_IOTLB 24 #define IOMMU_CAP_NPCACHE 26 From patchwork Fri Jun 7 17:34:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeff Lane X-Patchwork-Id: 1112893 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=canonical.com Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45Mmbv0CYxz9sNq; Mon, 10 Jun 2019 18:32:58 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1haFjY-0003OD-OB; Mon, 10 Jun 2019 08:32:52 +0000 Received: from youngberry.canonical.com ([91.189.89.112]) by huckleberry.canonical.com with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:128) (Exim 4.86_2) (envelope-from ) id 1hZIlK-0006Cl-Kv for kernel-team@lists.ubuntu.com; Fri, 07 Jun 2019 17:34:46 +0000 Received: from mail-yw1-f72.google.com ([209.85.161.72]) by youngberry.canonical.com with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.76) (envelope-from ) id 1hZIlK-0003fL-7F for kernel-team@lists.ubuntu.com; Fri, 07 Jun 2019 17:34:46 +0000 Received: by mail-yw1-f72.google.com with SMTP id t128so2687140ywd.15 for ; Fri, 07 Jun 2019 10:34:46 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; 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Fri, 07 Jun 2019 10:34:43 -0700 (PDT) From: Jeff Lane To: kernel-team@lists.ubuntu.com Subject: [SRU][COSMIC][PATCH 2/2] iommu/amd: Set exclusion range correctly Date: Fri, 7 Jun 2019 13:34:32 -0400 Message-Id: <20190607173433.32695-5-jeffrey.lane@canonical.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190607173433.32695-1-jeffrey.lane@canonical.com> References: <20190607173433.32695-1-jeffrey.lane@canonical.com> X-Mailman-Approved-At: Mon, 10 Jun 2019 08:32:51 +0000 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Joerg Roedel BugLink: https://bugs.launchpad.net/bugs/1823037 The exlcusion range limit register needs to contain the base-address of the last page that is part of the range, as bits 0-11 of this register are treated as 0xfff by the hardware for comparisons. So correctly set the exclusion range in the hardware to the last page which is _in_ the range. Fixes: b2026aa2dce44 ('x86, AMD IOMMU: add functions for programming IOMMU MMIO space') Signed-off-by: Joerg Roedel (cherry picked from commit 3c677d206210f53a4be972211066c0f1cd47fe12 5.2-rc1) Signed-off-by: Jeffrey Lane --- drivers/iommu/amd_iommu_init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c index 75c6d5b654e6..9b29a425cfb6 100644 --- a/drivers/iommu/amd_iommu_init.c +++ b/drivers/iommu/amd_iommu_init.c @@ -356,7 +356,7 @@ static void iommu_write_l2(struct amd_iommu *iommu, u8 address, u32 val) static void iommu_set_exclusion_range(struct amd_iommu *iommu) { u64 start = iommu->exclusion_start & PAGE_MASK; - u64 limit = (start + iommu->exclusion_length) & PAGE_MASK; + u64 limit = (start + iommu->exclusion_length - 1) & PAGE_MASK; u64 entry; if (!iommu->exclusion_start)