From patchwork Fri Jun 7 17:47:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeff Lane X-Patchwork-Id: 1112144 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=canonical.com Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45L93x3pNwz9sNT; Sat, 8 Jun 2019 03:48:13 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1hZIyI-0007Di-4u; Fri, 07 Jun 2019 17:48:10 +0000 Received: from youngberry.canonical.com ([91.189.89.112]) by huckleberry.canonical.com with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:128) (Exim 4.86_2) (envelope-from ) id 1hZIyE-0007CY-KU for kernel-team@lists.ubuntu.com; Fri, 07 Jun 2019 17:48:06 +0000 Received: from mail-yb1-f198.google.com ([209.85.219.198]) by youngberry.canonical.com with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.76) (envelope-from ) id 1hZIxn-000548-7u for kernel-team@lists.ubuntu.com; Fri, 07 Jun 2019 17:47:39 +0000 Received: by mail-yb1-f198.google.com with SMTP id a13so2667217ybm.5 for ; Fri, 07 Jun 2019 10:47:39 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=YRybYZlXSUs0/wvZWRSVs1PAQZAZZfWHK97AMXdp4fo=; b=RNzFAtagQUeoT/+046EV59R00xnLW12827dN1ExrMbnah+EOlLdE83wvpI0fT+zH7C 2BGLtpudCDIXEr5461So2YOFAD1OJ8BWCr2+sbbNH2zXLJ9SweS8oTWhP8bUu09qSv6m H9fQ/ynzhDM9UCRLW1gCbIcltEwml2sC3A+HLLj3rc24RVRCE+mZ2xN29vyBea+5FGpn l28saBibHopv2kKa0iJWsiYWYJ9cBTda8I1ymyk8HYqh7nPJg3rOyK3PJZ1DRHUhMvXG QGMuQql8eWtMFLnHmrpKokCTHzkpoPyltFzTAbqmizGSmLwA+7CAj6IdmZhsMXxQ8oDA WNNw== X-Gm-Message-State: APjAAAWZzWkI0pPxNRgCnS1ykf0PiaNlU/ZtxhEON6trSkS3k3BgMRBE ZONBtdpfNInpkINPyKWMOVCh4zJN4I3TyhZQlc0h06UZxHsmPHxzLxF2W8+JPapcv5O1MfXunLV RBefCbyFX2KehzRGRI5WUqoOm3jVyObJCp29WZ+Gzjw== X-Received: by 2002:a5b:d0c:: with SMTP id y12mr26785541ybp.472.1559929658003; Fri, 07 Jun 2019 10:47:38 -0700 (PDT) X-Google-Smtp-Source: APXvYqx4VOaRnYoz3CsclPY7BBAvZ+4ZY497kSHoqdX8rtHAF/ZHDp7vH2leZ0PMp/IP0jlvSZ3EvA== X-Received: by 2002:a5b:d0c:: with SMTP id y12mr26785527ybp.472.1559929657680; Fri, 07 Jun 2019 10:47:37 -0700 (PDT) Received: from galactica.lanes ([174.24.193.243]) by smtp.gmail.com with ESMTPSA id t125sm445366ywa.2.2019.06.07.10.47.36 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 07 Jun 2019 10:47:37 -0700 (PDT) From: Jeff Lane To: kernel-team@lists.ubuntu.com Subject: [SRU][COSMIC][PATCH 2/2] iommu/amd: Set exclusion range correctly Date: Fri, 7 Jun 2019 13:47:29 -0400 Message-Id: <20190607174730.13011-5-jeffrey.lane@canonical.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190607174730.13011-1-jeffrey.lane@canonical.com> References: <20190607174730.13011-1-jeffrey.lane@canonical.com> X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Joerg Roedel BugLink: https://bugs.launchpad.net/bugs/1823037 The exlcusion range limit register needs to contain the base-address of the last page that is part of the range, as bits 0-11 of this register are treated as 0xfff by the hardware for comparisons. So correctly set the exclusion range in the hardware to the last page which is _in_ the range. Fixes: b2026aa2dce44 ('x86, AMD IOMMU: add functions for programming IOMMU MMIO space') Signed-off-by: Joerg Roedel (cherry picked from commit 3c677d206210f53a4be972211066c0f1cd47fe12 5.2-rc1) Signed-off-by: Jeffrey Lane --- drivers/iommu/amd_iommu_init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c index 75c6d5b654e6..9b29a425cfb6 100644 --- a/drivers/iommu/amd_iommu_init.c +++ b/drivers/iommu/amd_iommu_init.c @@ -356,7 +356,7 @@ static void iommu_write_l2(struct amd_iommu *iommu, u8 address, u32 val) static void iommu_set_exclusion_range(struct amd_iommu *iommu) { u64 start = iommu->exclusion_start & PAGE_MASK; - u64 limit = (start + iommu->exclusion_length) & PAGE_MASK; + u64 limit = (start + iommu->exclusion_length - 1) & PAGE_MASK; u64 entry; if (!iommu->exclusion_start)