From patchwork Wed Jun 5 22:17:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Paul A. Clarke" X-Patchwork-Id: 1110788 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=sourceware.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=libc-alpha-return-102473-incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=us.ibm.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b="Jj3/a7Xo"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45K37J3QRtz9s4Y for ; Thu, 6 Jun 2019 08:17:15 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:cc:subject:date:message-id; q=dns; s= default; b=cmTv3zFz5omgSkFqZj25gijuDHIR5JDM5LS2Z0O/H7p+7nJSL1xGX 1TDRVf5pntwuCpxu8F75+Z64UHbdwYd7fA7/zOvdFkU4dlZo7lGPqrY3Z15NQoSl 3L2tHOmz/BW01sSl0NzxgYPzX/+7WCyl+eXOadMrPtxG8C/xk64+Dc= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:cc:subject:date:message-id; s=default; bh=McwPlTiEIQw5rKa7yIMhBiAVCso=; b=Jj3/a7XoxvQlvwN91aki8K07mx0V BtmChy2tFnlEl9LQwWVGO9CZGyJ/7nbmuHRbBB64fyod/m1KwP92RUL3r1ij67p+ 293Jz1Uu5wEg49lY8jz63lZTm3Y3XZLsOJQClLMna03SFKh8BFfNO91aP3d8n7MJ I1fjGrzgfXUdeJE= Received: (qmail 16066 invoked by alias); 5 Jun 2019 22:17:10 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 16052 invoked by uid 89); 5 Jun 2019 22:17:09 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-27.6 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT, RCVD_IN_DNSWL_LOW autolearn=ham version=3.3.1 spammy= X-HELO: mx0a-001b2d01.pphosted.com From: "Paul A. Clarke" To: libc-alpha@sourceware.org Cc: tuliom@ascii.art.br Subject: [PATCH] [powerpc] get_rounding_mode: utilize faster method to get rounding mode Date: Wed, 5 Jun 2019 17:17:02 -0500 x-cbid: 19060522-2213-0000-0000-0000039A9AA8 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00011221; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000286; SDB=6.01213772; UDB=6.00637972; IPR=6.00994845; MB=3.00027199; MTD=3.00000008; XFM=3.00000015; UTC=2019-06-05 22:17:04 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19060522-2214-0000-0000-00005EBACA0F Message-Id: <1559773022-26575-1-git-send-email-pc@us.ibm.com> From: "Paul A. Clarke" Add support to use 'mffsl' instruction if compiled for POWER9 (or later). Also, mask the result to avoid bleeding unrelated bits into the result of _FPU_GET_RC(). 2019-06-05 Paul A. Clarke * sysdeps/powerpc/fpu/fegetexcept.c (__fegetexcept): Replace code with call to equivalent function. * sysdeps/powerpc/fpu/fenv_libc.h (fegetenv_status): New function. * sysdeps/powerpc/fpu_control.h (_FPU_MASK_RC): New. (__FPU_MFFS): New. (__FPU_MFFSL): New. (_FPU_GET_RC): New. (_FPU_GETCW): Use __FPU_MFFS(). * sysdeps/powerpc/powerpc64/get-rounding-mode.h: New file. Reviewed-by: Tulio Magno Quites Machado Filho --- sysdeps/powerpc/fpu/fenv_libc.h | 15 ++++++++++++ sysdeps/powerpc/fpu_control.h | 29 ++++++++++++++++++++--- sysdeps/powerpc/powerpc64/get-rounding-mode.h | 33 +++++++++++++++++++++++++++ 3 files changed, 74 insertions(+), 3 deletions(-) create mode 100644 sysdeps/powerpc/powerpc64/get-rounding-mode.h diff --git a/sysdeps/powerpc/fpu/fenv_libc.h b/sysdeps/powerpc/fpu/fenv_libc.h index 8a0bace..621e57f 100644 --- a/sysdeps/powerpc/fpu/fenv_libc.h +++ b/sysdeps/powerpc/fpu/fenv_libc.h @@ -34,6 +34,21 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden; pointer. */ #define fegetenv_register() __builtin_mffs() +/* Equivalent to fegetenv_register, but only returns bits for + status, exception enables, and mode. */ +#ifdef _ARCH_PWR9 +#define fegetenv_status() \ + ({union { double __d; unsigned long long __ll; } __u; \ + register double __fr; \ + __asm__ ("mffsl %0" : "=f" (__fr)); \ + __u.__d = __fr; \ + __u.__ll; \ + }) +#else +#define fegetenv_status() __builtin_mffs() +#error "power8" +#endif + /* Equivalent to fesetenv, but takes a fenv_t instead of a pointer. */ #define fesetenv_register(env) \ do { \ diff --git a/sysdeps/powerpc/fpu_control.h b/sysdeps/powerpc/fpu_control.h index e0c5cf6..22c52b7 100644 --- a/sysdeps/powerpc/fpu_control.h +++ b/sysdeps/powerpc/fpu_control.h @@ -71,6 +71,8 @@ extern fpu_control_t __fpu_control; # define _FPU_RC_UP 0x02 # define _FPU_RC_ZERO 0x01 +# define _FPU_MASK_RC (_FPU_RC_NEAREST|_FPU_RC_DOWN|_FPU_RC_UP|_FPU_RC_ZERO) + # define _FPU_MASK_NI 0x04 /* non-ieee mode */ /* masking of interrupts */ @@ -94,15 +96,36 @@ extern fpu_control_t __fpu_control; typedef unsigned int fpu_control_t; /* Macros for accessing the hardware control word. */ +# define __FPU_MFFS() \ + ({register double __fr; \ + __asm__ ("mffs %0" : "=f" (__fr)); \ + __fr; \ + }) + # define _FPU_GETCW(cw) \ ({union { double __d; unsigned long long __ll; } __u; \ - register double __fr; \ - __asm__ ("mffs %0" : "=f" (__fr)); \ - __u.__d = __fr; \ + __u.__d = __FPU_MFFS(); \ (cw) = (fpu_control_t) __u.__ll; \ (fpu_control_t) __u.__ll; \ }) +#ifdef _ARCH_PWR9 +# define __FPU_MFFSL() \ + ({register double __fr; \ + __asm__ ("mffsl %0" : "=f" (__fr)); \ + __fr; \ + }) +#else +# define __FPU_MFFSL() __FPU_MFFS() +#endif + +# define _FPU_GET_RC() \ + ({union { double __d; unsigned long long __ll; } __u; \ + __u.__d = __FPU_MFFSL(); \ + __u.__ll &= _FPU_MASK_RC; \ + (fpu_control_t) __u.__ll; \ + }) + # define _FPU_SETCW(cw) \ { union { double __d; unsigned long long __ll; } __u; \ register double __fr; \ diff --git a/sysdeps/powerpc/powerpc64/get-rounding-mode.h b/sysdeps/powerpc/powerpc64/get-rounding-mode.h new file mode 100644 index 0000000..e2fdbbb --- /dev/null +++ b/sysdeps/powerpc/powerpc64/get-rounding-mode.h @@ -0,0 +1,33 @@ +/* Determine floating-point rounding mode within libc. powerpc64 version. + Copyright (C) 2019 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#ifndef _POWERPC64_GET_ROUNDING_MODE_H +#define _POWERPC64_GET_ROUNDING_MODE_H 1 + +#include +#include + +/* Return the floating-point rounding mode. */ + +static inline int +get_rounding_mode (void) +{ + return _FPU_GET_RC (); +} + +#endif /* get-rounding-mode.h */