From patchwork Thu May 30 03:20:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1107509 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45DtkB40KFz9sSy for ; Thu, 30 May 2019 13:44:34 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="XX+soTa+"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 45Dtk95pKlzDqDf for ; Thu, 30 May 2019 13:44:33 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::542; helo=mail-pg1-x542.google.com; envelope-from=oohall@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="XX+soTa+"; dkim-atps=neutral Received: from mail-pg1-x542.google.com (mail-pg1-x542.google.com [IPv6:2607:f8b0:4864:20::542]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 45DtCD64qRzDqKb for ; Thu, 30 May 2019 13:21:12 +1000 (AEST) Received: by mail-pg1-x542.google.com with SMTP id n2so1095763pgp.11 for ; Wed, 29 May 2019 20:21:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=QXD/CzpiupbYw8uBiCbzIWoaSVUA0FN3q4odkBGiink=; b=XX+soTa+WF7KJhKbzv3+cKhdF2tolFew2be4FaGHnYAohN7kgFjDKx1pjFSpGlbQJZ wg0osUZVrNQoXPfLvAkO/CwKt72EFB+ZHBxhkNmpLNzSVsFxDBITjT7cUvtYWOiZvpOh lgUf521gy0iduxQytt/dQbMX8X6Dn/QnTzCRQmXS7VWazlwftcUm7DAWlSAXj9nvNS18 E4iiD0fqrf38BayEU9ISFs02Q2K09VF+q0d3pVkoAcuSW0fr/NjtBj1ELzgIrO81SCPh xPRzCwXReryAk72qe05YZVTDzfwAAassbTTxPUXraZuSSNlKkA33xzTEmR9LWz/HyUoR D+jA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=QXD/CzpiupbYw8uBiCbzIWoaSVUA0FN3q4odkBGiink=; b=Hy9qcu+dHx+Twnc8bOJ0RvUk35Vh5rqbbLF/RobOf1VcXLSNIeqR5dZRqiwm16oXXE wRDbd3Nmxc1UsX90bF0U7CSuE2XzPOVJd2BUod5eEErsIltMxwUft/h28zijyUVyWK6h cX1OlnIkQyuLDgKZCDOF+N9Y7Rjrkq0D0xQ4Qiy48xK2fD95pP8jepMGOz0Aaw91UpnC 8JgHU7cwrx8tspAFeJUtF65Neb+VNdEWZ/ITl26mYOE0q7CBufBvVPmDKe6dyuew2kgr +saa4Q6ssIl4V6w3gaZxHZaItWC4KzfNaL7XEA2/tev1zotvb7CpYasyAjfynF4kTXS4 audQ== X-Gm-Message-State: APjAAAU3TBT3Lf2ZFDOh1m83175CUUxybHYbSBXdow/wBi+jAc3nvL4h ONh7122AXruvft4tME6lqFKI3lEW X-Google-Smtp-Source: APXvYqxn87/nsT330BE+OXTrqvZx5fobjjCgBbsaTegruIWlEG/PsonV/xDm22o9FBSA8RZhSd4WmQ== X-Received: by 2002:a17:90a:364b:: with SMTP id s69mr1427512pjb.15.1559186467931; Wed, 29 May 2019 20:21:07 -0700 (PDT) Received: from wafer.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id n2sm730696pgp.27.2019.05.29.20.21.06 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 29 May 2019 20:21:07 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Thu, 30 May 2019 13:20:54 +1000 Message-Id: <20190530032056.26355-1-oohall@gmail.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Subject: [Skiboot] [PATCH 1/3] hw/phb4: Add missing LTSSM states X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" The "disabled" and "loopback" states are missing from the table. We never expect to see the second, but the first does occasionally come up. Signed-off-by: Oliver O'Halloran --- hw/phb4.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/hw/phb4.c b/hw/phb4.c index b9035a9ce3ba..cbe6b668f146 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -2385,6 +2385,12 @@ static void phb4_train_info(struct phb4 *p, uint64_t reg, unsigned long time) case PHB_PCIE_DLP_LTSSM_HOTRESET: snprintf(s, sizeof(s), "%shotreset", s); break; + case PHB_PCIE_DLP_LTSSM_DISABLED: + snprintf(s, sizeof(s), "%sdisabled", s); + break; + case PHB_PCIE_DLP_LTSSM_LOOPBACK: + snprintf(s, sizeof(s), "%sloopback", s); + break; default: snprintf(s, sizeof(s), "%sunvalid", s); } From patchwork Thu May 30 03:20:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1107510 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45Dtkb6BRLz9sPk for ; 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Wed, 29 May 2019 20:21:12 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Thu, 30 May 2019 13:20:55 +1000 Message-Id: <20190530032056.26355-2-oohall@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190530032056.26355-1-oohall@gmail.com> References: <20190530032056.26355-1-oohall@gmail.com> MIME-Version: 1.0 Subject: [Skiboot] [PATCH 2/3] hw/phb4: Set trace enable where it's used X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" The current LTSSM state was added to the PHB4 link trace output in 961547bceed3 ("phb4: Enhanced PCIe training tracing"). That patch split enabling the LTSSM state output from the rest of the tracing code in phb4_training_trace() to ensure that it would capture events from right after PERST is lifted. This is not really necessary since LTSSM state changes occur over milliseconds. We lose nothing by delaying the enable slightly so this patch moves it into phb4_training_trace() to keep the tracing code in one place. Signed-off-by: Oliver O'Halloran --- hw/phb4.c | 34 ++++++++++++++++++++++------------ 1 file changed, 22 insertions(+), 12 deletions(-) diff --git a/hw/phb4.c b/hw/phb4.c index cbe6b668f146..0c549e18f664 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -2658,11 +2658,21 @@ static bool phb4_link_optimal(struct pci_slot *slot, uint32_t *vdid) */ static void phb4_training_trace(struct phb4 *p) { - uint64_t reg, reglast = -1; + uint64_t trwctl, reg, reglast = -1; unsigned long now, start = mftb(); + bool enabled; + + /* + * Enable the DLP trace outputs. If we don't the LTSSM state in + * PHB_PCIE_DLP_TRAIN_CTL won't be updated and always reads zero. + */ + trwctl = phb4_read_reg(p, PHB_PCIE_DLP_TRWCTL); + enabled = !!(trwctl & PHB_PCIE_DLP_TRWCTL_EN); + if (!enabled) { + phb4_write_reg(p, PHB_PCIE_DLP_TRWCTL, + trwctl | PHB_PCIE_DLP_TRWCTL_EN); + } - if (!pci_tracing) - return; while(1) { now = mftb(); @@ -2684,6 +2694,13 @@ static void phb4_training_trace(struct phb4 *p) break; } } + + /* + * The trace enable bit is a clock gate for the tracing logic. Turn + * it off to save power if we're not using it otherwise. + */ + if (!enabled) + phb4_write_reg(p, PHB_PCIE_DLP_TRWCTL, trwctl); } /* @@ -2976,7 +2993,6 @@ static int64_t phb4_hreset(struct pci_slot *slot) static int64_t phb4_freset(struct pci_slot *slot) { struct phb4 *p = phb_to_phb4(slot->phb); - uint64_t reg; switch(slot->state) { case PHB4_SLOT_NORMAL: @@ -3007,17 +3023,11 @@ static int64_t phb4_freset(struct pci_slot *slot) /* Clear link errors before we deassert PERST */ phb4_err_clear_regb(p); - if (pci_tracing) { - /* Enable tracing */ - reg = in_be64(p->regs + PHB_PCIE_DLP_TRWCTL); - out_be64(p->regs + PHB_PCIE_DLP_TRWCTL, - reg | PHB_PCIE_DLP_TRWCTL_EN); - } - PHBDBG(p, "FRESET: Deassert\n"); phb4_assert_perst(slot, false); - phb4_training_trace(p); + if (pci_tracing) + phb4_training_trace(p) pci_slot_set_state(slot, PHB4_SLOT_LINK_START); return slot->ops.poll_link(slot); From patchwork Thu May 30 03:20:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1107511 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45Dtkw2Gw3z9sSx for ; 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Wed, 29 May 2019 20:21:13 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Thu, 30 May 2019 13:20:56 +1000 Message-Id: <20190530032056.26355-3-oohall@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190530032056.26355-1-oohall@gmail.com> References: <20190530032056.26355-1-oohall@gmail.com> MIME-Version: 1.0 Subject: [Skiboot] [PATCH 3/3] hw/phb4: Make phb4_training_trace() more general X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" phb4_training_trace() is used to monitor the Link Training Status State Machine (LTSSM) of the PHB's data link layer. Currently it is only used to observe the LTSSM while bringing up the link, but sometimes it's useful to see what's occurring in other situations (e.g. link disable, or secondary bus reset). This patch renames it to phb4_link_trace() and allows the target LTSSM state and a flexible timeout to help in these situations. Signed-off-by: Oliver O'Halloran --- hw/phb4.c | 44 +++++++++++++++++++++++++------------------- 1 file changed, 25 insertions(+), 19 deletions(-) diff --git a/hw/phb4.c b/hw/phb4.c index 0c549e18f664..fb6736643ba1 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -2337,12 +2337,13 @@ static int64_t phb4_retry_state(struct pci_slot *slot) return pci_slot_set_sm_timeout(slot, msecs_to_tb(1)); } -static void phb4_train_info(struct phb4 *p, uint64_t reg, unsigned long time) +static uint64_t phb4_train_info(struct phb4 *p, uint64_t reg, unsigned long dt) { + uint64_t ltssm_state = GETFIELD(PHB_PCIE_DLP_LTSSM_TRC, reg); char s[80]; snprintf(s, sizeof(s), "TRACE:0x%016llx % 2lims", - reg, tb_to_msecs(time)); + reg, tb_to_msecs(dt)); if (reg & PHB_PCIE_DLP_TL_LINKACT) snprintf(s, sizeof(s), "%s trained ", s); @@ -2357,7 +2358,7 @@ static void phb4_train_info(struct phb4 *p, uint64_t reg, unsigned long time) GETFIELD(PHB_PCIE_DLP_LINK_SPEED, reg), GETFIELD(PHB_PCIE_DLP_LINK_WIDTH, reg)); - switch (GETFIELD(PHB_PCIE_DLP_LTSSM_TRC, reg)) { + switch (ltssm_state) { case PHB_PCIE_DLP_LTSSM_RESET: snprintf(s, sizeof(s), "%sreset", s); break; @@ -2395,6 +2396,8 @@ static void phb4_train_info(struct phb4 *p, uint64_t reg, unsigned long time) snprintf(s, sizeof(s), "%sunvalid", s); } PHBNOTICE(p, "%s\n", s); + + return ltssm_state; } static void phb4_dump_pec_err_regs(struct phb4 *p) @@ -2656,10 +2659,10 @@ static bool phb4_link_optimal(struct pci_slot *slot, uint32_t *vdid) * training. If any errors are detected it simply returns so the * normal code can deal with it. */ -static void phb4_training_trace(struct phb4 *p) +static void phb4_link_trace(struct phb4 *p, uint64_t target_state, int max_ms) { + unsigned long now, end, start = mftb(), state = 0; uint64_t trwctl, reg, reglast = -1; - unsigned long now, start = mftb(); bool enabled; /* @@ -2673,28 +2676,31 @@ static void phb4_training_trace(struct phb4 *p) trwctl | PHB_PCIE_DLP_TRWCTL_EN); } + end = start + msecs_to_tb(max_ms); + now = start; - while(1) { - now = mftb(); + do { reg = in_be64(p->regs + PHB_PCIE_DLP_TRAIN_CTL); if (reg != reglast) - phb4_train_info(p, reg, now - start); + state = phb4_train_info(p, reg, now - start); reglast = reg; if (!phb4_check_reg(p, reg)) { - PHBNOTICE(p, "TRACE: PHB fence waiting link.\n"); - break; - } - if (reg & PHB_PCIE_DLP_TL_LINKACT) { - PHBNOTICE(p, "TRACE: Link trained.\n"); - break; + PHBNOTICE(p, "TRACE: PHB fenced.\n"); + goto out; } - if ((now - start) > secs_to_tb(3)) { - PHBNOTICE(p, "TRACE: Timeout waiting for link up.\n"); - break; + + if (tb_compare(now, end) == TB_AAFTERB) { + PHBNOTICE(p, "TRACE: Timed out after %dms\n", max_ms); + goto out; } - } + now = mftb(); + } while (state != target_state); + + PHBNOTICE(p, "TRACE: Reached target state\n"); + +out: /* * The trace enable bit is a clock gate for the tracing logic. Turn * it off to save power if we're not using it otherwise. @@ -3027,7 +3033,7 @@ static int64_t phb4_freset(struct pci_slot *slot) phb4_assert_perst(slot, false); if (pci_tracing) - phb4_training_trace(p) + phb4_link_trace(p, PHB_PCIE_DLP_LTSSM_L0, 3000); pci_slot_set_state(slot, PHB4_SLOT_LINK_START); return slot->ops.poll_link(slot);