From patchwork Tue May 28 22:50:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 1106586 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="QcbFeV08"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45D8F54xgLz9s3Z for ; Wed, 29 May 2019 08:50:17 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727529AbfE1WuQ (ORCPT ); Tue, 28 May 2019 18:50:16 -0400 Received: from mail-wm1-f68.google.com ([209.85.128.68]:35126 "EHLO mail-wm1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726600AbfE1WuP (ORCPT ); Tue, 28 May 2019 18:50:15 -0400 Received: by mail-wm1-f68.google.com with SMTP id w9so220686wmi.0 for ; Tue, 28 May 2019 15:50:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=RiDQ9CNES6CwCHlKok45HmAa5anJ9F0Gd3not8Fx9IM=; b=QcbFeV08Nq5pa9Wspsi0u4pCLE8Sq8xi3KHX5sBDkDJMRiIF7ep9SZgf443VTkRIZ0 2eTDLbQ+3PXO4H+Zf+KZDBPP+BAJfFNdq7UJRFyhxdteREjiJ4BPmw4kbWy1wCybl+wl VKQrSM7hAGh7dE4zwxHvJY8mgwYxEYMrC42m/EgaHLEhsvgABxtMGu8Z5YZOPBo5vqwZ awbPYqWrQ5ubhAZxlPpOWCqMc62IoizCAT3pzQmeVF/oSmcEcESOpFbn7ncYPQULe+3T VjtlYLRyd/sK3GYyAm5RoXQZYwyM+HndRDVbFj1QSkztsz+80E6piGXMXv9r5ghBVGCJ WK+A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=RiDQ9CNES6CwCHlKok45HmAa5anJ9F0Gd3not8Fx9IM=; b=Sf6kwW3tNujzKn9/cSYiHAMdRKKdrW67GAbcAamQrQtj0r3pRXNbVX55LixK9g/cVb oS/FAHZWN6OAeQgZNPwy++EqeyfsNbW8ay3KR4GC/HhnQVc8FTb6ffCqYdtHMLnJdRzi Afbq+wUekDw/ozqMwJeO6JreFOBk+3WO+DlJpIse5Sm6WmfIoBiLWFxv3HeK/xHPTq8a /mIZ442P4tZ9oitxGg2EXkNM6JrRyaihnxjo1UJLLfO+aBbyzskKW0qGBG6EVejCVC6+ eoQdrQcnjaBBhWfpFPk+X1QWRkwogPDXm/ZOTR+rp8JssSovSuOoGzcweJO+9ODm8XfW /1Jw== X-Gm-Message-State: APjAAAWYCyHXVLCMpZdGa7DRf1pFp4xabqTKZx9iO0SCVZK0wqpuR9cC YMBj8djhbDpQ+1+QlZEuzzY= X-Google-Smtp-Source: APXvYqx9Egs7JCLMj5HPW61fmnEQj+20h9EewM38zIVG20AXGuD2NXIIITzQK/Xc7henYvgvRwMb3A== X-Received: by 2002:a7b:c549:: with SMTP id j9mr4427806wmk.122.1559083813418; Tue, 28 May 2019 15:50:13 -0700 (PDT) Received: from localhost.localdomain ([86.121.27.188]) by smtp.gmail.com with ESMTPSA id f2sm6623658wrq.48.2019.05.28.15.50.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 28 May 2019 15:50:12 -0700 (PDT) From: Vladimir Oltean To: f.fainelli@gmail.com, vivien.didelot@gmail.com, andrew@lunn.ch, davem@davemloft.net Cc: ioana.ciornei@nxp.com, netdev@vger.kernel.org, Vladimir Oltean Subject: [PATCH net 1/2] net: dsa: tag_8021q: Change order of rx_vid setup Date: Wed, 29 May 2019 01:50:04 +0300 Message-Id: <20190528225005.10628-2-olteanv@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190528225005.10628-1-olteanv@gmail.com> References: <20190528225005.10628-1-olteanv@gmail.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Ioana Ciornei The 802.1Q tagging performs an unbalanced setup in terms of RX VIDs on the CPU port. For the ingress path of a 802.1Q switch to work, the RX VID of a port needs to be seen as tagged egress on the CPU port. While configuring the other front-panel ports to be part of this VID, for bridge scenarios, the untagged flag is applied even on the CPU port in dsa_switch_vlan_add. This happens because DSA applies the same flags on the CPU port as on the (bridge-controlled) slave ports, and the effect in this case is that the CPU port tagged settings get deleted. Instead of fixing DSA by introducing a way to control VLAN flags on the CPU port (and hence stop inheriting from the slave ports) - a hard, perhaps intractable problem - avoid this situation by moving the setup part of the RX VID on the CPU port after all the other front-panel ports have been added to the VID. Signed-off-by: Ioana Ciornei Signed-off-by: Vladimir Oltean Fixes: f9bbe4477c30 ("net: dsa: Optional VLAN-based port separation for switches without tagging") Reviewed-by: Florian Fainelli --- net/dsa/tag_8021q.c | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/net/dsa/tag_8021q.c b/net/dsa/tag_8021q.c index 8ae48c7e1e76..4adec6bbfe59 100644 --- a/net/dsa/tag_8021q.c +++ b/net/dsa/tag_8021q.c @@ -128,10 +128,7 @@ int dsa_port_setup_8021q_tagging(struct dsa_switch *ds, int port, bool enabled) u16 flags; if (i == upstream) - /* CPU port needs to see this port's RX VID - * as tagged egress. - */ - flags = 0; + continue; else if (i == port) /* The RX VID is pvid on this port */ flags = BRIDGE_VLAN_INFO_UNTAGGED | @@ -150,6 +147,20 @@ int dsa_port_setup_8021q_tagging(struct dsa_switch *ds, int port, bool enabled) return err; } } + + /* CPU port needs to see this port's RX VID + * as tagged egress. + */ + if (enabled) + err = dsa_port_vid_add(upstream_dp, rx_vid, 0); + else + err = dsa_port_vid_del(upstream_dp, rx_vid); + if (err) { + dev_err(ds->dev, "Failed to apply RX VID %d to port %d: %d\n", + rx_vid, port, err); + return err; + } + /* Finally apply the TX VID on this port and on the CPU port */ if (enabled) err = dsa_port_vid_add(dp, tx_vid, BRIDGE_VLAN_INFO_UNTAGGED); From patchwork Tue May 28 22:50:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 1106587 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; 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Tue, 28 May 2019 15:50:13 -0700 (PDT) From: Vladimir Oltean To: f.fainelli@gmail.com, vivien.didelot@gmail.com, andrew@lunn.ch, davem@davemloft.net Cc: ioana.ciornei@nxp.com, netdev@vger.kernel.org, Vladimir Oltean Subject: [PATCH net 2/2] net: dsa: tag_8021q: Create a stable binary format Date: Wed, 29 May 2019 01:50:05 +0300 Message-Id: <20190528225005.10628-3-olteanv@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190528225005.10628-1-olteanv@gmail.com> References: <20190528225005.10628-1-olteanv@gmail.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Tools like tcpdump need to be able to decode the significance of fake VLAN headers that DSA uses to separate switch ports. But currently these have no global significance - they are simply an ordered list of DSA_MAX_SWITCHES x DSA_MAX_PORTS numbers ending at 4095. The reason why this is submitted as a fix is that the existing mapping of VIDs should not enter into a stable kernel, so we can pretend that only the new format exists. This way tcpdump won't need to try to make something out of the VLAN tags on 5.2 kernels. Fixes: f9bbe4477c30 ("net: dsa: Optional VLAN-based port separation for switches without tagging") Signed-off-by: Vladimir Oltean Reviewed-by: Florian Fainelli --- net/dsa/tag_8021q.c | 54 ++++++++++++++++++++++++++++++++++++--------- 1 file changed, 44 insertions(+), 10 deletions(-) diff --git a/net/dsa/tag_8021q.c b/net/dsa/tag_8021q.c index 4adec6bbfe59..4c2c70ce5d54 100644 --- a/net/dsa/tag_8021q.c +++ b/net/dsa/tag_8021q.c @@ -11,20 +11,54 @@ #include "dsa_priv.h" -/* Allocating two VLAN tags per port - one for the RX VID and - * the other for the TX VID - see below +/* Binary structure of the fake 12-bit VID field (when the TPID is + * ETH_P_DSA_8021Q): + * + * +-----+------+-----------------+------+-----------------------------+-----+ + * | DIR | RSVD | SWITCH_ID | RSVD | PORT | MBZ | + * +-----+------+-----------------+------+-----------------------------+-----+ + * 12 11 10 7 6 1 0 + * + * DIR - VID[11]: + * Direction flag. 0 for RX VLAN, 1 for TX VLAN + * + * RSVD - VID[10]: + * To be used for further expansion of SWITCH_ID or for other purposes. + * + * SWITCH_ID - VID[9:7]: + * Index of switch within DSA tree. Must be between 0 and + * DSA_MAX_SWITCHES - 1. + * + * RSVD - VID[6]: + * To be used for further expansion of PORT or for other purposes. + * + * PORT - VID[5:1]: + * Index of switch port. Must be between 0 and DSA_MAX_PORTS - 1. + * + * MBZ - VID[0]: + * Must be zero. This makes the special VIDs of 0, 1 and 4095 to be left + * unused by this coding scheme. */ -#define DSA_8021Q_VID_RANGE (DSA_MAX_SWITCHES * DSA_MAX_PORTS) -#define DSA_8021Q_VID_BASE (VLAN_N_VID - 2 * DSA_8021Q_VID_RANGE - 1) -#define DSA_8021Q_RX_VID_BASE (DSA_8021Q_VID_BASE) -#define DSA_8021Q_TX_VID_BASE (DSA_8021Q_VID_BASE + DSA_8021Q_VID_RANGE) + +#define DSA_8021Q_DIR_TX BIT(11) + +#define DSA_8021Q_SWITCH_ID_SHIFT 7 +#define DSA_8021Q_SWITCH_ID_MASK GENMASK(9, 7) +#define DSA_8021Q_SWITCH_ID(x) (((x) << DSA_8021Q_SWITCH_ID_SHIFT) & \ + DSA_8021Q_SWITCH_ID_MASK) + +#define DSA_8021Q_PORT_MASK GENMASK(5, 1) +#define DSA_8021Q_PORT_SHIFT 1 +#define DSA_8021Q_PORT(x) (((x) << DSA_8021Q_PORT_SHIFT) & \ + DSA_8021Q_PORT_MASK) /* Returns the VID to be inserted into the frame from xmit for switch steering * instructions on egress. Encodes switch ID and port ID. */ u16 dsa_8021q_tx_vid(struct dsa_switch *ds, int port) { - return DSA_8021Q_TX_VID_BASE + (DSA_MAX_PORTS * ds->index) + port; + return DSA_8021Q_DIR_TX | DSA_8021Q_SWITCH_ID(ds->index) | + DSA_8021Q_PORT(port); } EXPORT_SYMBOL_GPL(dsa_8021q_tx_vid); @@ -33,21 +67,21 @@ EXPORT_SYMBOL_GPL(dsa_8021q_tx_vid); */ u16 dsa_8021q_rx_vid(struct dsa_switch *ds, int port) { - return DSA_8021Q_RX_VID_BASE + (DSA_MAX_PORTS * ds->index) + port; + return DSA_8021Q_SWITCH_ID(ds->index) | DSA_8021Q_PORT(port); } EXPORT_SYMBOL_GPL(dsa_8021q_rx_vid); /* Returns the decoded switch ID from the RX VID. */ int dsa_8021q_rx_switch_id(u16 vid) { - return ((vid - DSA_8021Q_RX_VID_BASE) / DSA_MAX_PORTS); + return (vid & DSA_8021Q_SWITCH_ID_MASK) >> DSA_8021Q_SWITCH_ID_SHIFT; } EXPORT_SYMBOL_GPL(dsa_8021q_rx_switch_id); /* Returns the decoded port ID from the RX VID. */ int dsa_8021q_rx_source_port(u16 vid) { - return ((vid - DSA_8021Q_RX_VID_BASE) % DSA_MAX_PORTS); + return (vid & DSA_8021Q_PORT_MASK) >> DSA_8021Q_PORT_SHIFT; } EXPORT_SYMBOL_GPL(dsa_8021q_rx_source_port);