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[37.60.189.18]) by smtp.gmail.com with ESMTPSA id n63sm3891094wmn.38.2019.05.21.09.11.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 21 May 2019 09:11:11 -0700 (PDT) From: =?utf-8?b?Q2zDqW1lbnQgUMOpcm9u?= To: David Airlie , Daniel Vetter , Rob Herring , Mark Rutland , Maxime Ripard , Chen-Yu Tsai , Tomeu Vizoso , Will Deacon , Robin Murphy , Joerg Roedel , Neil Armstrong , Steven Price Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, Icenowy Zheng , =?utf-8?b?Q2zDqW1lbnQgUMOpcm9u?= Subject: [PATCH v6 3/6] dt-bindings: gpu: add bus clock for Mali Midgard GPUs Date: Tue, 21 May 2019 18:10:59 +0200 Message-Id: <20190521161102.29620-4-peron.clem@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190521161102.29620-1-peron.clem@gmail.com> References: <20190521161102.29620-1-peron.clem@gmail.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Icenowy Zheng Some SoCs adds a bus clock gate to the Mali Midgard GPU. Add the binding for the bus clock. Signed-off-by: Icenowy Zheng Signed-off-by: Clément Péron Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt index 1b1a74129141..2e8bbce35695 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt @@ -31,6 +31,12 @@ Optional properties: - clocks : Phandle to clock for the Mali Midgard device. +- clock-names : Specify the names of the clocks specified in clocks + when multiple clocks are present. + * core: clock driving the GPU itself (When only one clock is present, + assume it's this clock.) + * bus: bus clock for the GPU + - mali-supply : Phandle to regulator for the Mali device. Refer to Documentation/devicetree/bindings/regulator/regulator.txt for details. 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[37.60.189.18]) by smtp.gmail.com with ESMTPSA id n63sm3891094wmn.38.2019.05.21.09.11.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 21 May 2019 09:11:12 -0700 (PDT) From: =?utf-8?b?Q2zDqW1lbnQgUMOpcm9u?= To: David Airlie , Daniel Vetter , Rob Herring , Mark Rutland , Maxime Ripard , Chen-Yu Tsai , Tomeu Vizoso , Will Deacon , Robin Murphy , Joerg Roedel , Neil Armstrong , Steven Price Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, =?utf-8?b?Q2zDqW1lbnQgUMOpcm9u?= Subject: [PATCH v6 4/6] dt-bindings: gpu: mali-midgard: Add H6 mali gpu compatible Date: Tue, 21 May 2019 18:11:00 +0200 Message-Id: <20190521161102.29620-5-peron.clem@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190521161102.29620-1-peron.clem@gmail.com> References: <20190521161102.29620-1-peron.clem@gmail.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This add the H6 mali compatible in the dt-bindings to later support specific implementation. Signed-off-by: Clément Péron Reviewed-by: Rob Herring --- .../devicetree/bindings/gpu/arm,mali-midgard.txt | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt index 2e8bbce35695..4bf17e1cf555 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt @@ -15,6 +15,7 @@ Required properties: + "arm,mali-t860" + "arm,mali-t880" * which must be preceded by one of the following vendor specifics: + + "allwinner,sun50i-h6-mali" + "amlogic,meson-gxm-mali" + "rockchip,rk3288-mali" + "rockchip,rk3399-mali" @@ -49,9 +50,15 @@ Vendor-specific bindings ------------------------ The Mali GPU is integrated very differently from one SoC to -another. In order to accomodate those differences, you have the option +another. In order to accommodate those differences, you have the option to specify one more vendor-specific compatible, among: +- "allwinner,sun50i-h6-mali" + Required properties: + - clocks : phandles to core and bus clocks + - clock-names : must contain "core" and "bus" + - resets: phandle to GPU reset line + - "amlogic,meson-gxm-mali" Required properties: - resets : Should contain phandles of :