From patchwork Fri Sep 1 16:25:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jan Beulich X-Patchwork-Id: 808810 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3xkPvT1R1Sz9t3F for ; Sat, 2 Sep 2017 02:33:56 +1000 (AEST) Received: from localhost ([::1]:48635 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dnotF-0001yL-Uw for incoming@patchwork.ozlabs.org; Fri, 01 Sep 2017 12:33:53 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43081) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dnolR-0004Nq-Sq for qemu-devel@nongnu.org; Fri, 01 Sep 2017 12:25:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dnolO-0000vz-Og for qemu-devel@nongnu.org; Fri, 01 Sep 2017 12:25:49 -0400 Received: from prv-mh.provo.novell.com ([137.65.248.74]:33405) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dnolO-0000v2-7R for qemu-devel@nongnu.org; Fri, 01 Sep 2017 12:25:46 -0400 Received: from INET-PRV-MTA by prv-mh.provo.novell.com with Novell_GroupWise; Fri, 01 Sep 2017 10:25:43 -0600 Message-Id: <59A9A6260200007800176A6A@prv-mh.provo.novell.com> X-Mailer: Novell GroupWise Internet Agent 14.2.2 Date: Fri, 01 Sep 2017 10:25:42 -0600 From: "Jan Beulich" To: References: <59A9A6260200007800176A6A@prv-mh.provo.novell.com> Mime-Version: 1.0 Content-Disposition: inline X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 137.65.248.74 Subject: [Qemu-devel] [PATCH] xen: use vMSI related #define-s from public interface X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: xen-devel , Stefano Stabellini Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Xen and qemu having identical #define-s (with different names) is a strong hint that these should have been part of the public interface from the very start. Use them if they're available, falling back to privately defined values only when using older headers. Signed-off-by: Jan Beulich Reviewed-by: Roger Pau Monné --- a/hw/xen/xen_pt_msi.c +++ b/hw/xen/xen_pt_msi.c @@ -18,6 +18,11 @@ #define XEN_PT_AUTO_ASSIGN -1 +#ifndef XEN_DOMCTL_VMSI_X86_DEST_ID_MASK +#if XEN_DOMCTL_INTERFACE_VERSION >= 0x0000000e +#error vMSI defines missing from domctl.h +#endif + /* shift count for gflags */ #define XEN_PT_GFLAGS_SHIFT_DEST_ID 0 #define XEN_PT_GFLAGS_SHIFT_RH 8 @@ -26,6 +31,16 @@ #define XEN_PT_GFLAGSSHIFT_TRG_MODE 15 #define XEN_PT_GFLAGSSHIFT_UNMASKED 16 +#define XEN_DOMCTL_VMSI_X86_DEST_ID_MASK (0xffU << XEN_PT_GFLAGS_SHIFT_DEST_ID) +#define XEN_DOMCTL_VMSI_X86_RH_MASK (1U << XEN_PT_GFLAGS_SHIFT_RH) +#define XEN_DOMCTL_VMSI_X86_DM_MASK (1U << XEN_PT_GFLAGS_SHIFT_DM) +#define XEN_DOMCTL_VMSI_X86_DELIV_MASK (7U << XEN_PT_GFLAGSSHIFT_DELIV_MODE) +#define XEN_DOMCTL_VMSI_X86_TRIG_MASK (1U << XEN_PT_GFLAGSSHIFT_TRG_MODE) +#define XEN_DOMCTL_VMSI_X86_UNMASKED (1U << XEN_PT_GFLAGSSHIFT_UNMASKED) +#endif + +#define MASK_INSR(v, m) (((v) * ((m) & -(m))) & (m)) + #define latch(fld) latch[PCI_MSIX_ENTRY_##fld / sizeof(uint32_t)] /* @@ -49,21 +64,18 @@ static inline uint32_t msi_ext_dest_id(u static uint32_t msi_gflags(uint32_t data, uint64_t addr) { - uint32_t result = 0; - int rh, dm, dest_id, deliv_mode, trig_mode; + int rh, dm, deliv_mode, trig_mode; rh = (addr >> MSI_ADDR_REDIRECTION_SHIFT) & 0x1; dm = (addr >> MSI_ADDR_DEST_MODE_SHIFT) & 0x1; - dest_id = msi_dest_id(addr); deliv_mode = (data >> MSI_DATA_DELIVERY_MODE_SHIFT) & 0x7; trig_mode = (data >> MSI_DATA_TRIGGER_SHIFT) & 0x1; - result = dest_id | (rh << XEN_PT_GFLAGS_SHIFT_RH) - | (dm << XEN_PT_GFLAGS_SHIFT_DM) - | (deliv_mode << XEN_PT_GFLAGSSHIFT_DELIV_MODE) - | (trig_mode << XEN_PT_GFLAGSSHIFT_TRG_MODE); - - return result; + return MASK_INSR(msi_dest_id(addr), XEN_DOMCTL_VMSI_X86_DEST_ID_MASK) | + MASK_INSR(rh, XEN_DOMCTL_VMSI_X86_RH_MASK) | + MASK_INSR(dm, XEN_DOMCTL_VMSI_X86_DM_MASK) | + MASK_INSR(deliv_mode, XEN_DOMCTL_VMSI_X86_DELIV_MASK) | + MASK_INSR(trig_mode, XEN_DOMCTL_VMSI_X86_TRIG_MASK); } static inline uint64_t msi_addr64(XenPTMSI *msi) @@ -173,7 +185,7 @@ static int msi_msix_update(XenPCIPassthr table_addr = s->msix->mmio_base_addr; } - gflags |= masked ? 0 : (1u << XEN_PT_GFLAGSSHIFT_UNMASKED); + gflags |= masked ? 0 : XEN_DOMCTL_VMSI_X86_UNMASKED; rc = xc_domain_update_msi_irq(xen_xc, xen_domid, gvec, pirq, gflags, table_addr);