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Wed, 1 May 2019 09:29:08 +0000 From: Rasmus Villemoes To: "devicetree@vger.kernel.org" , Qiang Zhao , Li Yang CC: "linuxppc-dev@lists.ozlabs.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Rob Herring , Scott Wood , Christophe Leroy , Mark Rutland , Rasmus Villemoes Subject: [PATCH v2 4/6] dt-bindings: soc/fsl: qe: document new fsl, qe-snums binding Thread-Topic: [PATCH v2 4/6] dt-bindings: soc/fsl: qe: document new fsl,qe-snums binding Thread-Index: AQHVAABTBBh/pLqBQEiPEhE0F8Qajw== Date: Wed, 1 May 2019 09:29:08 +0000 Message-ID: <20190501092841.9026-5-rasmus.villemoes@prevas.dk> References: <20190430133615.25721-1-rasmus.villemoes@prevas.dk> <20190501092841.9026-1-rasmus.villemoes@prevas.dk> In-Reply-To: <20190501092841.9026-1-rasmus.villemoes@prevas.dk> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HE1PR0102CA0052.eurprd01.prod.exchangelabs.com (2603:10a6:7:7d::29) To VI1PR10MB2672.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:803:e3::20) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Rasmus.Villemoes@prevas.se; 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DIR:OUT; SFP:1102; SCL:1; SRVR:VI1PR10MB2143; H:VI1PR10MB2672.EURPRD10.PROD.OUTLOOK.COM; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: prevas.se does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: AqsXV23houvs7fy1N7Du7jixIcSJhmAJ02uWpTo//NCyDX3o7OXGO9fyncZpKmzfwtw8o/c7JvJWN1u7722tYYPK3NxLkAppCGC1a0/Jk2STlEIG0mR+gVv+UYkgKkWjEzyTlpMVku1zb7V6pZDNlMNKzsX42P/goG1ZHenDsxPMLxbvtNd+/9/C/Bc6khu+/oPPvvYzoA7ieLneJkO3cnWSRL+G9onqoC8HAObaDEbNwjcJudALv2qJJopQLIYzPGTiZJeD1rrD9cpoqchwLBvO71ujN6e1FthvWx1puKE2WQShn/Hxcajll5Y0oERCir+O/gIpgzVEJMJns1xIYituoysROsPH8AnlowhnhVNwFjYaPVdTt6b2PWpbnPcSYax8oMyGrMmZ8QdSGScEO3UzmiOweREbw92rzcYFNtU= MIME-Version: 1.0 X-OriginatorOrg: prevas.dk X-MS-Exchange-CrossTenant-Network-Message-Id: 833879d1-a410-4def-0894-08d6ce1775fc X-MS-Exchange-CrossTenant-originalarrivaltime: 01 May 2019 09:29:08.2197 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: d350cf71-778d-4780-88f5-071a4cb1ed61 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR10MB2143 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Reading table 4-30, and its footnotes, of the QUICC Engine Block Reference Manual shows that the set of snum _values_ is not necessarily just a function of the _number_ of snums, as given in the fsl,qe-num-snums property. As an alternative, to make it easier to add support for other variants of the QUICC engine IP, this introduces a new binding fsl,qe-snums, which automatically encodes both the number of snums and the actual values to use. For example, for the MPC8309, one would specify the property as fsl,qe-snums = /bits/ 8 < 0x88 0x89 0x98 0x99 0xa8 0xa9 0xb8 0xb9 0xc8 0xc9 0xd8 0xd9 0xe8 0xe9>; Signed-off-by: Rasmus Villemoes Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt index d7afaff5faff..05f5f485562a 100644 --- a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt +++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt @@ -18,7 +18,8 @@ Required properties: - reg : offset and length of the device registers. - bus-frequency : the clock frequency for QUICC Engine. - fsl,qe-num-riscs: define how many RISC engines the QE has. -- fsl,qe-num-snums: define how many serial number(SNUM) the QE can use for the +- fsl,qe-snums: This property has to be specified as '/bits/ 8' value, + defining the array of serial number (SNUM) values for the virtual threads. Optional properties: @@ -34,6 +35,11 @@ Recommended properties - brg-frequency : the internal clock source frequency for baud-rate generators in Hz. +Deprecated properties +- fsl,qe-num-snums: define how many serial number(SNUM) the QE can use + for the threads. Use fsl,qe-snums instead to not only specify the + number of snums, but also their values. + Example: qe@e0100000 { #address-cells = <1>;