From patchwork Fri Apr 26 09:30:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 1091435 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="NzhXVdzV"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 44r82f1sp4z9s70 for ; Fri, 26 Apr 2019 19:31:54 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726006AbfDZJbr (ORCPT ); Fri, 26 Apr 2019 05:31:47 -0400 Received: from mail-lf1-f68.google.com ([209.85.167.68]:46877 "EHLO mail-lf1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725881AbfDZJbr (ORCPT ); Fri, 26 Apr 2019 05:31:47 -0400 Received: by mail-lf1-f68.google.com with SMTP id k18so1823220lfj.13; Fri, 26 Apr 2019 02:31:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=8XngklsEx7FjQ3aFz/vWthXQwMXtqDaLXO4qZKwIGnM=; b=NzhXVdzVLOPW7juNy1wbBPURSp9M0sO5UrNBIZrd8orzYK2rsGL9q2dXf/4Se7chTR pOKf8/nwPG6n/Vwc6FhQuSEHAALlprNN2MWJBkNWnSQVLKRj89C8Fa/UaWfchFwHGhrB 4ECh8+GBJoiikigtIUfsZDAz23VNv/ol6Q2QYowALlAgp9ke4bLRmvPyvzbaRzRxoIkS oJlz8aIt8pkV+kWsAIiF+d5Z/ZmnXbb0V45CqayFxDJrFyw6CrvmhD7C4mYLqCVSRXPQ UJoh7QrzWzirtHQ6PIJoJ8Ih2BfWzm5B6xl4hduXLSBi72UFStrtgmdAyasnBIBnOK5R Dftg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=8XngklsEx7FjQ3aFz/vWthXQwMXtqDaLXO4qZKwIGnM=; b=B7EQbUMButnlJwwjjicNe/ndYCfr7qH43Kx2uzLsDuFmz58FVGHU5rzlFwA84R6gAz Vr+qzpxgJSW5/QOUBegk8hFTbYEY8GgncOL0HPp0OIh2PrX8lP7k+y354zPu+spZ9mX8 otjSRajk/WXCeWPER8k8FC7bTVy2BO4k2VdGcoib27CFTyzF8BSauCM6tdioM3PyNLQs w4k23calpSiYEOVU1fTfTodyiuFB1Qe78h03qQ+wy1xbw1JLirtySfWMlaxHa9pK1WgU 2jNSQZubhfmNSslrYk52sk3TW1tI2sq5UUTRu2oHg2M/+pxNyyg+9j5YwEym0zpVoKRz viJg== X-Gm-Message-State: APjAAAVcQcJChc80IF2oLybG2SBQBgouDEYHq2TuE4TBoPyHYlETQTB5 GYDBFkuMVOIgur5rHp/cW9jXZZDJOGY= X-Google-Smtp-Source: APXvYqx3VglXoX4j1jUiw/1sM/w/boItLHSKInk0NTWrB4+05ESU/3qu7Wno/iuBRl5wuUrYBLkqzQ== X-Received: by 2002:ac2:5a5e:: with SMTP id r30mr10688538lfn.10.1556271105187; Fri, 26 Apr 2019 02:31:45 -0700 (PDT) Received: from localhost.localdomain ([5.164.240.123]) by smtp.gmail.com with ESMTPSA id a1sm1418767lfc.17.2019.04.26.02.31.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 26 Apr 2019 02:31:44 -0700 (PDT) From: Serge Semin To: Andrew Lunn , Florian Fainelli , Heiner Kallweit , "David S. Miller" Cc: Serge Semin , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] net: phy: realtek: Add rtl8211e rx/tx delays config Date: Fri, 26 Apr 2019 12:30:10 +0300 Message-Id: <20190426093010.9609-1-fancer.lancer@gmail.com> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org There are two chip pins named TXDLY and RXDLY which actually addes the 2ns delays to TXC and RXC for TXD/RXD latching. Alas it is only documented info regarding the RGMII timing control configurations the PHY provides. It turnes out the same settings can be setup via MDIO registers hidden in the extension pages layout. Particularly the extension page 0xa4 provides a register 0x1c, which bits 1 and 2 control the described delays. They are used to implemet the "rgmii-{id,rxid,txid}" phy-mode. The hidden RGMII configs register utilization was found in the rtl8211e U-boot driver: https://elixir.bootlin.com/u-boot/v2019.01/source/drivers/net/phy/realtek.c#L99 There is also a freebsd discussion regarding this register: https://reviews.freebsd.org/D13591 It confirms that the register bits field must control the so called configuration pins described in the table 12-13 of the official PHY datasheet: 8:6 = PHY Address 5:4 = Auto-Negotiation 3 = Interface Mode Select 2 = RX Delay 1 = TX Delay 0 = SELRGV Signed-off-by: Serge Semin --- drivers/net/phy/realtek.c | 44 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index 10df52ccddfe..8776b94d91ed 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -23,11 +23,14 @@ #define RTL821x_INSR 0x13 +#define RTL821x_EXT_PAGE_SELECT 0x1e #define RTL821x_PAGE_SELECT 0x1f #define RTL8211F_INSR 0x1d #define RTL8211F_TX_DELAY BIT(8) +#define RTL8211E_TX_DELAY BIT(1) +#define RTL8211E_RX_DELAY BIT(2) #define RTL8201F_ISR 0x1e #define RTL8201F_IER 0x13 @@ -174,6 +177,46 @@ static int rtl8211f_config_init(struct phy_device *phydev) return phy_modify_paged(phydev, 0xd08, 0x11, RTL8211F_TX_DELAY, val); } +static int rtl8211e_config_init(struct phy_device *phydev) +{ + int ret, oldpage; + u16 val = 0; + + ret = genphy_config_init(phydev); + if (ret < 0) + return ret; + + /* enable TX/RX delay for rgmii-* modes, otherwise disable it */ + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) + val = RTL8211E_TX_DELAY | RTL8211E_RX_DELAY; + else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) + val = RTL8211E_TX_DELAY; + else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) + val = RTL8211E_RX_DELAY; + + /* According to a sample driver there is a 0x1c config register on + * a 0xa4 extension page (0x7) layout. It can be used to disable/enable + * the RX/TX delays otherwise controlled by hardware strobes. It can + * also be used to customize the whole configuration register: + * 8:6 = PHY Address, 5:4 = Auto-Negotiation, 3 = Interface Mode Select, + * 2 = RX Delay, 1 = TX Delay, 0 = SELRGV (see original PHY datasheet + * for details). + */ + oldpage = phy_select_page(phydev, 0x7); + if (oldpage < 0) + goto err_restore_page; + + ret = phy_write(phydev, RTL821x_EXT_PAGE_SELECT, 0xa4); + if (!ret) + goto err_restore_page; + + ret = phy_modify(phydev, 0x1c, RTL8211E_TX_DELAY | RTL8211E_RX_DELAY, + val); + +err_restore_page: + return phy_restore_page(phydev, oldpage, ret); +} + static int rtl8211b_suspend(struct phy_device *phydev) { phy_write(phydev, MII_MMD_DATA, BIT(9)); @@ -257,6 +300,7 @@ static struct phy_driver realtek_drvs[] = { PHY_ID_MATCH_EXACT(0x001cc915), .name = "RTL8211E Gigabit Ethernet", .features = PHY_GBIT_FEATURES, + .config_init = &rtl8211e_config_init, .ack_interrupt = &rtl821x_ack_interrupt, .config_intr = &rtl8211e_config_intr, .suspend = genphy_suspend, From patchwork Fri Apr 26 21:21:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 1091797 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="QWs0cvhx"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 44rRp53xbYz9s4V for ; Sat, 27 Apr 2019 07:22:05 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727066AbfDZVWB (ORCPT ); Fri, 26 Apr 2019 17:22:01 -0400 Received: from mail-lf1-f68.google.com ([209.85.167.68]:41900 "EHLO mail-lf1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726246AbfDZVWA (ORCPT ); Fri, 26 Apr 2019 17:22:00 -0400 Received: by mail-lf1-f68.google.com with SMTP id t30so3367099lfd.8; Fri, 26 Apr 2019 14:21:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=HuTfsELryJeSOY4MM09GUQ0yVJxmBTXdJs2bbc9UtQ4=; b=QWs0cvhxo5b6XSgSdS+sL0FkETgDk9wVJO+3SCyV6VtAexcZ4ePKFY3IwTZOF1CBLQ ZtDZ3GmBviqPXmPdmBRVEyU4xM6GzEr9CNbXWMlp1ygdnGElcHpCNVl09NybErS/zqVw b1mHWfbNWUnJtI1r6bv7NZOJib5Jkyy3DiR9VPXHONtw2ps/GDnqaL8keavMQqTSSHjf aMbGWPZmKp751hgHS9IFJ/6KNpIzE1jeDYiXemP5nPL81lFq6vbAHKYPNYk6jaX6PNTZ v/WBFY1ASmBS/3lOuLFLNPE5C9EhTHLqQ+DaR1YKWzH0yfgbUNzVitIB1jr4Js6JNzMO bqkA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=HuTfsELryJeSOY4MM09GUQ0yVJxmBTXdJs2bbc9UtQ4=; b=fqDxg5XbIkhl77J6iFcatUJ09J36/JghUL5NtQ2EDf8uxoG9i5FCqaQv60aOxiE8vv +a3SIpsX+ezdlM4C7gmNhbFeWexnDxkfhuk3yqnClWkFBLuOrJjX+xJYuIQHW5Aa4b0G PP5Eb5raB4f82Io2dcZdBxeBWSExycDDUmMKCIHcfwoGreeyQJhZtFPd7X8Z4nacsyLr DVlL9QdKxI1v94MmMu4rbV+KvrR8TWOhV2BWlDurUrIE7SoHrzlHtkc4x65oBqq6ZY0H EYWYuBjjBsR/u2rJWlj2zKt0Xaf5A5DmIPubDb5SQ53IRpncAhgsfsObqwU4VTCutOGL cCsQ== X-Gm-Message-State: APjAAAWrMKX2V3MN1GGvppiPZPqZCeTlzDcjBx/63H6Vk6azf8K3UuQt hYf/GsY4/sRMmMqlstjTU7s= X-Google-Smtp-Source: APXvYqw0C0uzMaVDs8uD0fDbbPTLP3dbgXbiXbhlTBr0JqkTaqPxQWbEn/w/Z8hD9yFZdSFxMkh6SQ== X-Received: by 2002:a19:6b0d:: with SMTP id d13mr25324260lfa.79.1556313718342; Fri, 26 Apr 2019 14:21:58 -0700 (PDT) Received: from localhost.localdomain ([5.164.240.123]) by smtp.gmail.com with ESMTPSA id a28sm7097173lfk.54.2019.04.26.14.21.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 26 Apr 2019 14:21:57 -0700 (PDT) From: Serge Semin To: Andrew Lunn , Florian Fainelli , Heiner Kallweit , "David S. Miller" Cc: Serge Semin , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/2] net: phy: realtek: Change TX-delay setting for RGMII modes only Date: Sat, 27 Apr 2019 00:21:12 +0300 Message-Id: <20190426212112.5624-2-fancer.lancer@gmail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190426093010.9609-1-fancer.lancer@gmail.com> References: <20190426212112.5624-1-fancer.lancer@gmail.com> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org It's prone to problems if delay is cleared out for other than RGMII modes. So lets set/clear the TX-delay in the config register only if actually RGMII-like interface mode is requested. Signed-off-by: Serge Semin --- drivers/net/phy/realtek.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index ab567a1923ad..a18cb01158f9 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -163,16 +163,24 @@ static int rtl8211c_config_init(struct phy_device *phydev) static int rtl8211f_config_init(struct phy_device *phydev) { int ret; - u16 val = 0; + u16 val; ret = genphy_config_init(phydev); if (ret < 0) return ret; - /* enable TX-delay for rgmii-id and rgmii-txid, otherwise disable it */ - if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || - phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) + /* enable TX-delay for rgmii-id/rgmii-txid, and disable it for rgmii */ + switch (phydev->interface) { + case PHY_INTERFACE_MODE_RGMII: + val = 0; + break; + case PHY_INTERFACE_MODE_RGMII_ID: + case PHY_INTERFACE_MODE_RGMII_TXID: val = RTL8211F_TX_DELAY; + break; + default: /* the rest of the modes imply leaving delay as is. */ + return 0; + } return phy_modify_paged(phydev, 0xd08, 0x11, RTL8211F_TX_DELAY, val); }