From patchwork Thu Apr 11 09:00:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Walmsley X-Patchwork-Id: 1083775 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=sifive.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=sifive.com header.i=@sifive.com header.b="YjzrK8ED"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 44fw423w3cz9s70 for ; Thu, 11 Apr 2019 19:01:06 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726926AbfDKJBF (ORCPT ); Thu, 11 Apr 2019 05:01:05 -0400 Received: from mail-pl1-f194.google.com ([209.85.214.194]:42477 "EHLO mail-pl1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726672AbfDKJBE (ORCPT ); Thu, 11 Apr 2019 05:01:04 -0400 Received: by mail-pl1-f194.google.com with SMTP id cv12so3096901plb.9 for ; Thu, 11 Apr 2019 02:01:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=RTF2E5ylTuzDMJPP0P/IBxfb/0jpKGQmyA7LKmJUhec=; b=YjzrK8EDpinqDyuf+0WcBG1czU3cBjLySNPlPbFj8F7zwCaovVSQ0D45HHeNZSejDT hKiE/E/5rvXNVUNFnjqA6ru/i/uFCk/8KbPzGLzXjEfr+n1zFljh1aHzCa2TQzXx59ES S0lf9CWNKLzObegKAw1apyctW1Ez4t6wEufimawPjVtvOOGDt62rTFdqY4jH4CWNm7YX z3KPkdBso4jH+OtB0/rj2zcSUaAI4KPKEXmeSp89QBHLa/sd1ug1gTwaSWPy/wYb2av4 rsfy3E0Fzt5pxSNWLR6OL0nJYyYlcVOZr/9gJyKNNSh38NqApJttIvc6Oj9Rr6Y15v3y Xomg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=RTF2E5ylTuzDMJPP0P/IBxfb/0jpKGQmyA7LKmJUhec=; b=KccU33TDvb8mtM1QYNo+lhbB3bh9wcC1ZsIcf7xy0hOKCPAYiwNNuwa4qxF5tHzXbJ siPYbjBHf2VzE5nqcPAebOZ5np+OuTE2QMKjRiE2F0Ql+Ru7EwuGX8so3Ydm0zXSKHDz kbZJl/Oi/eRe+vk65pPRMNBPvV7XJDMnUabzjbTKntw4lKxZbVFqCm+7QrAdEYkkd0kL ywmgYTT/wCcDIsrWGzIn+yRJ1Yr3It5k0X96lX69W7VAd8WqONnvRTxWdydZaL3VlpLp bRotiQhbr6ANeoOsdXF7/pDARfcKgy98eIPqzblhM0I48uUVXTIJN5FT2BGYZvB200Hp 2DlA== X-Gm-Message-State: APjAAAV3giOFHjGCCZSB3MeCtgfERgyZuYdz5eu7SfWSXd4bweLU60ed WwRUTtJt6tWPfvRdt4ySX4+mSA== X-Google-Smtp-Source: APXvYqzewUZ3f+WjnmQRAZB/rayetaRpUjtNnyzQu95VWVo1xU922WP44urHqsL7acerFot1dTWncw== X-Received: by 2002:a17:902:b484:: with SMTP id y4mr48779055plr.88.1554973262483; Thu, 11 Apr 2019 02:01:02 -0700 (PDT) Received: from viisi.sifive.com ([12.206.222.5]) by smtp.gmail.com with ESMTPSA id m2sm64317272pgr.74.2019.04.11.02.01.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 11 Apr 2019 02:01:01 -0700 (PDT) From: Paul Walmsley To: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-serial@vger.kernel.org, gregkh@linuxfoundation.org Cc: Paul Walmsley , Paul Walmsley , devicetree@vger.kernel.org, Rob Herring , Mark Rutland , Palmer Dabbelt Subject: [PATCH v4 1/2] dt-bindings: serial: add documentation for the SiFive UART driver Date: Thu, 11 Apr 2019 02:00:28 -0700 Message-Id: <20190411090027.8670-2-paul.walmsley@sifive.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190411090027.8670-1-paul.walmsley@sifive.com> References: <20190411090027.8670-1-paul.walmsley@sifive.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add DT binding documentation for the Linux driver for the SiFive asynchronous serial IP block. This revision incorporates changes based on feedback from Rob Herring . Signed-off-by: Paul Walmsley Signed-off-by: Paul Walmsley Cc: linux-serial@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-riscv@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman Cc: Rob Herring Cc: Mark Rutland Cc: Palmer Dabbelt --- .../bindings/serial/sifive-serial.txt | 33 +++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 Documentation/devicetree/bindings/serial/sifive-serial.txt diff --git a/Documentation/devicetree/bindings/serial/sifive-serial.txt b/Documentation/devicetree/bindings/serial/sifive-serial.txt new file mode 100644 index 000000000000..c86b1e524159 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/sifive-serial.txt @@ -0,0 +1,33 @@ +SiFive asynchronous serial interface (UART) + +Required properties: + +- compatible: should be something similar to + "sifive,-uart" for the UART as integrated + on a particular chip, and "sifive,uart" for the + general UART IP block programming model. Supported + compatible strings as of the date of this writing are: + "sifive,fu540-c000-uart" for the SiFive UART v0 as + integrated onto the SiFive FU540 chip, or "sifive,uart0" + for the SiFive UART v0 IP block with no chip integration + tweaks (if any) +- reg: address and length of the register space +- interrupts: Should contain the UART interrupt identifier +- clocks: Should contain a clock identifier for the UART's parent clock + + +UART HDL that corresponds to the IP block version numbers can be found +here: + +https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/uart + + +Example: + +uart0: serial@10010000 { + compatible = "sifive,fu540-c000-uart", "sifive,uart0"; + interrupt-parent = <&plic0>; + interrupts = <80>; + reg = <0x0 0x10010000 0x0 0x1000>; + clocks = <&prci PRCI_CLK_TLCLK>; +};