From patchwork Thu Apr 4 00:38:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Walmsley X-Patchwork-Id: 1076608 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=sifive.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=sifive.com header.i=@sifive.com header.b="AUoSLdpG"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 44ZPFR6NxTz9sSV for ; Thu, 4 Apr 2019 11:38:35 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726199AbfDDAie (ORCPT ); Wed, 3 Apr 2019 20:38:34 -0400 Received: from mail-pg1-f195.google.com ([209.85.215.195]:34560 "EHLO mail-pg1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726193AbfDDAid (ORCPT ); Wed, 3 Apr 2019 20:38:33 -0400 Received: by mail-pg1-f195.google.com with SMTP id v12so319905pgq.1 for ; Wed, 03 Apr 2019 17:38:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=OQbWDfJcGsTny0umzfGxUknauZKQ9hwvFbMePNwP87E=; b=AUoSLdpGw3sMGjAwH/SKIxx5vgxP601M6t9ZW+vIvlDjbR/06N4fPsT6sfyU4Uu23A ieXdyBB4KjlyRMqchFhONOoZsZSCkzT0BbyCyVgId1iZtMLUvWk98Z09vU1OFIMyo109 4MJAvmC5ekIpLmCxS2WQiz/rYI/d9iHaS7k9gBjPx5j+F3xCNOYiDrHfqOdk8h4YpO7B ZCSVCkPG9Ixel7s1pmmrmZ8pTyLR527Sd+lMRpNwoLLue4HKFYl77oISetRDyod/rEmN hYnSPvqUPxkO/jjXDwomZvmCRBqHp1+C9iaCVGag3zz1cJovax9lOJO+2VHkGoduYluT lN/A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=OQbWDfJcGsTny0umzfGxUknauZKQ9hwvFbMePNwP87E=; b=KQvrLyW8U/CEhoX5oqW39iwVB3QM9GjTu3U7mP4jHNcv6q+PsPHTGANayhkMCWddxh IrglGaCJvPOxhpZJl8wKVJ9xAoWWQgjkT395XmOMbws+AVW7XLD/0+mKPWaUCADs/bDe n7GxDxS9YtOGNQ7+KQSe3aueyG656lSpwH/BIyWlGSsVO+syM1ZzDxbErInnKDGC+58Y 5pgeCbbJqx5t2CjJNy1nnInpTwKJmk2WCqRl9DdclMGx2ZffDaBx0jlANqDIkqIMxS9k N1xVzFg10OpXkVeMHZ9tDwOG+NDYWAHO86+FqsUdw+6LNkorqTpcIsy4Zg1g1Hda2K63 TCFw== X-Gm-Message-State: APjAAAUtM8ik+LgqPNiYgAY7l3UsDV/N/UM5p+2mRXxSuphKrKEHGep6 GZg/bnKy4cZKbaWj3T3EZjUpOA== X-Google-Smtp-Source: APXvYqwuJoKd6QAAOUETvnqcXFZ2NLuD8m2VPdVyJHkPP7c0AchADYsDx/Eec+gG019ba6w6kHCCMQ== X-Received: by 2002:aa7:814e:: with SMTP id d14mr2587628pfn.101.1554338312957; Wed, 03 Apr 2019 17:38:32 -0700 (PDT) Received: from viisi.sifive.com ([12.206.222.5]) by smtp.gmail.com with ESMTPSA id q11sm27470321pgs.94.2019.04.03.17.38.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 03 Apr 2019 17:38:32 -0700 (PDT) From: Paul Walmsley To: mark.rutland@arm.com, robh+dt@kernel.org Cc: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, wesley@sifive.com, paul.walmsley@sifive.com, palmer@sifive.com Subject: [PATCH] dt-bindings: clock: sifive: add FU540-C000 PRCI clock constants Date: Wed, 3 Apr 2019 17:38:20 -0700 Message-Id: <20190404003820.10679-1-paul.walmsley@sifive.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add preprocessor macros for the important PRCI output clocks that are needed by both the FU540 PRCI driver and DT data. Details are available in the FU540 manual in Chapter 7 of https://static.dev.sifive.com/FU540-C000-v1.0.pdf Signed-off-by: Paul Walmsley Cc: Wesley Terpstra Cc: Rob Herring Cc: Mark Rutland Cc: Palmer Dabbelt Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-riscv@lists.infradead.org Reviewed-by: Rob Herring --- Rob, Mark: this patch is a prerequisite for both the FU540 DT data and for the FU540 PRCI clock driver patch series. To prevent one of those patch series from depending on the other, I'd like to ask Palmer to merge this patch in one of his -rc pull requests. Could I get an ack from one or both of you for this purpose? Thanks. include/dt-bindings/clock/sifive-fu540-prci.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) create mode 100644 include/dt-bindings/clock/sifive-fu540-prci.h diff --git a/include/dt-bindings/clock/sifive-fu540-prci.h b/include/dt-bindings/clock/sifive-fu540-prci.h new file mode 100644 index 000000000000..6a0b70a37d78 --- /dev/null +++ b/include/dt-bindings/clock/sifive-fu540-prci.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2018-2019 SiFive, Inc. + * Wesley Terpstra + * Paul Walmsley + */ + +#ifndef __DT_BINDINGS_CLOCK_SIFIVE_FU540_PRCI_H +#define __DT_BINDINGS_CLOCK_SIFIVE_FU540_PRCI_H + +/* Clock indexes for use by Device Tree data and the PRCI driver */ + +#define PRCI_CLK_COREPLL 0 +#define PRCI_CLK_DDRPLL 1 +#define PRCI_CLK_GEMGXLPLL 2 +#define PRCI_CLK_TLCLK 3 + +#endif