diff mbox

Enable mips32r6 and mips64r6 builds.

Message ID 1450889031-27668-1-git-send-email-sellcey@imgtec.com
State New
Headers show

Commit Message

Steve Ellcey Dec. 23, 2015, 4:43 p.m. UTC 
This patch adds mips32r6 and mips64r6 architecture options to the MIPS
build.

Signed-off-by: Steve Ellcey <sellcey@imgtec.com>
---
 Rules.mak                 |    2 ++
 extra/Configs/Config.mips |   21 +++++++++++++++++++++
 2 files changed, 23 insertions(+)

Comments

Waldemar Brodkorb Dec. 23, 2015, 7:40 p.m. UTC | #1 
Hi Steve,

Steve Ellcey wrote,

> This patch adds mips32r6 and mips64r6 architecture options to the MIPS
> build.

so this enables mips32r6 and mips64r6 in uClibc.
Is there any embedded board I could use to test these?
I think my recent MIPS board CI20 is MIPS32r2. So what options do
I have?

BTW: Many thanks for adding support!!

best regards
 Waldemar
Steve Ellcey Dec. 23, 2015, 8:21 p.m. UTC | #2 
On Wed, 2015-12-23 at 20:40 +0100, Waldemar Brodkorb wrote:
> Hi Steve,
> 
> Steve Ellcey wrote,
> 
> > This patch adds mips32r6 and mips64r6 architecture options to the MIPS
> > build.
> 
> so this enables mips32r6 and mips64r6 in uClibc.
> Is there any embedded board I could use to test these?
> I think my recent MIPS board CI20 is MIPS32r2. So what options do
> I have?
> 
> BTW: Many thanks for adding support!!
> 
> best regards
>  Waldemar
> 

I don't think there are any R6 boards available yet.  I did my testing
using the Qemu simulator.

Steve Ellcey
sellcey@imgtec.com
diff mbox

Patch

diff --git a/Rules.mak b/Rules.mak
index de9ffb3..5544249 100644
--- a/Rules.mak
+++ b/Rules.mak
@@ -414,8 +414,10 @@  ifeq ($(TARGET_ARCH),mips)
 	CPU_CFLAGS-$(CONFIG_MIPS_ISA_4)+=-mips4 -mtune=mips4
 	CPU_CFLAGS-$(CONFIG_MIPS_ISA_MIPS32)+=-mips32 -mtune=mips32
 	CPU_CFLAGS-$(CONFIG_MIPS_ISA_MIPS32R2)+=-march=mips32r2 -mtune=mips32r2
+	CPU_CFLAGS-$(CONFIG_MIPS_ISA_MIPS32R6)+=-march=mips32r6 -mtune=mips32r6
 	CPU_CFLAGS-$(CONFIG_MIPS_ISA_MIPS64)+=-mips64 -mtune=mips32
 	CPU_CFLAGS-$(CONFIG_MIPS_ISA_MIPS64R2)+=-mips64r2 -mtune=mips64r2
+	CPU_CFLAGS-$(CONFIG_MIPS_ISA_MIPS64R6)+=-mips64r6 -mtune=mips64r6
 	CPU_CFLAGS-$(CONFIG_MIPS_N64_ABI)+=-mabi=64
 	CPU_CFLAGS-$(CONFIG_MIPS_O32_ABI)+=-mabi=32
 	CPU_CFLAGS-$(CONFIG_MIPS_N32_ABI)+=-mabi=n32
diff --git a/extra/Configs/Config.mips b/extra/Configs/Config.mips
index 76b10c6..a1fcec2 100644
--- a/extra/Configs/Config.mips
+++ b/extra/Configs/Config.mips
@@ -48,6 +48,21 @@  config CONFIG_MIPS_NAN_2008
 endchoice
 
 choice
+	prompt "Target NAN Encoding"
+	default CONFIG_MIPS_NAN_LEGACY
+	help
+	  This is the NAN Encoding you want to use.  Chose either Legacy
+	  or 2008.
+
+config CONFIG_MIPS_NAN_LEGACY
+	bool "LEGACY"
+
+config CONFIG_MIPS_NAN_2008
+	bool "2008"
+
+endchoice
+
+choice
 	prompt "Target Processor Architecture"
 	default CONFIG_MIPS_ISA_1 if CONFIG_MIPS_O32_ABI
 	default CONFIG_MIPS_ISA_3 if CONFIG_MIPS_N32_ABI
@@ -84,10 +99,16 @@  config CONFIG_MIPS_ISA_MIPS32
 config CONFIG_MIPS_ISA_MIPS32R2
 	bool "MIPS32r2"
 
+config CONFIG_MIPS_ISA_MIPS32R6
+	bool "MIPS32r6"
+
 config CONFIG_MIPS_ISA_MIPS64
 	bool "MIPS64"
 
 config CONFIG_MIPS_ISA_MIPS64R2
 	bool "MIPS64r2"
 
+config CONFIG_MIPS_ISA_MIPS64R6
+	bool "MIPS64r6"
+
 endchoice