@@ -10,6 +10,7 @@
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/clock/qcom,sc8280xp-camcc.h>
#include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
+#include <dt-bindings/clock/qcom,sm8350-videocc.h>
#include <dt-bindings/interconnect/qcom,osm-l3.h>
#include <dt-bindings/interconnect/qcom,sc8280xp.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -690,6 +691,11 @@ reserved-region@85b00000 {
no-map;
};
+ pil_video_mem: pil_video_region@86700000 {
+ reg = <0 0x86700000 0 0x500000>;
+ no-map;
+ };
+
pil_adsp_mem: adsp-region@86c00000 {
reg = <0 0x86c00000 0 0x2000000>;
no-map;
@@ -3675,6 +3681,86 @@ usb_1_dwc3_ss: endpoint {
};
};
+ venus: video-codec@aa00000 {
+ compatible = "qcom,sm8350-venus";
+ reg = <0 0x0aa00000 0 0x100000>;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+
+ clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
+ <&videocc VIDEO_CC_MVS0C_CLK>,
+ <&videocc VIDEO_CC_MVS0_CLK>;
+ clock-names = "iface",
+ "core",
+ "vcodec0_core";
+ power-domains = <&videocc MVS0C_GDSC>,
+ <&videocc MVS0_GDSC>,
+ <&rpmhpd SC8280XP_MX>;
+ power-domain-names = "venus",
+ "vcodec0",
+ "mx";
+
+ resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>;
+ reset-names = "core";
+
+ interconnects = <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_VENUS_CFG 0>,
+ <&mmss_noc MASTER_VIDEO_P0 0 &mc_virt SLAVE_EBI1 0>,
+ <&mmss_noc MASTER_VIDEO_P0 0 &gem_noc SLAVE_LLCC 0>;
+ interconnect-names = "cpu-cfg",
+ "video-mem",
+ "video-llcc";
+
+ operating-points-v2 = <&venus_opp_table>;
+ iommus = <&apps_smmu 0x2e00 0x400>;
+ memory-region = <&pil_video_mem>;
+
+ status = "disabled";
+
+ video-decoder {
+ compatible = "venus-decoder";
+ };
+
+ video-encoder {
+ compatible = "venus-encoder";
+ };
+
+ venus_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-720000000 {
+ opp-hz = /bits/ 64 <720000000>;
+ required-opps = <&rpmhpd_opp_low_svs>;
+ };
+
+ opp-1014000000 {
+ opp-hz = /bits/ 64 <1014000000>;
+ required-opps = <&rpmhpd_opp_svs>;
+ };
+
+ opp-1098000000 {
+ opp-hz = /bits/ 64 <1098000000>;
+ required-opps = <&rpmhpd_opp_svs_l1>;
+ };
+
+ opp-1332000000 {
+ opp-hz = /bits/ 64 <1332000000>;
+ required-opps = <&rpmhpd_opp_nom>;
+ };
+ };
+ };
+
+ videocc: clock-controller@abf0000 {
+ compatible = "qcom,sc8280xp-videocc";
+ reg = <0 0x0abf0000 0 0x10000>;
+ clocks = <&rpmhcc RPMH_CXO_CLK>,
+ <&rpmhcc RPMH_CXO_CLK_A>,
+ <&sleep_clk>;
+ power-domains = <&rpmhpd SC8280XP_MMCX>;
+ required-opps = <&rpmhpd_opp_low_svs>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ #power-domain-cells = <1>;
+ };
+
cci0: cci@ac4a000 {
compatible = "qcom,sc8280xp-cci", "qcom,msm8996-cci";
reg = <0 0x0ac4a000 0 0x1000>;