From patchwork Fri Jun 14 14:37:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philip Cox X-Patchwork-Id: 1947939 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ubuntu.com (client-ip=185.125.189.65; helo=lists.ubuntu.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=patchwork.ozlabs.org) Received: from lists.ubuntu.com (lists.ubuntu.com [185.125.189.65]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4W125H5dQmz20KL for ; Sat, 15 Jun 2024 00:40:51 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=lists.ubuntu.com) by lists.ubuntu.com with esmtp (Exim 4.86_2) (envelope-from ) id 1sI86g-00007j-BE; Fri, 14 Jun 2024 14:40:46 +0000 Received: from smtp-relay-internal-1.internal ([10.131.114.114] helo=smtp-relay-internal-1.canonical.com) by lists.ubuntu.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1sI86e-00005w-KA for kernel-team@lists.ubuntu.com; Fri, 14 Jun 2024 14:40:44 +0000 Received: from mail-qt1-f200.google.com (mail-qt1-f200.google.com [209.85.160.200]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id 6BBAA3FB6E for ; Fri, 14 Jun 2024 14:40:44 +0000 (UTC) Received: by mail-qt1-f200.google.com with SMTP id d75a77b69052e-4406ccfc46dso20296981cf.1 for ; Fri, 14 Jun 2024 07:40:44 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1718376041; x=1718980841; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=QZN/8tD3Twsf3xT+vH16NzFOkzxugQEeuC26MMhvJiQ=; b=GdzP6n+DKqGRdruNOfff83xOXY/FOHUBQ6NOG5VzXPF+T8woLLnfQQuBYT0m4HlYsI BJ2eY/0lrQyUj5lWU8F3N0qBnkbhAj+KjKi2dxeWGH/wTh70Fp1IKbdVBlWKJkrVjGG6 6cexBK+DR0I39MORvE1h+CTAukAOrPSew96co7QRu/44Z7HdL7zBWUczUgevRaUnGT0I 3ZLbCSq2IcLEsLaHZesc8ZdV0nWjypd9TJEKDxonOOFLp78TdSsIM/lcfmr3kzTEj2Un vDXWEAY0HC56df/sJ1qYSjIXIX3ntyfskyScv7/DGsS/9IdZIzzELLdapMapzymZyTmT zJTg== X-Gm-Message-State: AOJu0YwDrObFq/7d+NgoVPnGPgysydg5mAhxYKYGyt/p8Nsc6zMDxBGL l5e5RTsmrCPHewfDfFfV+5EiY8YXudqMl36/+Cr0Tw2OGkWa7aI1ovAirJDUITlPfu3WRzaSokZ Yf1LmZxf9B/bl7/9ibzxTYM/DgP0b/8sJNGjsr9ETlXqC3FapUPkkZ544i86Nf067WXMDJcFmLm ZLwtDHWMnb+w== X-Received: by 2002:ac8:5841:0:b0:440:e9b1:27a with SMTP id d75a77b69052e-442168d91c0mr37598031cf.39.1718376041428; Fri, 14 Jun 2024 07:40:41 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFx2PVWMIG/RE7d/BDiuq/MJXlWi0Xj/jSZYYo5kG2210BVv75NdWGzrRNixXX+3xIAGWlakg== X-Received: by 2002:ac8:5841:0:b0:440:e9b1:27a with SMTP id d75a77b69052e-442168d91c0mr37597651cf.39.1718376040874; Fri, 14 Jun 2024 07:40:40 -0700 (PDT) Received: from cox.conference ([76.69.53.230]) by smtp.gmail.com with ESMTPSA id d75a77b69052e-441f2fcf6ccsm16559481cf.75.2024.06.14.07.40.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Jun 2024 07:40:38 -0700 (PDT) From: Philip Cox To: kernel-team@lists.ubuntu.com Subject: [j][linux-aws][PATCH 2/2] arm64: mm: Batch dsb and isb when populating pgtables Date: Fri, 14 Jun 2024 10:37:57 -0400 Message-Id: <20240614143758.569871-3-philip.cox@canonical.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240614143758.569871-1-philip.cox@canonical.com> References: <20240614143758.569871-1-philip.cox@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Ryan Roberts BugLink: https://bugs.launchpad.net/bugs/2069352 After removing uneccessary TLBIs, the next bottleneck when creating the page tables for the linear map is DSB and ISB, which were previously issued per-pte in __set_pte(). Since we are writing multiple ptes in a given pte table, we can elide these barriers and insert them once we have finished writing to the table. Execution time of map_mem(), which creates the kernel linear map page tables, was measured on different machines with different RAM configs: | Apple M2 VM | Ampere Altra| Ampere Altra| Ampere Altra | VM, 16G | VM, 64G | VM, 256G | Metal, 512G ---------------|-------------|-------------|-------------|------------- | ms (%) | ms (%) | ms (%) | ms (%) ---------------|-------------|-------------|-------------|------------- before | 78 (0%) | 435 (0%) | 1723 (0%) | 3779 (0%) after | 11 (-86%) | 161 (-63%) | 656 (-62%) | 1654 (-56%) Signed-off-by: Ryan Roberts Tested-by: Itaru Kitayama Tested-by: Eric Chanudet Reviewed-by: Mark Rutland Reviewed-by: Ard Biesheuvel Link: https://lore.kernel.org/r/20240412131908.433043-3-ryan.roberts@arm.com Signed-off-by: Will Deacon (backported from commit 1fcb7cea8a5f7747e02230f816c2c80b060d9517 [context changes in init_pte(), replaced __set_pte() with set_pte()]) Signed-off-by: Philip Cox --- arch/arm64/include/asm/pgtable.h | 7 ++++++- arch/arm64/mm/mmu.c | 11 ++++++++++- 2 files changed, 16 insertions(+), 2 deletions(-) diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h index b5e969bc074d..8be993e49356 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -252,9 +252,14 @@ static inline pte_t pte_mkdevmap(pte_t pte) return set_pte_bit(pte, __pgprot(PTE_DEVMAP | PTE_SPECIAL)); } -static inline void set_pte(pte_t *ptep, pte_t pte) +static inline void __set_pte_nosync(pte_t *ptep, pte_t pte) { WRITE_ONCE(*ptep, pte); +} + +static inline void set_pte(pte_t *ptep, pte_t pte) +{ + __set_pte_nosync(ptep, pte); /* * Only if the new pte is valid and kernel, otherwise TLB maintenance diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index 82ecfae0c9fe..c480447cbb98 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -159,7 +159,11 @@ static void init_pte(pte_t *ptep, unsigned long addr, unsigned long end, do { pte_t old_pte = READ_ONCE(*ptep); - set_pte(ptep, pfn_pte(__phys_to_pfn(phys), prot)); + /* + * Required barriers to make this visible to the table walker + * are deferred to the end of alloc_init_cont_pte(). + */ + __set_pte_nosync(ptep, pfn_pte(__phys_to_pfn(phys), prot)); /* * After the PTE entry has been populated once, we @@ -213,6 +217,11 @@ static void alloc_init_cont_pte(pmd_t *pmdp, unsigned long addr, phys += next - addr; } while (addr = next, addr != end); + /* + * Note: barriers and maintenance necessary to clear the fixmap slot + * ensure that all previous pgtable writes are visible to the table + * walker. + */ pte_clear_fixmap(); }