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[N/U,4/6] UBUNTU: [Config] Disable StarFive JH7100 support

Message ID 20240403110837.402919-5-emil.renner.berthing@canonical.com
State New
Headers show
Series Config updates for riscv64 | expand

Commit Message

Emil Renner Berthing April 3, 2024, 11:08 a.m. UTC 
The StarFive JH7100 SoC has non-coherent DMAs but was produced before
the standard RISC-V extensions to handle uncached memory mappings, and
hence needs special handling that conflicts with the generic DMA memory
handling. So drop support for it in the generic kernel.

Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
---
 debian.master/config/annotations | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)
diff mbox series

Patch

diff --git a/debian.master/config/annotations b/debian.master/config/annotations
index 23e1daffbb06..3e41896dacb4 100644
--- a/debian.master/config/annotations
+++ b/debian.master/config/annotations
@@ -2837,8 +2837,7 @@  CONFIG_CLK_SH73A0                               policy<{'armhf': 'y'}>
 CONFIG_CLK_SIFIVE                               policy<{'riscv64': 'y'}>
 CONFIG_CLK_SIFIVE_PRCI                          policy<{'riscv64': 'y'}>
 CONFIG_CLK_SP810                                policy<{'arm64': 'y', 'armhf': 'y', 'ppc64el': '-'}>
-CONFIG_CLK_STARFIVE_JH7100                      policy<{'riscv64': 'y'}>
-CONFIG_CLK_STARFIVE_JH7100_AUDIO                policy<{'riscv64': 'm'}>
+CONFIG_CLK_STARFIVE_JH7100                      policy<{'riscv64': 'n'}>
 CONFIG_CLK_STARFIVE_JH7110_AON                  policy<{'riscv64': 'm'}>
 CONFIG_CLK_STARFIVE_JH7110_ISP                  policy<{'riscv64': 'm'}>
 CONFIG_CLK_STARFIVE_JH7110_PLL                  policy<{'riscv64': 'y'}>
@@ -10101,7 +10100,7 @@  CONFIG_PINCTRL_SM8650_LPASS_LPI                 policy<{'arm64': 'm'}>
 CONFIG_PINCTRL_SPPCTL                           policy<{'armhf': 'y'}>
 CONFIG_PINCTRL_SPRD                             policy<{'arm64': 'y'}>
 CONFIG_PINCTRL_SPRD_SC9860                      policy<{'arm64': 'y'}>
-CONFIG_PINCTRL_STARFIVE_JH7100                  policy<{'riscv64': 'm'}>
+CONFIG_PINCTRL_STARFIVE_JH7100                  policy<{'riscv64': 'n'}>
 CONFIG_PINCTRL_STARFIVE_JH7110                  policy<{'riscv64': 'y'}>
 CONFIG_PINCTRL_STARFIVE_JH7110_AON              policy<{'riscv64': 'm'}>
 CONFIG_PINCTRL_STARFIVE_JH7110_SYS              policy<{'riscv64': 'y'}>
@@ -10971,7 +10970,7 @@  CONFIG_RESET_RZG2L_USBPHY_CTRL                  policy<{'arm64': 'y', 'riscv64':
 CONFIG_RESET_SCMI                               policy<{'arm64': 'm', 'armhf': 'm'}>
 CONFIG_RESET_SIMPLE                             policy<{'amd64': 'y', 'arm64': 'y', 'armhf': 'y', 'ppc64el': 'y', 'riscv64': 'y'}>
 CONFIG_RESET_SOCFPGA                            policy<{'armhf': 'y'}>
-CONFIG_RESET_STARFIVE_JH7100                    policy<{'riscv64': 'y'}>
+CONFIG_RESET_STARFIVE_JH7100                    policy<{'riscv64': 'n'}>
 CONFIG_RESET_STARFIVE_JH7110                    policy<{'riscv64': 'y'}>
 CONFIG_RESET_STARFIVE_JH71X0                    policy<{'riscv64': 'y'}>
 CONFIG_RESET_SUNPLUS                            policy<{'armhf': 'y'}>