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[80.71.140.73]) by smtp.gmail.com with ESMTPSA id fa11-20020a05622a4ccb00b0035cf0f50d7csm7413287qtb.52.2022.10.17.02.42.28 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Oct 2022 02:42:28 -0700 (PDT) From: Emil Renner Berthing To: kernel-team@lists.ubuntu.com Subject: [SRU][K][PATCH 3/5] riscv: dts: microchip: update memory configuration for v2022.10 Date: Mon, 17 Oct 2022 11:42:17 +0200 Message-Id: <20221017094219.250906-4-emil.renner.berthing@canonical.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221017094219.250906-1-emil.renner.berthing@canonical.com> References: <20221017094219.250906-1-emil.renner.berthing@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Conor Dooley BugLink: https://bugs.launchpad.net/bugs/1993148 In the v2022.10 reference design, the seg registers are going to be changed, resulting in a required change to the memory map in Linux. A small 4M reservation is made at the end of 32-bit DDR to provide some memory for the HSS to use, so that it can cache its payload.bin between reboots of a specific context. Signed-off-by: Conor Dooley (cherry picked from commit 6c1193301791d3fcc0ad9ff3b861a8216e00773b) Signed-off-by: Emil Renner Berthing --- arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts index f3f87ed2007f..46210cb67de6 100644 --- a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts +++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts @@ -32,15 +32,26 @@ cpus { ddrc_cache_lo: memory@80000000 { device_type = "memory"; - reg = <0x0 0x80000000 0x0 0x2e000000>; + reg = <0x0 0x80000000 0x0 0x40000000>; status = "okay"; }; ddrc_cache_hi: memory@1000000000 { device_type = "memory"; - reg = <0x10 0x0 0x0 0x40000000>; + reg = <0x10 0x40000000 0x0 0x40000000>; status = "okay"; }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + hss_payload: region@BFC00000 { + reg = <0x0 0xBFC00000 0x0 0x400000>; + no-map; + }; + }; }; &core_pwm0 {