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[80.71.140.73]) by smtp.gmail.com with ESMTPSA id fa11-20020a05622a4ccb00b0035cf0f50d7csm7413287qtb.52.2022.10.17.02.42.26 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Oct 2022 02:42:26 -0700 (PDT) From: Emil Renner Berthing To: kernel-team@lists.ubuntu.com Subject: [SRU][K][PATCH 1/5] riscv: dts: microchip: icicle: re-jig fabric peripheral addresses Date: Mon, 17 Oct 2022 11:42:15 +0200 Message-Id: <20221017094219.250906-2-emil.renner.berthing@canonical.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221017094219.250906-1-emil.renner.berthing@canonical.com> References: <20221017094219.250906-1-emil.renner.berthing@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Conor Dooley BugLink: https://bugs.launchpad.net/bugs/1993148 When users try to add onto the reference design, they find that the current addresses that peripherals connected to Fabric InterConnect (FIC) 3 use are restrictive. For the v2022.09 reference design, the peripherals have been shifted down, leaving more contiguous address space for their custom IP/peripherals. Signed-off-by: Conor Dooley (cherry picked from commit ab291621a8b85269496ae9a964b6d49cd1e030c8) Signed-off-by: Emil Renner Berthing --- arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi index 0d28858b83f2..33a373692e2e 100644 --- a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi +++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi @@ -4,18 +4,18 @@ / { compatible = "microchip,mpfs-icicle-reference-rtlv2203", "microchip,mpfs"; - core_pwm0: pwm@41000000 { + core_pwm0: pwm@40000000 { compatible = "microchip,corepwm-rtl-v4"; - reg = <0x0 0x41000000 0x0 0xF0>; + reg = <0x0 0x40000000 0x0 0xF0>; microchip,sync-update-mask = /bits/ 32 <0>; #pwm-cells = <2>; clocks = <&fabric_clk3>; status = "disabled"; }; - i2c2: i2c@44000000 { + i2c2: i2c@40000200 { compatible = "microchip,corei2c-rtl-v7"; - reg = <0x0 0x44000000 0x0 0x1000>; + reg = <0x0 0x40000200 0x0 0x1000>; #address-cells = <1>; #size-cells = <0>; clocks = <&fabric_clk3>;