From patchwork Thu Jun 16 17:18:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aaron Ma X-Patchwork-Id: 1644555 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=canonical.com header.i=@canonical.com header.a=rsa-sha256 header.s=20210705 header.b=CDw44mH6; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4LP86Z2nxjz9sGC for ; Fri, 17 Jun 2022 03:19:16 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1o1t9B-0005wc-7k; Thu, 16 Jun 2022 17:19:09 +0000 Received: from smtp-relay-canonical-1.internal ([10.131.114.174] helo=smtp-relay-canonical-1.canonical.com) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1o1t98-0005vO-Oz for kernel-team@lists.ubuntu.com; Thu, 16 Jun 2022 17:19:06 +0000 Received: from localhost.localdomain (unknown [222.129.34.149]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-canonical-1.canonical.com (Postfix) with ESMTPSA id 663C741065 for ; Thu, 16 Jun 2022 17:19:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1655399946; bh=CqTdxdNdZ+F87GwT2Lrlv2LahNtkz2/oQWlZ0M03zkY=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=CDw44mH67ETD63pyYEhnpOaTs3VGB+13GoauiRsw9bdhcGdeiGDSZhlwiyydWpfmq 2tunnNXR2XVJ9lrIRjLtzjHjI+u2pfvVCa9zuWMgtNwKMqTEy+pRqe6umlp4FgQYgF In3t1QYDyRpBGJ+j9CL+9oVxcolxqMckfKsn2XLn8EODQOy3ugpf4TjXNlw08h6TZs ec19X9pS40bd28oP5XCI2XvHJIJc13o12qQUJlGvwavgvTpUw+pfJ/pCRAwKoKlq+z nHPOxm1SqQlG9pghMkaAyCYplqXE1TheoRcIZ/Me6aZfnFRzR8i8AIP5PFnKFbIuSu 2J0LjQNovR6+g== From: Aaron Ma To: kernel-team@lists.ubuntu.com Subject: [OEM-5.17][PATCH 1/1] UBUNTU: SAUCE: drm/amd/display: Cap OLED brightness per max frame-average luminance Date: Fri, 17 Jun 2022 01:18:54 +0800 Message-Id: <20220616171854.3179-3-aaron.ma@canonical.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220616171854.3179-1-aaron.ma@canonical.com> References: <20220616171854.3179-1-aaron.ma@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Roman Li BugLink: https://bugs.launchpad.net/bugs/1978986 [Why] For OLED eDP the Display Manager uses max_cll value as a limit for brightness control. max_cll defines the content light luminance for individual pixel. Whereas max_fall defines frame-average level luminance. The user may not observe the difference in brightness in between max_fall and max_cll. That negatively impacts the user experience. [How] Use max_fall value instead of max_cll as a limit for brightness control. Reviewed-by: Rodrigo Siqueira Acked-by: Hamza Mahfooz Signed-off-by: Roman Li Link: https://lore.kernel.org/amd-gfx/20220603201147.121817-8-hamza.mahfooz@amd.com Signed-off-by: Aaron Ma --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index f9eadc2f3ccee..c81864d066c2f 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -2814,7 +2814,7 @@ static struct drm_mode_config_helper_funcs amdgpu_dm_mode_config_helperfuncs = { static void update_connector_ext_caps(struct amdgpu_dm_connector *aconnector) { - u32 max_cll, min_cll, max, min, q, r; + u32 max_avg, min_cll, max, min, q, r; struct amdgpu_dm_backlight_caps *caps; struct amdgpu_display_manager *dm; struct drm_connector *conn_base; @@ -2844,7 +2844,7 @@ static void update_connector_ext_caps(struct amdgpu_dm_connector *aconnector) caps = &dm->backlight_caps[i]; caps->ext_caps = &aconnector->dc_link->dpcd_sink_ext_caps; caps->aux_support = false; - max_cll = conn_base->hdr_sink_metadata.hdmi_type1.max_cll; + max_avg = conn_base->hdr_sink_metadata.hdmi_type1.max_fall; min_cll = conn_base->hdr_sink_metadata.hdmi_type1.min_cll; if (caps->ext_caps->bits.oled == 1 /*|| @@ -2872,8 +2872,8 @@ static void update_connector_ext_caps(struct amdgpu_dm_connector *aconnector) * The results of the above expressions can be verified at * pre_computed_values. */ - q = max_cll >> 5; - r = max_cll % 32; + q = max_avg >> 5; + r = max_avg % 32; max = (1 << q) * pre_computed_values[r]; // min luminance: maxLum * (CV/255)^2 / 100