From patchwork Fri Apr 8 02:38:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: You-Sheng Yang X-Patchwork-Id: 1614672 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KZMrg4vt8z9sG6 for ; Fri, 8 Apr 2022 12:38:58 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1nceWO-0003Rl-6H; Fri, 08 Apr 2022 02:38:48 +0000 Received: from mail-pj1-f45.google.com ([209.85.216.45]) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1nceWL-0003RA-Uw for kernel-team@lists.ubuntu.com; Fri, 08 Apr 2022 02:38:46 +0000 Received: by mail-pj1-f45.google.com with SMTP id kw18so7350853pjb.5 for ; Thu, 07 Apr 2022 19:38:45 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LNBaqekFYqctLdHdXGhF5sEJzH7iaJPX69rLYownSkM=; b=UX/fsKr5cqg6mqrvpm2ggAFLcv0LzJ9FzGzyH/6wFig0DbosVMZnsXHYYEdrcEtNLb YPEnsSL1lmkVzk56TC1qmzloxxEF3oT6fUlZJu/UsAV/8hPp8bG0UdO5edIBz3FNA8HQ 1Qy3dfclNP+D/Rk/t+c64OlqJYHRwCGkI7UIhXNoUu7f22gj9s9xjlUxnqEWtAV5i3en 4ILr1nllxzoCHNieoT5Lns7FmR5tCSflWmSCDS6+nmLhtq6uhJDD/T7DRYPaDlEWQc+3 dLQ8qV6bSQ6IyrbB1a5RmG33sllBTNeL3iMfXAIVCP5LwIHeZ9EcqaEUKvstqqGec+n7 tFcw== X-Gm-Message-State: AOAM532XepxxQWr4eCWEfNIvthf3EwA9/ecIaaYxJ1Cp+DfNxMuL3dWt i4BHV91G6VpbTCQvrNxupBs6WOH+GrM= X-Google-Smtp-Source: ABdhPJzwZiJlfuji6QqSMS9DbYvM5grdljmWqJuaWh5cb/HX8HJYihRYmAAtIffYmjuPenhR1ORmkw== X-Received: by 2002:a17:902:d714:b0:153:2e9:3bcc with SMTP id w20-20020a170902d71400b0015302e93bccmr16970707ply.83.1649385524025; Thu, 07 Apr 2022 19:38:44 -0700 (PDT) Received: from localhost (114-40-204-238.dynamic-ip.hinet.net. [114.40.204.238]) by smtp.gmail.com with ESMTPSA id p27-20020a056a000a1b00b004f3f63e3cf2sm26773982pfh.58.2022.04.07.19.38.43 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Apr 2022 19:38:43 -0700 (PDT) From: You-Sheng Yang To: kernel-team@lists.ubuntu.com Subject: [PATCH 01/16][SRU][OEM-5.14/Jammy] x86/cpufeatures: Add AMD Collaborative Processor Performance Control feature flag Date: Fri, 8 Apr 2022 10:38:23 +0800 Message-Id: <20220408023840.1379420-2-vicamo.yang@canonical.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220408023840.1379420-1-vicamo.yang@canonical.com> References: <20220408023840.1379420-1-vicamo.yang@canonical.com> MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.216.45; envelope-from=vicamo@gmail.com; helo=mail-pj1-f45.google.com X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Huang Rui BugLink: https://bugs.launchpad.net/bugs/1956509 Add Collaborative Processor Performance Control feature flag for AMD processors. This feature flag will be used on the following AMD P-State driver. The AMD P-State driver has two approaches to implement the frequency control behavior. That depends on the CPU hardware implementation. One is "Full MSR Support" and another is "Shared Memory Support". The feature flag indicates the current processors with "Full MSR Support". Acked-by: Borislav Petkov Signed-off-by: Huang Rui Signed-off-by: Rafael J. Wysocki (cherry picked from commit d341db8f48ea43314f489921962c7f8f4ec27239) Signed-off-by: You-Sheng Yang --- arch/x86/include/asm/cpufeatures.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 4423759f619c..b7aebfccdfab 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -313,6 +313,7 @@ #define X86_FEATURE_AMD_SSBD (13*32+24) /* "" Speculative Store Bypass Disable */ #define X86_FEATURE_VIRT_SSBD (13*32+25) /* Virtualized Speculative Store Bypass Disable */ #define X86_FEATURE_AMD_SSB_NO (13*32+26) /* "" Speculative Store Bypass is fixed in hardware. */ +#define X86_FEATURE_CPPC (13*32+27) /* Collaborative Processor Performance Control */ /* Thermal and Power Management Leaf, CPUID level 0x00000006 (EAX), word 14 */ #define X86_FEATURE_DTHERM (14*32+ 0) /* Digital Thermal Sensor */