From patchwork Mon Oct 4 18:16:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Juerg Haefliger X-Patchwork-Id: 1536314 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=canonical.com header.i=@canonical.com header.a=rsa-sha256 header.s=20210705 header.b=OiqnNDnB; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HNTT61WzPz9t0Y for ; Tue, 5 Oct 2021 05:17:12 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1mXSWN-0007c4-6H; Mon, 04 Oct 2021 18:17:03 +0000 Received: from smtp-relay-internal-0.internal ([10.131.114.225] helo=smtp-relay-internal-0.canonical.com) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1mXSWG-0007Xp-P0 for kernel-team@lists.ubuntu.com; Mon, 04 Oct 2021 18:16:56 +0000 Received: from mail-ed1-f71.google.com (mail-ed1-f71.google.com [209.85.208.71]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-0.canonical.com (Postfix) with ESMTPS id 9C6E1405F1 for ; Mon, 4 Oct 2021 18:16:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1633371416; bh=RuV7+wHxEX32Ex3Ak+M84q7Ilu87kCaOzq3mlO+BY6I=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=OiqnNDnBVcpfTa720N5JRrtzPcBioreGVR1hnNa4vTNF5aZK8kQlRiGWX3Mqxgf+8 oTWXpMrvXu0/VK9cjk4C3r3kpJuHOoCRGew38oujR6kyRZ4lMGIgfsap77ctdZw9Vp wtMX0gqRGw4DbpcLjkIhKR6us3cQWIk7pTPX6YCwhVUE9U8CGWZ6yLHyPT+9RVjbr0 tGzhcuK3KOBlltbYdg/xqJS/PvZ4Nlln/Lzz3l1O827llew++OUp/uhvB6cA8+68c3 sn0GtzIl/sdDKYR/9Sc1TYrZE6xbMgcCmbJAff97ycKR2SVPBusGgEw0X12RxfUHhC H69ZObWyQgTJA== Received: by mail-ed1-f71.google.com with SMTP id y15-20020a50ce0f000000b003dab997cf7dso14513860edi.9 for ; Mon, 04 Oct 2021 11:16:56 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=RuV7+wHxEX32Ex3Ak+M84q7Ilu87kCaOzq3mlO+BY6I=; b=wqfoGAxEHUCb2Hef0dLiH7wFlpUbJrf89G/957gHoF8oslVL/s5lnEWk2N8XAtPQCB PwzbvpzTutcdsDpC746PFTiuGteNsZhkJwTnpIQ5TsCFS3OM9V79eT32oC4OGVVg4DFS QIbjZtA4hB47KEoybcE/h0RBfOLz+V9Al60abmHt/jLEs6DCoEYvsCNbawkzXLJtKkir B4mF5PSDA7Gq3Oh5+a1Yha4uWEJ8i9qPA4n+TLKIcnOL4Zh+KTMyN0kSqkWTqvQ8vejj FrRWpGUwC85jQHG6F4LmZghF7T8yfpegcdEQ5pRVsC9/Y57mUPENGFQw5o1c27wjLOqh lnug== X-Gm-Message-State: AOAM532hCwIdRdu8MEQQh8qH7AQaZgsnkbqHI9QKChiOaV1XG9gKyKMM tO00dulvVkPbklWQ1GzERHveFHIy9v18fSGMKy9e0+ceuk6BeRzCy6TDUckECTDMUV9rD5f6miE 82Nj7AzBbrp5bd77b29flgpaA5b2jplWUEEdobd5wVw== X-Received: by 2002:a50:cfc2:: with SMTP id i2mr19448831edk.72.1633371416365; Mon, 04 Oct 2021 11:16:56 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx5iVNoXpIxSIGor5ARIwfRITV8Oef2LF3BXQwww6EqPRIcjSUJ+h6ocWERWWNoihglZOihsw== X-Received: by 2002:a50:cfc2:: with SMTP id i2mr19448822edk.72.1633371416191; Mon, 04 Oct 2021 11:16:56 -0700 (PDT) Received: from gollum.fritz.box ([194.191.244.86]) by smtp.gmail.com with ESMTPSA id h9sm6862428ejx.78.2021.10.04.11.16.55 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Oct 2021 11:16:55 -0700 (PDT) From: Juerg Haefliger X-Google-Original-From: Juerg Haefliger To: kernel-team@lists.ubuntu.com Subject: [SRU][H/raspi][PATCH 3/7] drm/vc4: hdmi: Fix bvb clock enable error checking Date: Mon, 4 Oct 2021 20:16:49 +0200 Message-Id: <20211004181653.8298-4-juergh@canonical.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211004181653.8298-1-juergh@canonical.com> References: <20211004181653.8298-1-juergh@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" BugLink: https://bugs.launchpad.net/bugs/1944397 Check for errors only if we actually tried to enable the bvb clock. Fixes: 01a6d727b407 ("vc4/drm: hdmi: Handle case when bvb clock is null") Signed-off-by: Juerg Haefliger (forward ported from commit 7c9c402b0cc2ad4eae6b345b9699ab6701b48bc7 linux-rpi) [juergh: Adjusted context.] Signed-off-by: Juerg Haefliger --- drivers/gpu/drm/vc4/vc4_hdmi.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c index 780d06732925..70b2db77e39b 100644 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c @@ -951,14 +951,15 @@ static void vc4_hdmi_encoder_pre_crtc_configure(struct drm_encoder *encoder, else bvb_rate = 75000000; - if (vc4_hdmi->pixel_bvb_clock) + if (vc4_hdmi->pixel_bvb_clock) { vc4_hdmi->bvb_req = clk_request_start(vc4_hdmi->pixel_bvb_clock, bvb_rate); - if (IS_ERR(vc4_hdmi->bvb_req)) { - DRM_ERROR("Failed to set pixel bvb clock rate: %ld\n", PTR_ERR(vc4_hdmi->bvb_req)); - clk_request_done(vc4_hdmi->hsm_req); - clk_disable_unprepare(vc4_hdmi->pixel_clock); - pm_runtime_put(&vc4_hdmi->pdev->dev); - return; + if (IS_ERR(vc4_hdmi->bvb_req)) { + DRM_ERROR("Failed to set pixel bvb clock rate: %ld\n", PTR_ERR(vc4_hdmi->bvb_req)); + clk_request_done(vc4_hdmi->hsm_req); + clk_disable_unprepare(vc4_hdmi->pixel_clock); + pm_runtime_put(&vc4_hdmi->pdev->dev); + return; + } } ret = clk_prepare_enable(vc4_hdmi->pixel_bvb_clock);