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[61.220.137.34]) by smtp.gmail.com with ESMTPSA id c23sm16961471pgc.72.2021.01.18.06.26.17 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Jan 2021 06:26:18 -0800 (PST) From: AceLan Kao To: kernel-team@lists.ubuntu.com Subject: [PATCH 04/10][SRU][OEM-5.10] drm/i915/dg1: add hpd interrupt handling Date: Mon, 18 Jan 2021 22:25:58 +0800 Message-Id: <20210118142604.207243-5-acelan.kao@canonical.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210118142604.207243-1-acelan.kao@canonical.com> References: <20210118142604.207243-1-acelan.kao@canonical.com> MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.214.170; envelope-from=acelan@gmail.com; helo=mail-pl1-f170.google.com X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Lucas De Marchi BugLink: https://bugs.launchpad.net/bugs/1909457 DG1 has one more combo phy port, no TC and all irq handling goes through SDE, like for MCC. v2: Also change intel_hpd_pin_default() to include DG1 mapping v3, v4: Rebase on hpd refactor Cc: Ville Syrjälä Cc: Anshuman Gupta Cc: José Roberto de Souza Cc: Imre Deak Signed-off-by: Lucas De Marchi Reviewed-by: Matt Roper Link: https://patchwork.freedesktop.org/patch/msgid/20201021082034.3170478-2-lucas.demarchi@intel.com (cherry picked from commit 229f31e2d370d36c2345dadb821c856f61d13197) Signed-off-by: Chia-Lin Kao (AceLan) --- drivers/gpu/drm/i915/display/intel_ddi.c | 13 ++++++++- drivers/gpu/drm/i915/i915_irq.c | 37 ++++++++++++++++++++---- drivers/gpu/drm/i915/i915_reg.h | 8 +++++ 3 files changed, 51 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index e19cbb43e028..119634fbb52c 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -5064,6 +5064,15 @@ static bool hti_uses_phy(struct drm_i915_private *i915, enum phy phy) i915->hti_state & HDPORT_PHY_USED_HDMI(phy)); } +static enum hpd_pin dg1_hpd_pin(struct drm_i915_private *dev_priv, + enum port port) +{ + if (port >= PORT_D) + return HPD_PORT_C + port - PORT_D; + else + return HPD_PORT_A + port - PORT_A; +} + static enum hpd_pin tgl_hpd_pin(struct drm_i915_private *dev_priv, enum port port) { @@ -5193,7 +5202,9 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port) encoder->cloneable = 0; encoder->pipe_mask = ~0; - if (IS_ROCKETLAKE(dev_priv)) + if (IS_DG1(dev_priv)) + encoder->hpd_pin = dg1_hpd_pin(dev_priv, port); + else if (IS_ROCKETLAKE(dev_priv)) encoder->hpd_pin = rkl_hpd_pin(dev_priv, port); else if (INTEL_GEN(dev_priv) >= 12) encoder->hpd_pin = tgl_hpd_pin(dev_priv, port); diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 759f523c6a6b..4676ee791950 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -152,6 +152,13 @@ static const u32 hpd_icp[HPD_NUM_PINS] = { [HPD_PORT_TC6] = SDE_TC_HOTPLUG_ICP(PORT_TC6), }; +static const u32 hpd_sde_dg1[HPD_NUM_PINS] = { + [HPD_PORT_A] = SDE_DDI_HOTPLUG_ICP(PORT_A), + [HPD_PORT_B] = SDE_DDI_HOTPLUG_ICP(PORT_B), + [HPD_PORT_C] = SDE_DDI_HOTPLUG_ICP(PORT_C), + [HPD_PORT_D] = SDE_DDI_HOTPLUG_ICP(PORT_D), +}; + static void intel_hpd_init_pins(struct drm_i915_private *dev_priv) { struct i915_hotplug *hpd = &dev_priv->hotplug; @@ -176,11 +183,14 @@ static void intel_hpd_init_pins(struct drm_i915_private *dev_priv) else hpd->hpd = hpd_ilk; - if (!HAS_PCH_SPLIT(dev_priv) || HAS_PCH_NOP(dev_priv)) + if ((INTEL_PCH_TYPE(dev_priv) < PCH_DG1) && + (!HAS_PCH_SPLIT(dev_priv) || HAS_PCH_NOP(dev_priv))) return; - if (HAS_PCH_TGP(dev_priv) || HAS_PCH_JSP(dev_priv) || - HAS_PCH_ICP(dev_priv) || HAS_PCH_MCC(dev_priv)) + if (HAS_PCH_DG1(dev_priv)) + hpd->pch_hpd = hpd_sde_dg1; + else if (HAS_PCH_TGP(dev_priv) || HAS_PCH_JSP(dev_priv) || + HAS_PCH_ICP(dev_priv) || HAS_PCH_MCC(dev_priv)) hpd->pch_hpd = hpd_icp; else if (HAS_PCH_CNP(dev_priv) || HAS_PCH_SPT(dev_priv)) hpd->pch_hpd = hpd_spt; @@ -1070,6 +1080,8 @@ static bool icp_ddi_port_hotplug_long_detect(enum hpd_pin pin, u32 val) return val & SHOTPLUG_CTL_DDI_HPD_LONG_DETECT(PORT_B); case HPD_PORT_C: return val & SHOTPLUG_CTL_DDI_HPD_LONG_DETECT(PORT_C); + case HPD_PORT_D: + return val & SHOTPLUG_CTL_DDI_HPD_LONG_DETECT(PORT_D); default: return false; } @@ -1843,7 +1855,10 @@ static void icp_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir) u32 ddi_hotplug_trigger, tc_hotplug_trigger; u32 pin_mask = 0, long_mask = 0; - if (HAS_PCH_TGP(dev_priv)) { + if (HAS_PCH_DG1(dev_priv)) { + ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_DG1; + tc_hotplug_trigger = 0; + } else if (HAS_PCH_TGP(dev_priv)) { ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_TGP; tc_hotplug_trigger = pch_iir & SDE_TC_MASK_TGP; } else if (HAS_PCH_JSP(dev_priv)) { @@ -3095,6 +3110,12 @@ static void jsp_hpd_irq_setup(struct drm_i915_private *dev_priv) TGP_DDI_HPD_ENABLE_MASK, 0); } +static void dg1_hpd_irq_setup(struct drm_i915_private *dev_priv) +{ + icp_hpd_irq_setup(dev_priv, + DG1_DDI_HPD_ENABLE_MASK, 0); +} + static void gen11_hpd_detection_setup(struct drm_i915_private *dev_priv) { u32 hotplug; @@ -3478,7 +3499,9 @@ static void icp_irq_postinstall(struct drm_i915_private *dev_priv) gen3_assert_iir_is_zero(&dev_priv->uncore, SDEIIR); I915_WRITE(SDEIMR, ~mask); - if (HAS_PCH_TGP(dev_priv)) { + if (HAS_PCH_DG1(dev_priv)) + icp_ddi_hpd_detection_setup(dev_priv, DG1_DDI_HPD_ENABLE_MASK); + else if (HAS_PCH_TGP(dev_priv)) { icp_ddi_hpd_detection_setup(dev_priv, TGP_DDI_HPD_ENABLE_MASK); icp_tc_hpd_detection_setup(dev_priv, TGP_TC_HPD_ENABLE_MASK); } else if (HAS_PCH_JSP(dev_priv)) { @@ -3995,7 +4018,9 @@ void intel_irq_init(struct drm_i915_private *dev_priv) if (I915_HAS_HOTPLUG(dev_priv)) dev_priv->display.hpd_irq_setup = i915_hpd_irq_setup; } else { - if (HAS_PCH_JSP(dev_priv)) + if (HAS_PCH_DG1(dev_priv)) + dev_priv->display.hpd_irq_setup = dg1_hpd_irq_setup; + else if (HAS_PCH_JSP(dev_priv)) dev_priv->display.hpd_irq_setup = jsp_hpd_irq_setup; else if (HAS_PCH_MCC(dev_priv)) dev_priv->display.hpd_irq_setup = mcc_hpd_irq_setup; diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 5287433f028b..fef108d7e22e 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -8227,6 +8227,10 @@ enum { SDE_TC_HOTPLUG_ICP(PORT_TC3) | \ SDE_TC_HOTPLUG_ICP(PORT_TC2) | \ SDE_TC_HOTPLUG_ICP(PORT_TC1)) +#define SDE_DDI_MASK_DG1 (SDE_DDI_HOTPLUG_ICP(PORT_D) | \ + SDE_DDI_HOTPLUG_ICP(PORT_C) | \ + SDE_DDI_HOTPLUG_ICP(PORT_B) | \ + SDE_DDI_HOTPLUG_ICP(PORT_A)) #define SDEISR _MMIO(0xc4000) #define SDEIMR _MMIO(0xc4004) @@ -8426,6 +8430,10 @@ enum { #define TGP_TC_HPD_ENABLE_MASK (ICP_TC_HPD_ENABLE(PORT_TC6) | \ ICP_TC_HPD_ENABLE(PORT_TC5) | \ ICP_TC_HPD_ENABLE_MASK) +#define DG1_DDI_HPD_ENABLE_MASK (SHOTPLUG_CTL_DDI_HPD_ENABLE(PORT_D) | \ + SHOTPLUG_CTL_DDI_HPD_ENABLE(PORT_C) | \ + SHOTPLUG_CTL_DDI_HPD_ENABLE(PORT_B) | \ + SHOTPLUG_CTL_DDI_HPD_ENABLE(PORT_A)) #define _PCH_DPLL_A 0xc6014 #define _PCH_DPLL_B 0xc6018