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[61.220.137.37]) by smtp.gmail.com with ESMTPSA id i14sm4622979pfd.38.2020.10.29.23.02.46 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Oct 2020 23:02:47 -0700 (PDT) From: AceLan Kao To: kernel-team@lists.ubuntu.com Subject: [PATCH 07/23][SRU][OEM-5.6] platform/x86: intel_pmc_core: Refactor the driver by removing redundant code Date: Fri, 30 Oct 2020 14:01:58 +0800 Message-Id: <20201030060214.780883-13-acelan.kao@canonical.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201030060214.780883-1-acelan.kao@canonical.com> References: <20201030060214.780883-1-acelan.kao@canonical.com> MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.214.194; envelope-from=acelan@gmail.com; helo=mail-pl1-f194.google.com X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Gayatri Kammela BugLink: https://bugs.launchpad.net/bugs/1899883 pmc_core_slps0_dbg_show() is responsible for displaying debug registers through slp_s0_debug_status entry. The driver uses the same but redundant code to dump these debug registers for an S0ix failure. Hence, refactor the driver by removing redundant code and reuse the same function that both dumps registers through slp_s0_debug_status entry and in resume for an S0ix failure. The changes in this patch are preparatory, so platforms that support low power sub-states can dump the debug registers when the attempt to enter low power states are unsuccessful. Cc: Srinivas Pandruvada Cc: Andy Shevchenko Cc: David Box Suggested-by: Andy Shevchenko Signed-off-by: Gayatri Kammela Signed-off-by: Andy Shevchenko (cherry picked from commit 4d6a63e0b99ea4ba7f718ab084ebf566b7d1585f) Signed-off-by: AceLan Kao --- drivers/platform/x86/intel_pmc_core.c | 48 +++++++++++++-------------- 1 file changed, 23 insertions(+), 25 deletions(-) diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c index e9b7edb7aa39..6cd17aef35d9 100644 --- a/drivers/platform/x86/intel_pmc_core.c +++ b/drivers/platform/x86/intel_pmc_core.c @@ -845,30 +845,41 @@ static void pmc_core_slps0_dbg_latch(struct pmc_dev *pmcdev, bool reset) mutex_unlock(&pmcdev->lock); } -static int pmc_core_slps0_dbg_show(struct seq_file *s, void *unused) +static void pmc_core_slps0_display(struct pmc_dev *pmcdev, struct device *dev, + struct seq_file *s) { - struct pmc_dev *pmcdev = s->private; const struct pmc_bit_map **maps = pmcdev->map->slps0_dbg_maps; const struct pmc_bit_map *map; - int offset; + int offset = pmcdev->map->slps0_dbg_offset; u32 data; - pmc_core_slps0_dbg_latch(pmcdev, false); - offset = pmcdev->map->slps0_dbg_offset; while (*maps) { map = *maps; data = pmc_core_reg_read(pmcdev, offset); offset += 4; while (map->name) { - seq_printf(s, "SLP_S0_DBG: %-32s\tState: %s\n", - map->name, - data & map->bit_mask ? - "Yes" : "No"); + if (dev) + dev_dbg(dev, "SLP_S0_DBG: %-32s\tState: %s\n", + map->name, + data & map->bit_mask ? "Yes" : "No"); + if (s) + seq_printf(s, "SLP_S0_DBG: %-32s\tState: %s\n", + map->name, + data & map->bit_mask ? "Yes" : "No"); ++map; } ++maps; } +} + +static int pmc_core_slps0_dbg_show(struct seq_file *s, void *unused) +{ + struct pmc_dev *pmcdev = s->private; + + pmc_core_slps0_dbg_latch(pmcdev, false); + pmc_core_slps0_display(pmcdev, NULL, s); pmc_core_slps0_dbg_latch(pmcdev, true); + return 0; } DEFINE_SHOW_ATTRIBUTE(pmc_core_slps0_dbg); @@ -1264,10 +1275,6 @@ static inline bool pmc_core_is_s0ix_failed(struct pmc_dev *pmcdev) static int pmc_core_resume(struct device *dev) { struct pmc_dev *pmcdev = dev_get_drvdata(dev); - const struct pmc_bit_map **maps = pmcdev->map->slps0_dbg_maps; - int offset = pmcdev->map->slps0_dbg_offset; - const struct pmc_bit_map *map; - u32 data; if (!pmcdev->check_counters) return 0; @@ -1285,18 +1292,9 @@ static int pmc_core_resume(struct device *dev) /* The real interesting case - S0ix failed - lets ask PMC why. */ dev_warn(dev, "CPU did not enter SLP_S0!!! (S0ix cnt=%llu)\n", pmcdev->s0ix_counter); - while (*maps) { - map = *maps; - data = pmc_core_reg_read(pmcdev, offset); - offset += 4; - while (map->name) { - dev_dbg(dev, "SLP_S0_DBG: %-32s\tState: %s\n", - map->name, - data & map->bit_mask ? "Yes" : "No"); - map++; - } - maps++; - } + if (pmcdev->map->slps0_dbg_maps) + pmc_core_slps0_display(pmcdev, dev, NULL); + return 0; }