From patchwork Tue Mar 24 14:32:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Timo Aaltonen X-Patchwork-Id: 1260738 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=ubuntu.com Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48mtzn4xHcz9sSY; Wed, 25 Mar 2020 01:34:13 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1jGkd3-00060X-VX; Tue, 24 Mar 2020 14:34:06 +0000 Received: from youngberry.canonical.com ([91.189.89.112]) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1jGkcD-0005OQ-9M for kernel-team@lists.ubuntu.com; Tue, 24 Mar 2020 14:33:13 +0000 Received: from [192.194.81.50] (helo=localhost.localdomain) by youngberry.canonical.com with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1jGkcC-00036U-NF for kernel-team@lists.ubuntu.com; Tue, 24 Mar 2020 14:33:12 +0000 From: Timo Aaltonen To: kernel-team@lists.ubuntu.com Subject: [OEM-5.6][PATCH 10/37] drm/i915/tgl: Program MBUS_ABOX{1, 2}_CTL during display init Date: Tue, 24 Mar 2020 16:32:39 +0200 Message-Id: <20200324143306.250696-11-tjaalton@ubuntu.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200324143306.250696-1-tjaalton@ubuntu.com> References: <20200324143306.250696-1-tjaalton@ubuntu.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Matt Roper BugLink: https://bugs.launchpad.net/bugs/1868727 On gen11 we only needed to program MBus credits into MBUS_ABOX_CTL during display initialization, but on gen12 we're now supposed to program the same values into MBUS_ABOX1_CTL and MBUS_ABOX2_CTL as well. v2: - Program registers with rmw to preserve contents of unrelated bits. - Switch to the new display uncore helpers. Bspec: 49213 Bspec: 50096 Cc: Stanislav Lisovskiy Signed-off-by: Matt Roper Link: https://patchwork.freedesktop.org/patch/msgid/20200204011032.582737-2-matthew.d.roper@intel.com Reviewed-by: Matt Atwood (backported from drm-intel-next commit 1042b2b93dac8029122fa7abeedf6b8f0f795a25) Signed-off-by: Timo Aaltonen --- drivers/gpu/drm/i915/display/intel_display_power.c | 4 ++++ drivers/gpu/drm/i915/i915_reg.h | 2 ++ 2 files changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c index 46c40db992dd..e819686ed547 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power.c +++ b/drivers/gpu/drm/i915/display/intel_display_power.c @@ -4480,6 +4480,10 @@ static void icl_mbus_init(struct drm_i915_private *dev_priv) MBUS_ABOX_B_CREDIT(1) | MBUS_ABOX_BW_CREDIT(1); I915_WRITE(MBUS_ABOX_CTL, val); + if (INTEL_GEN(dev_priv) >= 12) { + I915_WRITE(MBUS_ABOX1_CTL, val); + I915_WRITE(MBUS_ABOX2_CTL, val); + } } static void hsw_assert_cdclk(struct drm_i915_private *dev_priv) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 1a2929a4d70a..41c538522dad 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -2860,6 +2860,8 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg) #define MI_ARB_STATE _MMIO(0x20e4) /* 915+ only */ #define MBUS_ABOX_CTL _MMIO(0x45038) +#define MBUS_ABOX1_CTL _MMIO(0x45048) +#define MBUS_ABOX2_CTL _MMIO(0x4504C) #define MBUS_ABOX_BW_CREDIT_MASK (3 << 20) #define MBUS_ABOX_BW_CREDIT(x) ((x) << 20) #define MBUS_ABOX_B_CREDIT_MASK (0xF << 16)