From patchwork Wed Nov 27 08:00:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: You-Sheng Yang X-Patchwork-Id: 1201403 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=canonical.com Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 47NCsd0lcBz9sSt; Wed, 27 Nov 2019 19:01:57 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1iZsGm-0001iT-Nt; Wed, 27 Nov 2019 08:01:52 +0000 Received: from mail-pj1-f67.google.com ([209.85.216.67]) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1iZsG8-000143-Ea for kernel-team@lists.ubuntu.com; Wed, 27 Nov 2019 08:01:12 +0000 Received: by mail-pj1-f67.google.com with SMTP id r11so1710437pjp.12 for ; Wed, 27 Nov 2019 00:01:12 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=KfxOhH/FYNNQONZrLOb7G0NRO3lw8cM4goN/gQ1PcVs=; b=L7+JXoR6fTYJID5bLUa49iqPjrup+eyi8kARVBLjvuwGWC7e2vrQQXnd1d3Qzd6yAA 4gTV7tt7BewF6VtMJCEBfEZsLWE9wSNfMh6ZJA0qlJKPL02h6kuijDHR0ju7ex5HxfhI 2W4Bxg44zop7RBpyFv4OSe1IUq5qiLoGS0jSdQ5JiHyPZIyq42eNiv/AawfMo3uZ7CJv YSxA7QqF3oEZ7ymX8ItUyXr5QPZQ4+24SGK6THNEk3iOzlzz4agfuS8PwBI23PAKRsUO FvQbuL8JHmDyff0QxNKlNBOZFPO8sVb9B3u42Qx0QgvRuVrOWxXVThCsQuLOXZ+moYLc Q32w== X-Gm-Message-State: APjAAAVGq+OsoiHYjXIpC+FnLTcjLiKwwTQaJJQJtjQJUBPUixLAaMMO f1Q1AVG0XtCqSnLsgOfrcIeo0kYE X-Google-Smtp-Source: APXvYqwU6UA0tUViMH/m45ur/oyz9p0FLxY5koossAf2uwOg7x/bZfCXUjFRmnBhZFIf97I44ai7IQ== X-Received: by 2002:a17:90b:94f:: with SMTP id dw15mr4229344pjb.13.1574841669655; Wed, 27 Nov 2019 00:01:09 -0800 (PST) Received: from localhost (61-220-137-37.HINET-IP.hinet.net. [61.220.137.37]) by smtp.gmail.com with ESMTPSA id x2sm14714675pge.76.2019.11.27.00.01.08 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Nov 2019 00:01:08 -0800 (PST) From: You-Sheng Yang To: kernel-team@lists.ubuntu.com Subject: [SRU][D/OEM-OSP1-B][PATCH v2 16/20] perf/x86/intel: Add Comet Lake CPU support Date: Wed, 27 Nov 2019 16:00:24 +0800 Message-Id: <20191127080028.200261-17-vicamo.yang@canonical.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191127080028.200261-1-vicamo.yang@canonical.com> References: <20191127080028.200261-1-vicamo.yang@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Kan Liang Comet Lake is the new 10th Gen Intel processor. From the perspective of Intel PMU, there is nothing changed compared with Sky Lake. Share the perf code with Sky Lake. The patch has been tested on real hardware. Signed-off-by: Kan Liang Signed-off-by: Peter Zijlstra (Intel) Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Thomas Gleixner Link: https://lkml.kernel.org/r/1570549810-25049-3-git-send-email-kan.liang@linux.intel.com Signed-off-by: Ingo Molnar (backported from commit 9066288b2aab1804dc1eebec6ff88474363b89cb) Signed-off-by: You-Sheng Yang --- arch/x86/events/intel/core.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index 1ab96f58987e..c7e8b41ba528 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -4776,6 +4776,8 @@ __init int intel_pmu_init(void) case INTEL_FAM6_SKYLAKE_DESKTOP: case INTEL_FAM6_KABYLAKE_MOBILE: case INTEL_FAM6_KABYLAKE_DESKTOP: + case INTEL_FAM6_COMETLAKE_L: + case INTEL_FAM6_COMETLAKE: x86_add_quirk(intel_pebs_isolation_quirk); x86_pmu.late_ack = true; memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event_ids));