mbox series

[0/4,Noble] x86: sysfs cache info may not be populated

Message ID 20240304103206.686842-1-vicamo.yang@canonical.com
Headers show
Series x86: sysfs cache info may not be populated | expand

Message

You-Sheng Yang March 4, 2024, 10:32 a.m. UTC 
BugLink: https://bugs.launchpad.net/bugs/2049793

[Impact]

The interface /sys/devices/system/cpu/cpuX/cache is broken (not populated) if
CPUs have different numbers of subleaves in CPUID 4. This is the case of Intel
Meteor Lake.

[Fix]

https://lore.kernel.org/all/20231212222519.12834-1-ricardo.neri-calderon@linux.intel.com/
Reviewed, but probably will only land in v6.9.

[Test Case]

Check existence of cpu cache info:

  $ ls /sys/devices/system/cpu/cpu0/cache/
  index0 index1 index2 index3 uevent

[Where problems could occur]

This populates sysfs entries that should have been available, not
something new or alters existing interface.

[Other Info]

While this is targets v6.8 for Intel LPMD (Low Power Model Daemon)'s
use, only Noble and Unstable will be nominated for fix.

Ricardo Neri (4):
  UBUNTU: SAUCE: cacheinfo: Check for null last-level cache info
  UBUNTU: SAUCE: cacheinfo: Allocate memory for memory if not done from
    the primary CPU
  UBUNTU: SAUCE: x86/cacheinfo: Delete global num_cache_leaves
  UBUNTU: SAUCE: x86/cacheinfo: Clean out init_cache_level()

 arch/x86/kernel/cpu/cacheinfo.c | 49 +++++++++++++++++----------------
 drivers/base/cacheinfo.c        |  9 +++++-
 2 files changed, 34 insertions(+), 24 deletions(-)

Comments

Paolo Pisati March 19, 2024, 3:49 p.m. UTC | #1 
On Mon, Mar 04, 2024 at 06:32:02PM +0800, You-Sheng Yang wrote:
> BugLink: https://bugs.launchpad.net/bugs/2049793

Applied.