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[61.220.137.34]) by smtp.gmail.com with ESMTPSA id i130sm16187271pfe.94.2021.01.18.06.26.06 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Jan 2021 06:26:06 -0800 (PST) From: AceLan Kao To: kernel-team@lists.ubuntu.com Subject: [PATCH 00/10][SRU][OEM-5.10][Unstable] Support CML-S CPU + TGP PCH Date: Mon, 18 Jan 2021 22:25:54 +0800 Message-Id: <20210118142604.207243-1-acelan.kao@canonical.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.210.172; envelope-from=acelan@gmail.com; helo=mail-pf1-f172.google.com X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: "Chia-Lin Kao (AceLan)" https://bugs.launchpad.net/bugs/1909457 [Impact] i915 driver gives below warnings that CML-S GPU doesn't work with TGL/RKL PCH, and the screen is blank. kernel: i915 0000:00:02.0: drm_WARN_ON(!IS_PLATFORM(dev_priv, INTEL_TIGERLAKE) && !IS_PLATFORM(dev_priv, INTEL_ROCKETLAKE)) [Fix] Intel provides us a new patch for this issue https://patchwork.freedesktop.org/patch/412664/ [Test] Verified on new Dell platforms. [Where problems could occur] The first commit reverts the patch that didn't find its way to upstream. The second to forth commits are to enable DG1 which applied for solving conflicts. The fifth and sixth commit splits code for EHL and JSL. The seventh and eighth commits rename enums, no function changes. The ninth commit is the newer version of the first reverted commit. The tenth commit adds CML CPU support on TGP PCH which fixes this issue. According to the above explanation, 1. the DG1 in newly enabled by commits 2 to 4, no regression could occur, 2. the EHL and JSL commits are pretty simple and straightforward, should be safe to include, 3. the first commit is equivalence to the ninth commit 4. the tenth commit is pretty simple to add GEN9 into flow control, so I think there should be no problems could occur from this patchset. Chia-Lin Kao (AceLan) (1): Revert "UBUNTU: SAUCE: drm/i915/rkl: new rkl ddc map for different PCH" José Roberto de Souza (1): drm/i915/display/ehl: Limit eDP to HBR2 Lee Shawn C (1): drm/i915/rkl: new rkl ddc map for different PCH Lucas De Marchi (2): drm/i915/dg1: gmbus pin mapping drm/i915/dg1: add hpd interrupt handling Matt Roper (1): drm/i915/dg1: Don't program PHY_MISC for PHY-C and PHY-D Tejas Upadhyay (2): drm/i915/jsl: Split EHL/JSL platform info and PCI ids UBUNTU: SAUCE: drm/i915/gen9_bc : Add TGP PCH support Ville Syrjälä (2): drm/i915: Add PORT_TCn aliases to enum port drm/i915: s/PORT_TC/TC_PORT_/ drivers/gpu/drm/i915/display/icl_dsi.c | 4 +- drivers/gpu/drm/i915/display/intel_bios.c | 35 +++--- drivers/gpu/drm/i915/display/intel_cdclk.c | 4 +- .../gpu/drm/i915/display/intel_combo_phy.c | 9 +- drivers/gpu/drm/i915/display/intel_ddi.c | 47 ++++--- drivers/gpu/drm/i915/display/intel_display.c | 47 ++++--- drivers/gpu/drm/i915/display/intel_display.h | 24 ++-- drivers/gpu/drm/i915/display/intel_dp.c | 11 +- drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 16 +-- drivers/gpu/drm/i915/display/intel_gmbus.c | 15 ++- drivers/gpu/drm/i915/display/intel_hdmi.c | 29 ++++- drivers/gpu/drm/i915/display/intel_tc.c | 2 +- drivers/gpu/drm/i915/gt/intel_sseu.c | 2 +- drivers/gpu/drm/i915/gt/intel_workarounds.c | 4 +- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 1 + drivers/gpu/drm/i915/i915_drv.h | 7 +- drivers/gpu/drm/i915/i915_irq.c | 115 +++++++++++------- drivers/gpu/drm/i915/i915_pci.c | 9 ++ drivers/gpu/drm/i915/i915_reg.h | 68 ++++++----- drivers/gpu/drm/i915/intel_device_info.c | 1 + drivers/gpu/drm/i915/intel_device_info.h | 1 + drivers/gpu/drm/i915/intel_pch.c | 9 +- include/drm/i915_pciids.h | 9 +- 23 files changed, 299 insertions(+), 170 deletions(-)