diff mbox series

[10/10] arm64: zynqmp: Add DT description for si5328 for zcu102/zcu106

Message ID db66a4bb501183ffbd033da4dd263afdb214f8ec.1652262769.git.michal.simek@amd.com
State Accepted
Commit 11ed38f5dc12afb581e0fdb2e617c6e25fa81af8
Delegated to: Michal Simek
Headers show
Series arm64: zynqmp: Various DT fixes | expand

Commit Message

Michal Simek May 11, 2022, 9:52 a.m. UTC 
From: Michal Simek <michal.simek@xilinx.com>

Origin DT binding just specify driver but wasn't aligned with DT binding
which came later. Extend description for zcu102 and zcu106 to cover latest
binding.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
---

 arch/arm/dts/zynqmp-zcu102-revA.dts | 21 ++++++++++++++++++++-
 arch/arm/dts/zynqmp-zcu106-revA.dts | 21 ++++++++++++++++++++-
 2 files changed, 40 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts
index aac798d6e74a..c13b52a6aeaa 100644
--- a/arch/arm/dts/zynqmp-zcu102-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu102-revA.dts
@@ -604,7 +604,26 @@ 
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <4>;
-			/* SI5328 - u20 */
+			si5328: clock-generator@69 {/* SI5328 - u20 */
+				compatible = "silabs,si5328";
+				reg = <0x69>;
+				/*
+				 * Chip has interrupt present connected to PL
+				 * interrupt-parent = <&>;
+				 * interrupts = <>;
+				 */
+				#address-cells = <1>;
+				#size-cells = <0>;
+				#clock-cells = <1>;
+				clocks = <&refhdmi>;
+				clock-names = "xtal";
+				clock-output-names = "si5328";
+
+				si5328_clk: clk0@0 {
+					reg = <0>;
+					clock-frequency = <27000000>;
+				};
+			};
 		};
 		/* 5 - 7 unconnected */
 	};
diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts
index 03624648cd71..6dfc8fe17bf2 100644
--- a/arch/arm/dts/zynqmp-zcu106-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu106-revA.dts
@@ -593,7 +593,26 @@ 
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <4>;
-			/* SI5328 - u20 */
+			si5328: clock-generator@69 {/* SI5328 - u20 */
+				compatible = "silabs,si5328";
+				reg = <0x69>;
+				/*
+				 * Chip has interrupt present connected to PL
+				 * interrupt-parent = <&>;
+				 * interrupts = <>;
+				 */
+				#address-cells = <1>;
+				#size-cells = <0>;
+				#clock-cells = <1>;
+				clocks = <&refhdmi>;
+				clock-names = "xtal";
+				clock-output-names = "si5328";
+
+				si5328_clk: clk0@0 {
+					reg = <0>;
+					clock-frequency = <27000000>;
+				};
+			};
 		};
 		i2c@5 {
 			#address-cells = <1>;