| Message ID | a837b6fdb7af1674ffee3cf0bd05ca64.squirrel@www.mm-sol.com |
|---|---|
| State | Accepted |
| Delegated to: | Tom Rini |
| Headers | show |
On Sun, May 26, 2013 at 11:03:17PM +0300, Lubomir Popov wrote: > The newly introduced function setup_warmreset_time(), called > from within prcm_init(), tries to write to the prm_rsttime > OMAP5 register. The struct member holding this register's > address is however initialized for OMAP5 ES2.0 only. On ES1.0 > devices this uninitialized value causes a second (warm) reset > at startup. > > Add .prm_rsttime address init to the ES1.0 struct. > > Signed-off-by: Lubomir Popov <lpopov@mm-sol.com> Acked-by: Tom Rini <trini@ti.com>
Hi Tom, On 26/05/13 23:03, Lubomir Popov wrote: > The newly introduced function setup_warmreset_time(), called > from within prcm_init(), tries to write to the prm_rsttime > OMAP5 register. The struct member holding this register's > address is however initialized for OMAP5 ES2.0 only. On ES1.0 > devices this uninitialized value causes a second (warm) reset > at startup. > > Add .prm_rsttime address init to the ES1.0 struct. > > Signed-off-by: Lubomir Popov <lpopov@mm-sol.com> > --- > V2 gives the correct prm_rsttime reg address for ES1.0. Copy-paste > from ES2.0 in V1, sorry. > > arch/arm/cpu/armv7/omap5/prcm-regs.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c b/arch/arm/cpu/armv7/omap5/prcm-regs.c > index e9f6a32..f29ac77 100644 > --- a/arch/arm/cpu/armv7/omap5/prcm-regs.c > +++ b/arch/arm/cpu/armv7/omap5/prcm-regs.c > @@ -298,6 +298,7 @@ struct prcm_regs const omap5_es1_prcm = { > .cm_wkupaon_io_srcomp_clkctrl = 0x4ae07898, > .prm_rstctrl = 0x4ae07b00, > .prm_rstst = 0x4ae07b04, > + .prm_rsttime = 0x4ae07b08, > .prm_vc_val_bypass = 0x4ae07ba0, > .prm_vc_cfg_i2c_mode = 0x4ae07bb4, > .prm_vc_cfg_i2c_clk = 0x4ae07bb8, > Could you please apply http://patchwork.ozlabs.org/patch/246454/ to the ti tree? This is the only obstacle for my board to boot normally with a clean u-boot-ti in respect to the OMAP5 common stuff. Thanks, Lubo
diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c b/arch/arm/cpu/armv7/omap5/prcm-regs.c index e9f6a32..f29ac77 100644 --- a/arch/arm/cpu/armv7/omap5/prcm-regs.c +++ b/arch/arm/cpu/armv7/omap5/prcm-regs.c @@ -298,6 +298,7 @@ struct prcm_regs const omap5_es1_prcm = { .cm_wkupaon_io_srcomp_clkctrl = 0x4ae07898, .prm_rstctrl = 0x4ae07b00, .prm_rstst = 0x4ae07b04, + .prm_rsttime = 0x4ae07b08, .prm_vc_val_bypass = 0x4ae07ba0, .prm_vc_cfg_i2c_mode = 0x4ae07bb4, .prm_vc_cfg_i2c_clk = 0x4ae07bb8,
The newly introduced function setup_warmreset_time(), called from within prcm_init(), tries to write to the prm_rsttime OMAP5 register. The struct member holding this register's address is however initialized for OMAP5 ES2.0 only. On ES1.0 devices this uninitialized value causes a second (warm) reset at startup. Add .prm_rsttime address init to the ES1.0 struct. Signed-off-by: Lubomir Popov <lpopov@mm-sol.com> --- V2 gives the correct prm_rsttime reg address for ES1.0. Copy-paste from ES2.0 in V1, sorry. arch/arm/cpu/armv7/omap5/prcm-regs.c | 1 + 1 file changed, 1 insertion(+)