| Message ID | ZXHMh3tIsPEZa3Vc@swlinux02 |
|---|---|
| State | Accepted |
| Delegated to: | Tom Rini |
| Headers | show |
| Series | [GIT,PULL] u-boot-riscv/master | expand |
On Thu, Dec 07, 2023 at 09:46:23PM +0800, Leo Liang wrote: > Hi Tom, > > The following changes since commit 2f0282922b2c458eea7f85c500a948a587437b63: > > Prepare v2024.01-rc4 (2023-12-04 13:46:56 -0500) > > are available in the Git repository at: > > https://source.denx.de/u-boot/custodians/u-boot-riscv.git > > for you to fetch changes up to 94533cd9c15a60b74420e53a725fab54d38dd555: > > starfive: visionfive2: add device tree overlay support (2023-12-06 16:05:39 +0800) > > CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/18812 > Applied to u-boot/master, thanks!
Hi Tom, The following changes since commit 2f0282922b2c458eea7f85c500a948a587437b63: Prepare v2024.01-rc4 (2023-12-04 13:46:56 -0500) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-riscv.git for you to fetch changes up to 94533cd9c15a60b74420e53a725fab54d38dd555: starfive: visionfive2: add device tree overlay support (2023-12-06 16:05:39 +0800) CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/18812 ---------------------------------------------------------------- - StarFive: Add StarFive watchdog driver - VisionFive2: Support device tree overlay for VisionFive2 board - Andes: Fix PLIC-SW setting - RISC-V: Fix NVMe support by implying NVME_PCI for QEMU - RISC-V: Fix binman for 64 bit format load address ---------------------------------------------------------------- Chanho Park (4): clk: starfive: jh7110: Add watchdog clocks watchdog: Add StarFive Watchdog driver riscv: dts: jh7110: Add watchdog device tree node configs: visionfive2: Enable watchdog driver Heinrich Schuchardt (1): risc-v: qemu: imply NVME_PCI John Clark (1): starfive: visionfive2: add device tree overlay support Randolph (1): riscv: binman: fix the load field format Yu Chien Peter Lin (1): riscv: andes: Fix enable register settings of PLICSW arch/riscv/dts/binman.dtsi | 14 +- arch/riscv/dts/jh7110.dtsi | 10 + arch/riscv/lib/andes_plicsw.c | 33 ++-- board/emulation/qemu-riscv/Kconfig | 2 +- configs/starfive_visionfive2_defconfig | 5 + drivers/clk/starfive/clk-jh7110.c | 9 + drivers/watchdog/Kconfig | 7 + drivers/watchdog/Makefile | 1 + drivers/watchdog/starfive_wdt.c | 329 +++++++++++++++++++++++++++++++++ include/configs/starfive-visionfive2.h | 1 + 10 files changed, 382 insertions(+), 29 deletions(-) create mode 100644 drivers/watchdog/starfive_wdt.c Best regards, Leo