diff mbox series

[v3,3/3] riscv: cpu: jh7110: Select SPL_ZERO_MEM_BEFORE_USE

Message ID TY3P286MB2611AE57A087674C5C2341B5980DA@TY3P286MB2611.JPNP286.PROD.OUTLOOK.COM
State Superseded
Delegated to: Andes
Headers show
Series arch: riscv: jh7110: Correctly zero L2 LIM | expand

Commit Message

Shengyu Qu Aug. 8, 2023, 12:39 p.m. UTC 
Add Kconfig item for Starfive JH7110 to select SPL_ZERO_MEM_BEFORE_USE.

Signed-off-by: Bo Gan <ganboing@gmail.com>
Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
---
 arch/riscv/cpu/jh7110/Kconfig | 1 +
 1 file changed, 1 insertion(+)

Comments

Leo Liang Aug. 9, 2023, 6:35 a.m. UTC | #1 
On Tue, Aug 08, 2023 at 08:39:57PM +0800, Shengyu Qu wrote:
> Add Kconfig item for Starfive JH7110 to select SPL_ZERO_MEM_BEFORE_USE.
> 
> Signed-off-by: Bo Gan <ganboing@gmail.com>
> Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
> ---
>  arch/riscv/cpu/jh7110/Kconfig | 1 +
>  1 file changed, 1 insertion(+)

Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
diff mbox series

Patch

diff --git a/arch/riscv/cpu/jh7110/Kconfig b/arch/riscv/cpu/jh7110/Kconfig
index 4d9581165b..2e26d0731f 100644
--- a/arch/riscv/cpu/jh7110/Kconfig
+++ b/arch/riscv/cpu/jh7110/Kconfig
@@ -13,6 +13,7 @@  config STARFIVE_JH7110
 	select SUPPORT_SPL
 	select SPL_RAM if SPL
 	select SPL_STARFIVE_DDR
+	select SPL_ZERO_MEM_BEFORE_USE
 	select PINCTRL_STARFIVE_JH7110
 	imply MMC
 	imply MMC_BROKEN_CD