From patchwork Mon Jun 6 16:15:30 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steve Rae X-Patchwork-Id: 631003 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3rNfv25LRlz9sD5 for ; Tue, 7 Jun 2016 02:15:42 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=broadcom.com header.i=@broadcom.com header.b=WxuLgY3t; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 132F3A752D; Mon, 6 Jun 2016 18:15:40 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id aF03loguxO0T; Mon, 6 Jun 2016 18:15:39 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B0520A74F1; Mon, 6 Jun 2016 18:15:38 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8C2E6A751E for ; Mon, 6 Jun 2016 18:15:35 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id bniohnoELpKc for ; Mon, 6 Jun 2016 18:15:35 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-qg0-f42.google.com (mail-qg0-f42.google.com [209.85.192.42]) by theia.denx.de (Postfix) with ESMTPS id 284E0A74DB for ; Mon, 6 Jun 2016 18:15:32 +0200 (CEST) Received: by mail-qg0-f42.google.com with SMTP id p34so44740042qgp.1 for ; Mon, 06 Jun 2016 09:15:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc; bh=qM734x8G/nROd9ulltI+YBHGu59PGhyFmDCrMAPO5JI=; b=WxuLgY3toRALd50ivKYnEd1eKjJHfMTKv8VvJKPpKcxx8GoJN8TgHsVQWMVu//r7AL Raax6yxvEZq6eXaXE7vYsuc4eGzKxlRl55tKE/bnJZ1z8suLk26r1nTaV0MSOjUXyXJn Xt4K66B2NMdr877YfKyKVLIZHLK6skmPPayzw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc; bh=qM734x8G/nROd9ulltI+YBHGu59PGhyFmDCrMAPO5JI=; b=K2CI1VFTguNQmCuiGHkiMVJ2aZNz9ERg1oCqA49Rm3d4eX3vsC88FWPLohy/MEbTUK RBuABn3JyM/aLcvGb4acMhi8fsfUcO+V43sxJYRMreEZc34PAlJyPNZBOy1JDdUfYDuQ U2ag9P+TFqPJCdHq2vTDU/2UeNhe6BU+P+mWGUtP6PRoxmtTGlwXBE/e2wAlS9KxxdSX LBipeYYuqhbmRloy0Vtg+yj0xmkhtaMkG2vJCmBBW3QWeQxjn95AwW+PNkFWZ+Dp8a9W dIFibC1TzRK0gf8LhMAtvoTJZn+vBQ8V4qAGLdmdc3xim7Bg8lXgiFjwsZIYfZ0g12Tc 6oqw== X-Gm-Message-State: ALyK8tJBziUb9IDEBI3f2shv1/RMYMgl5sUWGRp3L6eSEt89z8W3C1aYX54OOxJ4XKQRmlw+tFPeLOqJk7ll3dH1 MIME-Version: 1.0 X-Received: by 10.141.1.86 with SMTP id c83mr5233019qhd.12.1465229730602; Mon, 06 Jun 2016 09:15:30 -0700 (PDT) Received: by 10.237.42.164 with HTTP; Mon, 6 Jun 2016 09:15:30 -0700 (PDT) In-Reply-To: <57559DE2.6000205@denx.de> References: <1465228657-21027-1-git-send-email-srae@broadcom.com> <57559DE2.6000205@denx.de> Date: Mon, 6 Jun 2016 09:15:30 -0700 Message-ID: From: Steve Rae To: Marek Vasut Cc: Steve Rae , U-Boot Mailing List , Tom Rini Subject: Re: [U-Boot] [PATCH] usb: dwc2_udc_otg: support 8-bit interface X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" On Mon, Jun 6, 2016 at 8:59 AM, Marek Vasut wrote: > > On 06/06/2016 05:57 PM, Steve Rae wrote: > > Define CONFIG_USB_GADGET_DWC2_PHY_8_BIT to allow the > > physical interface to be 8-bit (rather than 16-bit). > > > > Signed-off-by: Steve Rae > > Can this config option be picked from DT rather than hard-coded by some > new ad-hoc config option ? Also, new options should be Kconfig'd . > > Thanks > Marek, would this be the correct place to add this Kconfig??? is the wording sufficient? Thanks, Steve > > > --- > > > > drivers/usb/gadget/dwc2_udc_otg.c | 4 ++++ > > include/configs/bcm28155_ap.h | 1 + > > 2 files changed, 5 insertions(+) > > > > diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c > > index cb20b00..a95c8d5 100644 > > --- a/drivers/usb/gadget/dwc2_udc_otg.c > > +++ b/drivers/usb/gadget/dwc2_udc_otg.c > > @@ -415,7 +415,11 @@ static void reconfig_usbd(struct dwc2_udc *dev) > > |0<<7 /* Ulpi DDR sel*/ > > |0<<6 /* 0: high speed utmi+, 1: full speed serial*/ > > |0<<4 /* 0: utmi+, 1:ulpi*/ > > +#ifdef CONFIG_USB_GADGET_DWC2_PHY_8_BIT > > + |0<<3 /* phy i/f 0:8bit, 1:16bit*/ > > +#else > > |1<<3 /* phy i/f 0:8bit, 1:16bit*/ > > +#endif > > |0x7<<0; /* HS/FS Timeout**/ > > > > if (dev->pdata->usb_gusbcfg) > > diff --git a/include/configs/bcm28155_ap.h b/include/configs/bcm28155_ap.h > > index 889e5db..e04cfbe 100644 > > --- a/include/configs/bcm28155_ap.h > > +++ b/include/configs/bcm28155_ap.h > > @@ -134,6 +134,7 @@ > > #define CONFIG_SYS_CACHELINE_SIZE 64 > > #define CONFIG_FASTBOOT_BUF_SIZE (CONFIG_SYS_SDRAM_SIZE - SZ_1M) > > #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_SDRAM_BASE > > +#define CONFIG_USB_GADGET_DWC2_PHY_8_BIT > > #define CONFIG_USB_GADGET_BCM_UDC_OTG_PHY > > #define CONFIG_USBID_ADDR 0x34052c46 > > > > > > > -- > Best regards, > Marek Vasut diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index a35a1c7..e957df4 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig @@ -45,20 +45,26 @@ config USB_GADGET_ATMEL_USBA config USB_GADGET_DWC2_OTG bool "DesignWare USB2.0 HS OTG controller (gadget mode)" select USB_GADGET_DUALSPEED help The Designware USB2.0 high-speed gadget controller integrated into many SoCs. Select this option if you want the driver to operate in Peripheral mode. This option requires USB_GADGET to be enabled. +config USB_GADGET_DWC2_PHY_8_BIT + bool "DesignWare USB2.0 controller (gadget mode)" + help + Set the Designware USB2.0 high-speed gadget controller + to 8-bit mode, rather than the default 16-bit mode. + config CI_UDC bool "ChipIdea device controller" select USB_GADGET_DUALSPEED help Say Y here to enable device controller functionality of the ChipIdea driver. config USB_GADGET_VBUS_DRAW int "Maximum VBUS Power usage (2-500 mA)" range 2 500